提交 91525d08 编写于 作者: B Benoit Goby 提交者: Greg Kroah-Hartman

ARM: tegra: Add support for Tegra USB PHYs

Interface used by Tegra's gadget driver and ehci driver
to power on and configure the USB PHYs.
Signed-off-by: NBenoit Goby <benoit@android.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 ee398ba9
......@@ -10,6 +10,9 @@ config ARCH_TEGRA_2x_SOC
select CPU_V7
select ARM_GIC
select ARCH_REQUIRE_GPIOLIB
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
......
......@@ -15,6 +15,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o
obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
obj-$(CONFIG_TEGRA_PCI) += pcie.o
obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
obj-${CONFIG_MACH_HARMONY} += board-harmony.o
obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
......
/*
* arch/arm/mach-tegra/include/mach/usb_phy.h
*
* Copyright (C) 2010 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MACH_USB_PHY_H
#define __MACH_USB_PHY_H
#include <linux/clk.h>
#include <linux/usb/otg.h>
struct tegra_utmip_config {
u8 hssync_start_delay;
u8 elastic_limit;
u8 idle_wait_delay;
u8 term_range_adj;
u8 xcvr_setup;
u8 xcvr_lsfslew;
u8 xcvr_lsrslew;
};
struct tegra_ulpi_config {
int reset_gpio;
const char *clk;
};
enum tegra_usb_phy_port_speed {
TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
TEGRA_USB_PHY_PORT_SPEED_LOW,
TEGRA_USB_PHY_PORT_SPEED_HIGH,
};
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
};
struct tegra_xtal_freq;
struct tegra_usb_phy {
int instance;
const struct tegra_xtal_freq *freq;
void __iomem *regs;
void __iomem *pad_regs;
struct clk *clk;
struct clk *pll_u;
struct clk *pad_clk;
enum tegra_usb_phy_mode mode;
void *config;
struct otg_transceiver *ulpi;
};
struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,
void *config, enum tegra_usb_phy_mode phy_mode);
int tegra_usb_phy_power_on(struct tegra_usb_phy *phy);
void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy);
void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy);
void tegra_usb_phy_power_off(struct tegra_usb_phy *phy);
void tegra_usb_phy_preresume(struct tegra_usb_phy *phy);
void tegra_usb_phy_postresume(struct tegra_usb_phy *phy);
void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
enum tegra_usb_phy_port_speed port_speed);
void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy);
void tegra_usb_phy_close(struct tegra_usb_phy *phy);
#endif /* __MACH_USB_PHY_H */
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