提交 4ec14b76 编写于 作者: I Ido Schimmel 提交者: David S. Miller

mlxsw: Add interface to access registers and process events

Ethernet Management Datagrams (EMADs) are Ethernet packets sent between
the host and the device in order to configure the available device registers.
Another use case is notifications sent from the device to the host,
letting it know about certain events, such as port up / down.

Add the ability to construct EMADs with provisions to construct and
parse the registers' payloads. Implement EMAD transaction layer
which is responsible for the reliable transmission of EMADs. Also, add
an infrastructure used by the switch driver to register for particular
events generated by the device.
Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
Signed-off-by: NJiri Pirko <jiri@mellanox.com>
Signed-off-by: NElad Raz <eladr@mellanox.com>
Reviewed-by: NScott Feldman <sfeldma@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 eda6500a
......@@ -44,6 +44,9 @@
#include <linux/types.h>
#include <linux/skbuff.h>
#include "trap.h"
#include "reg.h"
#include "cmd.h"
#define MLXSW_MODULE_ALIAS_PREFIX "mlxsw-driver-"
......@@ -77,6 +80,12 @@ struct mlxsw_rx_listener {
u16 trap_id;
};
struct mlxsw_event_listener {
void (*func)(const struct mlxsw_reg_info *reg,
char *payload, void *priv);
enum mlxsw_event_trap_id trap_id;
};
int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
const struct mlxsw_rx_listener *rxl,
void *priv);
......@@ -84,6 +93,18 @@ void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
const struct mlxsw_rx_listener *rxl,
void *priv);
int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
const struct mlxsw_event_listener *el,
void *priv);
void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
const struct mlxsw_event_listener *el,
void *priv);
int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
const struct mlxsw_reg_info *reg, char *payload);
int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
const struct mlxsw_reg_info *reg, char *payload);
struct mlxsw_rx_info {
u16 sys_port;
int trap_id;
......
/*
* drivers/net/ethernet/mellanox/mlxsw/emad.h
* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
* Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the names of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _MLXSW_EMAD_H
#define _MLXSW_EMAD_H
#define MLXSW_EMAD_MAX_FRAME_LEN 1518 /* Length in u8 */
#define MLXSW_EMAD_MAX_RETRY 5
/* EMAD Ethernet header */
#define MLXSW_EMAD_ETH_HDR_LEN 0x10 /* Length in u8 */
#define MLXSW_EMAD_EH_DMAC "\x01\x02\xc9\x00\x00\x01"
#define MLXSW_EMAD_EH_SMAC "\x00\x02\xc9\x01\x02\x03"
#define MLXSW_EMAD_EH_ETHERTYPE 0x8932
#define MLXSW_EMAD_EH_MLX_PROTO 0
#define MLXSW_EMAD_EH_PROTO_VERSION 0
/* EMAD TLV Types */
enum {
MLXSW_EMAD_TLV_TYPE_END,
MLXSW_EMAD_TLV_TYPE_OP,
MLXSW_EMAD_TLV_TYPE_DR,
MLXSW_EMAD_TLV_TYPE_REG,
MLXSW_EMAD_TLV_TYPE_USERDATA,
MLXSW_EMAD_TLV_TYPE_OOBETH,
};
/* OP TLV */
#define MLXSW_EMAD_OP_TLV_LEN 4 /* Length in u32 */
enum {
MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS = 1,
MLXSW_EMAD_OP_TLV_CLASS_IPC = 2,
};
enum mlxsw_emad_op_tlv_status {
MLXSW_EMAD_OP_TLV_STATUS_SUCCESS,
MLXSW_EMAD_OP_TLV_STATUS_BUSY,
MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED,
MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV,
MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED,
MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED,
MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED,
MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER,
MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE,
MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK,
MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR = 0x70,
};
static inline char *mlxsw_emad_op_tlv_status_str(u8 status)
{
switch (status) {
case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
return "operation performed";
case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
return "device is busy";
case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
return "version not supported";
case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
return "unknown TLV";
case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
return "register not supported";
case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
return "class not supported";
case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
return "method not supported";
case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
return "bad parameter";
case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
return "resource not available";
case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
return "acknowledged. retransmit";
case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
return "internal error";
default:
return "*UNKNOWN*";
}
}
enum {
MLXSW_EMAD_OP_TLV_REQUEST,
MLXSW_EMAD_OP_TLV_RESPONSE
};
enum {
MLXSW_EMAD_OP_TLV_METHOD_QUERY = 1,
MLXSW_EMAD_OP_TLV_METHOD_WRITE = 2,
MLXSW_EMAD_OP_TLV_METHOD_SEND = 3,
MLXSW_EMAD_OP_TLV_METHOD_EVENT = 5,
};
/* END TLV */
#define MLXSW_EMAD_END_TLV_LEN 1 /* Length in u32 */
#endif
......@@ -42,6 +42,12 @@
#define MLXSW_PORT_DEFAULT_VID 1
#define MLXSW_PORT_SWID_DISABLED_PORT 255
#define MLXSW_PORT_SWID_ALL_SWIDS 254
#define MLXSW_PORT_SWID_TYPE_ETH 2
#define MLXSW_PORT_MID 0xd000
#define MLXSW_PORT_MAX_PHY_PORTS 0x40
#define MLXSW_PORT_MAX_PORTS MLXSW_PORT_MAX_PHY_PORTS
......@@ -49,4 +55,17 @@
#define MLXSW_PORT_DONT_CARE (MLXSW_PORT_MAX_PORTS)
enum mlxsw_port_admin_status {
MLXSW_PORT_ADMIN_STATUS_UP = 1,
MLXSW_PORT_ADMIN_STATUS_DOWN = 2,
MLXSW_PORT_ADMIN_STATUS_UP_ONCE = 3,
MLXSW_PORT_ADMIN_STATUS_DISABLED = 4,
};
enum mlxsw_reg_pude_oper_status {
MLXSW_PORT_OPER_STATUS_UP = 1,
MLXSW_PORT_OPER_STATUS_DOWN = 2,
MLXSW_PORT_OPER_STATUS_FAILURE = 4, /* Can be set to up again. */
};
#endif /* _MLXSW_PORT_H */
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