-
由 Anusha Srivatsa 提交于
Add defines for DSS_CTL registers. These registers specify the big joiner, splitter, overlap pixels and info regarding compression enabled on left or right branch. v2: - rebase. Remove overlapping defines(James Ausmus) - Rename the register to ICL_DSS_CTL1/2_PIPE_ (manasi) - take pixels as an argument for overlap.(Manasi) v3: - rebase. merge DSS_CTL1/2 introduced in Madhav's patch to avoid confusion (madhav chauhan) - Rename registers in accordance to BSpec (Madhav, Rodrigo) - Add define to conditionally check the buffer target depth (James Ausmus) v4: - remove redundant definitions.(madhav) v5: - Add mask for overlap pixels. - Code Style changes.(Madhav) v6: - Code style changes. (Madhav) Suggested-by: NMadhav Chauhan <madhav.chauhan@intel.com> Cc: Madhav Chauhan <madhav.chauhan@intel.com> cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: James Ausmus <james.ausmus@intel.com> Cc: Gaurav Singh <gaurav.k.singh@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: NAnusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: NJani Nikula <jani.nikula@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/07021336cb87d09e8f97fbff709c4e686d7de536.1540900289.git.jani.nikula@intel.com
8b1b558d