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提交 dfbeb9e8 编写于 作者: W Wayne Lin
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Sync Nuvoton porting. 

1. NUC980 platform: USBH, INPUTCAPTURE, SPINAND.
2. Correct enter-quad-mode routine in board_dec.c.
3. Use RT_ASSERT to catch system-call-exceptions.
上级 ef8b984f
展开全部 隐藏空白更改
内联 并排
Showing with 11207 addition and 565 deletion
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.c
浏览文件 @ dfbeb9e8
......@@ -44,8 +44,10 @@ static rt_uint32_t nu_crc_run(
{
uint32_t u32CalChecksum = 0;
uint32_t i = 0;
rt_err_t result;
rt_mutex_take(&s_CRC_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_CRC_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Configure CRC controller */
CRC_Open(u32OpMode, u32Attr, u32Seed, CRC_CPU_WDATA_8);
......@@ -85,16 +87,22 @@ static rt_uint32_t nu_crc_run(
/* Get checksum value */
u32CalChecksum = CRC_GetChecksum();
rt_mutex_release(&s_CRC_mutex);
result = rt_mutex_release(&s_CRC_mutex);
RT_ASSERT(result == RT_EOK);
return u32CalChecksum;
}
rt_err_t nu_crc_init(void)
{
rt_err_t result;
SYS_ResetModule(CRC_RST);
rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_FIFO);
result = rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_crypto.c
浏览文件 @ dfbeb9e8
......@@ -81,6 +81,8 @@ static volatile int s_SHA_done;
static rt_err_t nu_crypto_init(void)
{
rt_err_t result;
/* Enable Crypto engine interrupt */
NVIC_EnableIRQ(CRPT_IRQn);
......@@ -89,12 +91,19 @@ static rt_err_t nu_crypto_init(void)
SHA_ENABLE_INT(CRPT);
//init cipher mutex
rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_FIFO);
rt_mutex_init(&s_TDES_mutex, NU_HWCRYPTO_TDES_NAME, RT_IPC_FLAG_FIFO);
rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_FIFO);
result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
result = rt_mutex_init(&s_TDES_mutex, NU_HWCRYPTO_TDES_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
#if !defined(BSP_USING_TRNG)
PRNG_ENABLE_INT(CRPT);
rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_FIFO);
result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
#endif
return RT_EOK;
......@@ -146,6 +155,8 @@ static rt_err_t nu_aes_crypt_run(
uint32_t u32DataLen
)
{
rt_err_t result;
uint32_t au32SwapKey[8];
uint32_t au32SwapIV[4];
......@@ -171,7 +182,8 @@ static rt_err_t nu_aes_crypt_run(
au32SwapIV[2] = nu_get32_be(&pu8IV[8]);
au32SwapIV[3] = nu_get32_be(&pu8IV[12]);
rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Using Channel 0
AES_Open(CRPT, 0, bEncrypt, u32OpMode, u32KeySize, AES_IN_OUT_SWAP);
......@@ -186,7 +198,8 @@ static rt_err_t nu_aes_crypt_run(
AES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
while (!s_AES_done) {};
rt_mutex_release(&s_AES_mutex);
result = rt_mutex_release(&s_AES_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
......@@ -195,19 +208,26 @@ static rt_err_t nu_aes_crypt_run(
//Using PRNG instead of TRNG
static void nu_prng_open(uint32_t u32Seed)
{
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Open PRNG 64 bits. But always return 32 bits
PRNG_Open(CRPT, PRNG_KEY_SIZE_64, PRNG_SEED_RELOAD, u32Seed);
rt_mutex_release(&s_PRNG_mutex);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
}
static rt_uint32_t nu_prng_run(void)
{
rt_err_t result;
uint32_t au32RNGValue[2];
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
s_PRNG_done = 0;
PRNG_Start(CRPT);
......@@ -215,7 +235,9 @@ static rt_uint32_t nu_prng_run(void)
PRNG_Read(CRPT, au32RNGValue);
rt_mutex_release(&s_PRNG_mutex);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
return au32RNGValue[0];
}
......@@ -356,6 +378,8 @@ static rt_err_t nu_des_crypt_run(
uint32_t u32DataLen
)
{
rt_err_t result;
uint32_t au32SwapKey[3][2];
uint32_t au32SwapIV[2];
......@@ -373,7 +397,8 @@ static rt_err_t nu_des_crypt_run(
au32SwapIV[0] = nu_get32_be(&pu8IV[0]);
au32SwapIV[1] = nu_get32_be(&pu8IV[4]);
rt_mutex_take(&s_TDES_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_TDES_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Using Channel 0
TDES_Open(CRPT, 0, bEncrypt, (u32OpMode & CRPT_TDES_CTL_TMODE_Msk), u32KeySize, u32OpMode, TDES_IN_OUT_WHL_SWAP);
......@@ -388,7 +413,8 @@ static rt_err_t nu_des_crypt_run(
TDES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
while (!s_TDES_done) {};
rt_mutex_release(&s_TDES_mutex);
result = rt_mutex_release(&s_TDES_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
......@@ -534,7 +560,10 @@ static rt_err_t nu_sha_hash_run(
uint32_t u32DataLen
)
{
rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
uint8_t *pu8SrcAddr = (uint8_t *)pu8InData;
uint32_t u32CopyLen = 0;
......@@ -574,7 +603,10 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
......@@ -602,7 +634,10 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
......@@ -613,7 +648,8 @@ static rt_err_t nu_sha_hash_run(
psSHACtx->u32SHATempBufLen += u32DataLen;
}
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_emac.c
浏览文件 @ dfbeb9e8
......@@ -242,6 +242,8 @@ static void link_monitor(void *param)
static rt_err_t nu_emac_init(rt_device_t dev)
{
rt_err_t result;
nu_emac_t psNuEMAC = (nu_emac_t)dev;
EMAC_Close();
......@@ -254,9 +256,12 @@ static rt_err_t nu_emac_init(rt_device_t dev)
NVIC_SetPriority(EMAC_RX_IRQn, 1);
NVIC_EnableIRQ(EMAC_RX_IRQn);
rt_sem_init(&psNuEMAC->eth_sem, "eth_sem", 0, RT_IPC_FLAG_FIFO);
result = rt_sem_init(&psNuEMAC->eth_sem, "eth_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
result = rt_thread_init(&eth_tid, "eth", link_monitor, (void *)psNuEMAC, eth_stack, sizeof(eth_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
RT_ASSERT(result == RT_EOK);
rt_thread_init(&eth_tid, "eth", link_monitor, (void *)psNuEMAC, eth_stack, sizeof(eth_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
rt_thread_startup(&eth_tid);
#if defined(LWIP_IPV4) && defined(LWIP_IGMP)
......@@ -310,6 +315,7 @@ static rt_err_t nu_emac_control(rt_device_t dev, int cmd, void *args)
static rt_err_t nu_emac_tx(rt_device_t dev, struct pbuf *p)
{
rt_err_t result;
nu_emac_t psNuEMAC = (nu_emac_t)dev;
struct pbuf *q;
rt_uint32_t offset = 0;
......@@ -319,14 +325,15 @@ static rt_err_t nu_emac_tx(rt_device_t dev, struct pbuf *p)
/* Get free TX buffer */
if (buf == RT_NULL)
{
rt_sem_control(&psNuEMAC->eth_sem, RT_IPC_CMD_RESET, 0);
result = rt_sem_control(&psNuEMAC->eth_sem, RT_IPC_CMD_RESET, 0);
RT_ASSERT(result == RT_EOK);
EMAC_CLEAR_INT_FLAG(EMAC, EMAC_INTSTS_TXCPIF_Msk);
EMAC_ENABLE_INT(EMAC, EMAC_INTEN_TXCPIEN_Msk);
do
{
rt_sem_take(&psNuEMAC->eth_sem, 1);
while (rt_sem_take(&psNuEMAC->eth_sem, 10) != RT_EOK) ;
buf = (rt_uint8_t *)EMAC_ClaimFreeTXBuf();
}
while (buf == RT_NULL);
......@@ -440,8 +447,11 @@ void EMAC_TX_IRQHandler(void)
/* Wake-up suspended process to send */
if (EMAC_GET_INT_FLAG(EMAC, EMAC_INTSTS_TXCPIF_Msk))
{
rt_err_t result;
EMAC_DISABLE_INT(EMAC, EMAC_INTEN_TXCPIEN_Msk);
rt_sem_release(&nu_emac_dev.eth_sem);
result = rt_sem_release(&nu_emac_dev.eth_sem);
RT_ASSERT(result == RT_EOK);
}
if (EMAC_GET_INT_FLAG(EMAC, EMAC_INTSTS_TXBEIF_Msk))
......
bsp/nuvoton/libraries/m480/rtt_port/drv_epwm.c
浏览文件 @ dfbeb9e8
......@@ -228,41 +228,4 @@ int rt_hw_epwm_init(void)
INIT_DEVICE_EXPORT(rt_hw_epwm_init);
#ifdef RT_USING_FINSH
#include <finsh.h>
#ifdef FINSH_USING_MSH
static int pwm_get(int argc, char **argv)
{
int result = 0;
struct rt_device_pwm *device = RT_NULL;
struct rt_pwm_configuration configuration = {0};
if (argc != 3)
{
rt_kprintf("Usage: pwm_get pwm1 1\n");
result = -RT_ERROR;
goto _exit;
}
device = (struct rt_device_pwm *)rt_device_find(argv[1]);
if (!device)
{
result = -RT_EIO;
goto _exit;
}
configuration.channel = atoi(argv[2]);
result = rt_device_control(&device->parent, PWM_CMD_GET, &configuration);
_exit:
return result;
}
MSH_CMD_EXPORT(pwm_get, pwm_get epwm1 1);
#endif /* FINSH_USING_MSH */
#endif /* RT_USING_FINSH */
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c
浏览文件 @ dfbeb9e8
......@@ -54,10 +54,15 @@ const struct fal_flash_dev Onchip_ldrom_flash = { "OnChip_LDROM", FMC_LDROM_BASE
int nu_fmc_read(long addr, uint8_t *buf, size_t size)
{
rt_err_t result;
size_t read_size = 0;
uint32_t addr_end = addr + size;
uint32_t isp_rdata = 0;
rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
SYS_UnlockReg();
if (NU_GET_LSB2BIT(addr))
......@@ -87,7 +92,9 @@ int nu_fmc_read(long addr, uint8_t *buf, size_t size)
}
SYS_LockReg();
rt_mutex_release(g_mutex_fmc);
result = rt_mutex_release(g_mutex_fmc);
RT_ASSERT(result == RT_EOK);
return read_size;
}
......@@ -97,8 +104,11 @@ int nu_fmc_write(long addr, const uint8_t *buf, size_t size)
size_t write_size = 0;
uint32_t addr_end = addr + size;
uint32_t isp_rdata = 0;
rt_err_t result;
result = rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
SYS_UnlockReg();
if (addr < FMC_APROM_END)
......@@ -144,9 +154,12 @@ int nu_fmc_write(long addr, const uint8_t *buf, size_t size)
FMC_DISABLE_AP_UPDATE();
FMC_DISABLE_LD_UPDATE();
Exit2:
SYS_LockReg();
rt_mutex_release(g_mutex_fmc);
result = rt_mutex_release(g_mutex_fmc);
RT_ASSERT(result == RT_EOK);
return write_size;
......@@ -157,12 +170,12 @@ int nu_fmc_erase(long addr, size_t size)
size_t erased_size = 0;
uint32_t addrptr;
uint32_t addr_end = addr + size;
rt_err_t result;
#if defined(NU_SUPPORT_NONALIGN)
uint8_t *page_sdtemp = RT_NULL;
uint8_t *page_edtemp = RT_NULL;
addrptr = addr & (FMC_FLASH_PAGE_SIZE - 1);
if (addrptr)
{
......@@ -205,7 +218,9 @@ int nu_fmc_erase(long addr, size_t size)
}
#endif
rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
SYS_UnlockReg();
if (addr <= FMC_APROM_END)
......@@ -233,7 +248,9 @@ Exit1:
FMC_DISABLE_LD_UPDATE();
Exit2:
SYS_LockReg();
rt_mutex_release(g_mutex_fmc);
result = rt_mutex_release(g_mutex_fmc);
RT_ASSERT(result == RT_EOK);
#if defined(NU_SUPPORT_NONALIGN)
......@@ -315,6 +332,7 @@ static int nu_fmc_init(void)
SYS_LockReg();
g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO);
RT_ASSERT(g_mutex_fmc != RT_NULL);
/* PKG_USING_FAL */
#if defined(PKG_USING_FAL)
......
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.c
浏览文件 @ dfbeb9e8
......@@ -256,11 +256,13 @@ void nu_pdma_channel_terminate(int i32ChannID)
int i;
uint32_t u32EnabledChans;
int ch_mask = 0;
rt_err_t result;
if (!(nu_pdma_chn_mask & (1 << i32ChannID)))
goto exit_pdma_channel_terminate;
rt_mutex_take(g_mutex_res, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_res, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
// Suspend all channels.
u32EnabledChans = nu_pdma_chn_mask & NU_PDMA_CH_Msk;
......@@ -299,7 +301,8 @@ void nu_pdma_channel_terminate(int i32ChannID)
u32EnabledChans &= ~ch_mask;
}
rt_mutex_release(g_mutex_res);
result = rt_mutex_release(g_mutex_res);
RT_ASSERT(result == RT_EOK);
exit_pdma_channel_terminate:
......@@ -552,7 +555,7 @@ rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u3
goto exit_nu_pdma_desc_setup;
else if ((u32AddrSrc % (u32DataWidth / 8)) || (u32AddrDst % (u32DataWidth / 8)))
goto exit_nu_pdma_desc_setup;
else if ( i32TransferCnt > NU_PDMA_MAX_TXCNT )
else if (i32TransferCnt > NU_PDMA_MAX_TXCNT)
goto exit_nu_pdma_desc_setup;
psPeriphCtl = &nu_pdma_chn_arr[i32ChannID - NU_PDMA_CH_Pos].m_spPeripCtl;
......@@ -625,11 +628,13 @@ static void nu_pdma_sgtbls_token_free(nu_pdma_desc_t psSgtbls)
rt_err_t nu_pdma_sgtbls_allocate(nu_pdma_desc_t *ppsSgtbls, int num)
{
int i, j, idx;
rt_err_t result;
RT_ASSERT(ppsSgtbls != NULL);
RT_ASSERT(num <= NU_PDMA_SG_TBL_MAXSIZE);
rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
for (i = 0; i < num; i++)
{
......@@ -644,7 +649,8 @@ rt_err_t nu_pdma_sgtbls_allocate(nu_pdma_desc_t *ppsSgtbls, int num)
ppsSgtbls[i] = (nu_pdma_desc_t)&nu_pdma_sgtbl_arr[idx];
}
rt_mutex_release(g_mutex_sg);
result = rt_mutex_release(g_mutex_sg);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
......@@ -660,18 +666,22 @@ fail_nu_pdma_sgtbls_allocate:
ppsSgtbls[j] = NULL;
}
rt_mutex_release(g_mutex_sg);
result = rt_mutex_release(g_mutex_sg);
RT_ASSERT(result == RT_EOK);
return -RT_ERROR;
}
void nu_pdma_sgtbls_free(nu_pdma_desc_t *ppsSgtbls, int num)
{
int i;
rt_err_t result;
RT_ASSERT(ppsSgtbls != NULL);
RT_ASSERT(num <= NU_PDMA_SG_TBL_MAXSIZE);
rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
for (i = 0; i < num; i++)
{
......@@ -682,7 +692,8 @@ void nu_pdma_sgtbls_free(nu_pdma_desc_t *ppsSgtbls, int num)
ppsSgtbls[i] = NULL;
}
rt_mutex_release(g_mutex_sg);
result = rt_mutex_release(g_mutex_sg);
RT_ASSERT(result == RT_EOK);
}
static rt_err_t nu_pdma_sgtbls_valid(nu_pdma_desc_t head)
......@@ -870,6 +881,7 @@ static void nu_pdma_memfun_actor_init(void)
if (-(RT_ERROR) != (nu_pdma_memfun_actor_arr[i].m_i32ChannID = nu_pdma_channel_allocate(PDMA_MEM)))
{
nu_pdma_memfun_actor_arr[i].m_psSemMemFun = rt_sem_create("memactor_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_arr[i].m_psSemMemFun != RT_NULL);
}
else
break;
......@@ -878,16 +890,23 @@ static void nu_pdma_memfun_actor_init(void)
{
nu_pdma_memfun_actor_maxnum = i;
nu_pdma_memfun_actor_mask = ~(((1 << i) - 1));
nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_sem != RT_NULL);
nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_lock != RT_NULL);
}
}
static void nu_pdma_memfun_cb(void *pvUserData, uint32_t u32Events)
{
rt_err_t result;
nu_pdma_memfun_actor_t psMemFunActor = (nu_pdma_memfun_actor_t)pvUserData;
psMemFunActor->m_u32Result = u32Events;
rt_sem_release(psMemFunActor->m_psSemMemFun);
result = rt_sem_release(psMemFunActor->m_psSemMemFun);
RT_ASSERT(result == RT_EOK);
}
static int nu_pdma_memfun_employ(void)
......@@ -897,7 +916,10 @@ static int nu_pdma_memfun_employ(void)
/* Headhunter */
if (nu_pdma_memfun_actor_pool_sem && (rt_sem_take(nu_pdma_memfun_actor_pool_sem, RT_WAITING_FOREVER) == RT_EOK))
{
rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Find the position of first '0' in nu_pdma_memfun_actor_mask. */
idx = nu_cto(nu_pdma_memfun_actor_mask);
if (idx != 32)
......@@ -908,7 +930,8 @@ static int nu_pdma_memfun_employ(void)
{
idx = -1;
}
rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
result = rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
RT_ASSERT(result == RT_EOK);
}
return idx;
......@@ -924,6 +947,8 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
while (1)
{
rt_err_t result;
/* Employ actor */
if ((idx = nu_pdma_memfun_employ()) < 0)
continue;
......@@ -952,7 +977,8 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
0);
/* Wait it done. */
rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
result = rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Give result if get NU_PDMA_EVENT_TRANSFER_DONE.*/
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_TRANSFER_DONE)
......@@ -976,12 +1002,16 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
}
while (u32TransferCnt > 0);
rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
result = rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
nu_pdma_memfun_actor_mask &= ~(1 << idx);
rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
result = rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
RT_ASSERT(result == RT_EOK);
/* Fire actor */
rt_sem_release(nu_pdma_memfun_actor_pool_sem);
result = rt_sem_release(nu_pdma_memfun_actor_pool_sem);
RT_ASSERT(result == RT_EOK);
break;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_qspi.c
浏览文件 @ dfbeb9e8
......@@ -61,7 +61,7 @@ static struct nu_spi nu_qspi_arr [] =
.name = "qspi0",
.spi_base = (SPI_T *)QSPI0,
#if defined(BSP_USING_QSPI_PDMA)
#if defined(BSP_USING_SPI_PDMA)
#if defined(BSP_USING_QSPI0_PDMA)
.pdma_perp_tx = PDMA_QSPI0_TX,
.pdma_perp_rx = PDMA_QSPI0_RX,
......@@ -77,7 +77,7 @@ static struct nu_spi nu_qspi_arr [] =
.name = "qspi1",
.spi_base = (SPI_T *)QSPI1,
#if defined(BSP_USING_QSPI_PDMA)
#if defined(BSP_USING_SPI_PDMA)
#if defined(BSP_USING_QSPI1_PDMA)
.pdma_perp_tx = PDMA_QSPI1_TX,
.pdma_perp_rx = PDMA_QSPI1_RX,
......
bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c
浏览文件 @ dfbeb9e8
......@@ -270,11 +270,13 @@ static rt_size_t nu_sdh_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_siz
{
rt_uint32_t ret = 0;
nu_sdh_t sdh = (nu_sdh_t)dev;
rt_err_t result;
RT_ASSERT(dev != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
result = rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Check alignment. */
if (((uint32_t)buffer & 0x03) != 0)
......@@ -315,7 +317,8 @@ exit_nu_sdh_read:
sdh->pbuf = RT_NULL;
}
rt_sem_release(&sdh->lock);
result = rt_sem_release(&sdh->lock);
RT_ASSERT(result == RT_EOK);
if (ret == Successful)
return blk_nb;
......@@ -329,11 +332,13 @@ static rt_size_t nu_sdh_write(rt_device_t dev, rt_off_t pos, const void *buffer,
{
rt_uint32_t ret = 0;
nu_sdh_t sdh = (nu_sdh_t)dev;
rt_err_t result;
RT_ASSERT(dev != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
result = rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Check alignment. */
if (((uint32_t)buffer & 0x03) != 0)
......@@ -372,7 +377,8 @@ exit_nu_sdh_write:
sdh->pbuf = RT_NULL;
}
rt_sem_release(&sdh->lock);
result = rt_sem_release(&sdh->lock);
RT_ASSERT(result == RT_EOK);
if (ret == Successful) return blk_nb;
......@@ -427,11 +433,13 @@ static int rt_hw_sdh_init(void)
/* Private */
nu_sdh_arr[i].dev.user_data = (void *)&nu_sdh_arr[i];
rt_sem_init(&nu_sdh_arr[i].lock, "sdhlock", 1, RT_IPC_FLAG_FIFO);
ret = rt_sem_init(&nu_sdh_arr[i].lock, "sdhlock", 1, RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
SDH_Open(nu_sdh_arr[i].base, CardDetect_From_GPIO);
nu_sdh_arr[i].pbuf = RT_NULL;
ret = rt_device_register(&nu_sdh_arr[i].dev, nu_sdh_arr[i].name, flags);
RT_ASSERT(ret == RT_EOK);
}
......@@ -620,7 +628,11 @@ static void sdh_hotplugger(void *param)
int mnt_init_sdcard_hotplug(void)
{
rt_thread_init(&sdh_tid, "hotplug", sdh_hotplugger, NULL, sdh_stack, sizeof(sdh_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
rt_err_t result;
result = rt_thread_init(&sdh_tid, "hotplug", sdh_hotplugger, NULL, sdh_stack, sizeof(sdh_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
RT_ASSERT(result == RT_EOK);
rt_thread_startup(&sdh_tid);
return 0;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c
浏览文件 @ dfbeb9e8
......@@ -241,11 +241,13 @@ exit_nu_spi_bus_configure:
#if defined(BSP_USING_SPI_PDMA)
static void nu_pdma_spi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
{
rt_err_t result;
struct nu_spi *spi_bus = (struct nu_spi *)pvUserData;
RT_ASSERT(spi_bus != RT_NULL);
rt_sem_release(spi_bus->m_psSemBus);
result = rt_sem_release(spi_bus->m_psSemBus);
RT_ASSERT(result == RT_EOK);
}
static rt_err_t nu_pdma_spi_rx_config(struct nu_spi *spi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
{
......@@ -362,7 +364,8 @@ static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *sen
SPI_TRIGGER_TX_RX_PDMA(spi_base);
/* Wait RX-PDMA transfer done */
rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
result = rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Stop TX/RX DMA transfer. */
SPI_DISABLE_TX_RX_PDMA(spi_base);
......@@ -391,6 +394,7 @@ rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus)
}
spi_bus->m_psSemBus = rt_sem_create("spibus_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(spi_bus->m_psSemBus != RT_NULL);
return RT_EOK;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_spii2s.c
浏览文件 @ dfbeb9e8
......@@ -243,10 +243,11 @@ exit_nu_spii2s_capacity_check:
static rt_err_t nu_spii2s_dai_setup(nu_i2s_t psNuSPII2s, struct rt_audio_configure *pconfig)
{
rt_err_t result = RT_EOK;
nu_acodec_ops_t pNuACodecOps = RT_NULL;
nu_acodec_ops_t pNuACodecOps;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
pNuACodecOps = psNuSPII2s->AcodecOps;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
/* Open SPII2S */
if (nu_spii2s_capacity_check(pconfig) == RT_TRUE)
......@@ -283,7 +284,7 @@ static rt_err_t nu_spii2s_dai_setup(nu_i2s_t psNuSPII2s, struct rt_audio_configu
/* Set MCLK and enable MCLK */
SPII2S_EnableMCLK(spii2s_base, __HXT);
/* Set unmute */
/* Set un-mute */
if (pNuACodecOps->nu_acodec_mixer_control)
pNuACodecOps->nu_acodec_mixer_control(AUDIO_MIXER_MUTE, RT_FALSE);
}
......@@ -298,14 +299,11 @@ exit_nu_spii2s_dai_setup:
static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
nu_i2s_t psNuSPII2s;
nu_acodec_ops_t pNuACodecOps = RT_NULL;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
nu_acodec_ops_t pNuACodecOps;
RT_ASSERT(audio != RT_NULL);
RT_ASSERT(caps != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
pNuACodecOps = psNuSPII2s->AcodecOps;
......@@ -367,6 +365,10 @@ static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio
} // switch (caps->sub_type)
break;
default:
result = -RT_ERROR;
break;
} // switch (caps->main_type)
return result;
......@@ -375,16 +377,14 @@ static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio
static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
nu_i2s_t psNuSPII2s;
nu_acodec_ops_t pNuACodecOps = RT_NULL;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
nu_acodec_ops_t pNuACodecOps;
int stream = -1;
RT_ASSERT(audio != RT_NULL);
RT_ASSERT(caps != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
pNuACodecOps = psNuSPII2s->AcodecOps;
switch (caps->main_type)
......@@ -394,7 +394,6 @@ static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_aud
psNuSPII2s->AcodecOps->nu_acodec_mixer_control(caps->sub_type, caps->udata.value);
break;
case AUDIO_TYPE_INPUT:
stream = AUDIO_STREAM_RECORD;
case AUDIO_TYPE_OUTPUT:
......@@ -445,6 +444,7 @@ static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_aud
}
}
break;
default:
result = -RT_ERROR;
break;
......@@ -456,12 +456,10 @@ static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_aud
static rt_err_t nu_spii2s_init(struct rt_audio_device *audio)
{
rt_err_t result = RT_EOK;
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(audio != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
/* Reset this module */
SYS_ResetModule(psNuSPII2s->i2s_rst);
......@@ -470,13 +468,12 @@ static rt_err_t nu_spii2s_init(struct rt_audio_device *audio)
static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream)
{
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
SPI_T *spii2s_base;
RT_ASSERT(audio != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
/* Restart all: SPII2S and codec. */
nu_spii2s_stop(audio, stream);
......@@ -512,6 +509,8 @@ static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream)
LOG_I("Start record.");
}
break;
default:
return -RT_ERROR;
}
return RT_EOK;
......@@ -519,14 +518,13 @@ static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream)
static rt_err_t nu_spii2s_stop(struct rt_audio_device *audio, int stream)
{
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
nu_i2s_dai_t psNuSPII2sDai = RT_NULL;
SPI_T *spii2s_base;
RT_ASSERT(audio != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
switch (stream)
{
......@@ -574,13 +572,11 @@ static rt_err_t nu_spii2s_stop(struct rt_audio_device *audio, int stream)
static void nu_spii2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
{
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(audio != RT_NULL);
RT_ASSERT(info != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
info->buffer = (rt_uint8_t *)psNuSPII2s->i2s_dais[NU_I2S_DAI_PLAYBACK].fifo ;
info->total_size = NU_I2S_DMA_FIFO_SIZE;
info->block_size = NU_I2S_DMA_BUF_BLOCK_SIZE;
......@@ -618,12 +614,12 @@ nu_hw_spii2s_pdma_allocate:
int rt_hw_spii2s_init(void)
{
int i = 0, j = 0;
int j = 0;
nu_i2s_dai_t psNuSPII2sDai;
for (j = (SPII2S_START + 1); j < SPII2S_CNT; j++)
{
int i = 0;
for (i = 0; i < NU_I2S_DAI_CNT; i++)
{
uint8_t *pu8ptr = rt_malloc(NU_I2S_DMA_FIFO_SIZE);
......
bsp/nuvoton/libraries/m480/rtt_port/drv_timer_capture.c
浏览文件 @ dfbeb9e8
......@@ -72,7 +72,7 @@ void timer_interrupt_handler(nu_capture_t *nu_timer_capture)
{
TIMER_ClearCaptureIntFlag(nu_timer_capture->timer);
/* Frist event is rising edge */
/* First event is rising edge */
if (nu_timer_capture->first_edge == RT_TRUE)
{
nu_timer_capture->first_edge = RT_FALSE;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.c
浏览文件 @ dfbeb9e8
......@@ -27,8 +27,10 @@ static int s_i32TRNGEnable = 0;
static rt_uint32_t nu_trng_run(void)
{
uint32_t u32RNGValue;
rt_err_t result;
rt_mutex_take(&s_TRNG_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_TRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
TRNG_Open();
......@@ -38,13 +40,18 @@ static rt_uint32_t nu_trng_run(void)
u32RNGValue = rand();
}
rt_mutex_release(&s_TRNG_mutex);
result = rt_mutex_release(&s_TRNG_mutex);
RT_ASSERT(result == RT_EOK);
return u32RNGValue;
}
rt_err_t nu_trng_init(void)
{
rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_FIFO);
rt_err_t result;
result = rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0x0)
{
......
bsp/nuvoton/libraries/m480/rtt_port/drv_ui2c.c
浏览文件 @ dfbeb9e8
......@@ -22,6 +22,7 @@
#define DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL DBG_INFO
#define DBG_COLOR
#include <rtdbg.h>
#define SLV_10BIT_ADDR (0x1E<<2) //1111+0xx+r/w
......@@ -382,4 +383,4 @@ int rt_hw_ui2c_init(void)
INIT_DEVICE_EXPORT(rt_hw_ui2c_init);
#endif //#if (defined(BSP_USING_UI2C) && defined(RT_USING_I2C))
#endif //#if defined(BSP_USING_UI2C)
bsp/nuvoton/libraries/m480/rtt_port/drv_usbd.c
浏览文件 @ dfbeb9e8
......@@ -288,7 +288,7 @@ __STATIC_INLINE void _USBD_IRQHandler(void)
}
else
{
/* USB Un-plug */
/* USB Unplug */
USBD_DISABLE_USB();
rt_usbd_disconnect_handler(&_rt_obj_udc);
}
......@@ -447,7 +447,6 @@ void USBD_IRQHandler(void)
_USBD_IRQHandler();
/* leave interrupt */
rt_interrupt_leave();
}
......@@ -523,7 +522,7 @@ int nu_usbd_register(void)
_rt_obj_udc.parent.user_data = &nu_usbd;
_rt_obj_udc.ops = &_udc_ops;
/* Register endpoint infomation */
/* Register endpoint information */
_rt_obj_udc.ep_pool = _ep_pool;
_rt_obj_udc.ep0.id = &_ep_pool[0];
......
bsp/nuvoton/libraries/m480/rtt_port/drv_usbhost.c
浏览文件 @ dfbeb9e8
......@@ -446,7 +446,6 @@ static void int_xfer_done_cb(UTR_T *psUTR)
free_utr(psUTR);
}
static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes, int timeouts)
{
S_NU_RH_PORT_CTRL *psPortCtrl;
......@@ -505,7 +504,6 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
}
}
//others xfer
rt_completion_init(&(psPortDev->utr_completion));
......@@ -694,7 +692,6 @@ static void nu_hcd_disconnect_callback(
rt_usbh_root_hub_disconnect_handler(s_sUSBHDev.uhcd, port_index);
}
/* USB host operations -----------------------------------------------------------*/
static struct uhcd_ops nu_uhcd_ops =
{
......@@ -706,7 +703,7 @@ static struct uhcd_ops nu_uhcd_ops =
static rt_err_t nu_hcd_init(rt_device_t device)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
struct nu_usbh_dev *pNuUSBHDev = (struct nu_usbh_dev *)device;
usbh_core_init();
//install connect/disconnect callback
......@@ -716,11 +713,11 @@ static rt_err_t nu_hcd_init(rt_device_t device)
//create thread for polling usbh port status
/* create usb hub thread */
pNuUSBHDev->polling_thread = rt_thread_create("usbh_drv", nu_usbh_rh_thread_entry, RT_NULL,
NU_USBH_THREAD_STACK_SIZE, 8, 20);
if ( pNuUSBHDev->polling_thread != RT_NULL)
NU_USBH_THREAD_STACK_SIZE, 8, 20);
if (pNuUSBHDev->polling_thread != RT_NULL)
{
/* startup usb host thread */
rt_thread_startup( pNuUSBHDev->polling_thread );
rt_thread_startup(pNuUSBHDev->polling_thread);
}
else
{
......@@ -751,15 +748,20 @@ uint32_t usbh_tick_from_millisecond(uint32_t msec)
/* device pm suspend() entry. */
static int usbhost_pm_suspend(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
rt_err_t result;
struct nu_usbh_dev *pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
RT_ASSERT(pNuUSBHDev != RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
pNuUSBHDev->polling_thread->stat = RT_THREAD_READY;
rt_thread_suspend(pNuUSBHDev->polling_thread);
result = rt_thread_suspend(pNuUSBHDev->polling_thread);
RT_ASSERT(result == RT_EOK);
break;
default:
......@@ -772,14 +774,16 @@ static int usbhost_pm_suspend(const struct rt_device *device, rt_uint8_t mode)
/* device pm resume() entry. */
static void usbhost_pm_resume(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
rt_err_t result;
struct nu_usbh_dev *pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev != RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
rt_thread_resume(pNuUSBHDev->polling_thread);
result = rt_thread_resume(pNuUSBHDev->polling_thread);
RT_ASSERT(result == RT_EOK);
break;
default:
......@@ -846,7 +850,7 @@ int nu_usbh_register(void)
#if defined(RT_USING_PM)
rt_pm_device_register(&uhcd->parent, &device_pm_ops);
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(nu_usbh_register);
......
bsp/nuvoton/libraries/m480/rtt_port/drv_uspi.c
浏览文件 @ dfbeb9e8
......@@ -12,6 +12,14 @@
#include <rtconfig.h>
#if defined(BSP_USING_USPI)
#define LOG_TAG "drv.uspi"
#define DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL DBG_INFO
#define DBG_COLOR
#include <rtdbg.h>
#include <rthw.h>
#include <rtdevice.h>
#include <rtdef.h>
......@@ -56,7 +64,8 @@ typedef struct nu_uspi *uspi_t;
/* Private functions ------------------------------------------------------------*/
static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
static rt_uint32_t nu_uspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message);
static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus, uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
static int nu_uspi_register_bus(struct nu_uspi *uspi_bus, const char *name);
static void nu_uspi_drain_rxfifo(USPI_T *uspi_base);
......@@ -160,7 +169,7 @@ static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device,
u32BusClock = USPI_SetBusClock(uspi_bus->uspi_base, configuration->max_hz);
if (configuration->max_hz > u32BusClock)
{
rt_kprintf("%s clock max frequency is %dHz (!= %dHz)\n", uspi_bus->name, u32BusClock, configuration->max_hz);
LOG_W("%s clock max frequency is %dHz (!= %dHz)\n", uspi_bus->name, u32BusClock, configuration->max_hz);
configuration->max_hz = u32BusClock;
}
......@@ -194,7 +203,7 @@ static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device,
}
}
/* Clear SPI RX FIFO */
/* Clear USPI RX FIFO */
nu_uspi_drain_rxfifo(uspi_bus->uspi_base);
exit_nu_uspi_bus_configure:
......@@ -205,16 +214,18 @@ exit_nu_uspi_bus_configure:
#if defined(BSP_USING_USPI_PDMA)
static void nu_pdma_uspi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
{
struct nu_uspi *uspi_bus;
uspi_bus = (struct nu_uspi *)pvUserData;
rt_err_t result;
struct nu_uspi *uspi_bus = (struct nu_uspi *)pvUserData;
RT_ASSERT(uspi_bus != RT_NULL);
rt_sem_release(uspi_bus->m_psSemBus);
result = rt_sem_release(uspi_bus->m_psSemBus);
RT_ASSERT(result == RT_EOK);
}
static rt_err_t nu_pdma_uspi_rx_config(struct nu_uspi *uspi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
{
rt_err_t result = RT_ERROR;
rt_err_t result;
rt_uint8_t *dst_addr = NULL;
nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
......@@ -263,7 +274,7 @@ exit_nu_pdma_uspi_rx_config:
static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word)
{
rt_err_t result = RT_ERROR;
rt_err_t result;
rt_uint8_t *src_addr = NULL;
nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
......@@ -304,11 +315,11 @@ exit_nu_pdma_uspi_tx_config:
/**
* SPI PDMA transfer
*/
* USPI PDMA transfer
**/
static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word)
{
rt_err_t result = RT_ERROR;
rt_err_t result;
/* Get base address of uspi register */
USPI_T *uspi_base = uspi_bus->uspi_base;
......@@ -322,7 +333,8 @@ static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *
USPI_TRIGGER_TX_RX_PDMA(uspi_base);
/* Wait PDMA transfer done */
rt_sem_take(uspi_bus->m_psSemBus, RT_WAITING_FOREVER);
result = rt_sem_take(uspi_bus->m_psSemBus, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Stop DMA TX/RX transfer */
USPI_DISABLE_TX_RX_PDMA(uspi_base);
......@@ -345,6 +357,7 @@ static rt_err_t nu_hw_uspi_pdma_allocate(struct nu_uspi *uspi_bus)
}
uspi_bus->m_psSemBus = rt_sem_create("uspibus_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(uspi_bus->m_psSemBus != RT_NULL);
return RT_EOK;
......@@ -373,10 +386,10 @@ static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per
// Read RX data
if (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
{
uint32_t val;
// Read data from USPI RX FIFO
switch (bytes_per_word)
{
uint32_t val;
case 2:
val = USPI_READ_RX(uspi_base);
nu_set16_le(recv_addr, val);
......@@ -385,6 +398,7 @@ static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per
*recv_addr = USPI_READ_RX(uspi_base);
break;
default:
LOG_E("Data length is not supported.\n");
break;
}
size = bytes_per_word;
......@@ -397,7 +411,7 @@ static int nu_uspi_write(USPI_T *uspi_base, const uint8_t *send_addr, uint8_t by
// Wait USPI TX send data
while (USPI_GET_TX_FULL_FLAG(uspi_base));
// Input data to SPI TX
// Input data to USPI TX
switch (bytes_per_word)
{
case 2:
......@@ -407,6 +421,7 @@ static int nu_uspi_write(USPI_T *uspi_base, const uint8_t *send_addr, uint8_t by
USPI_WRITE_TX(uspi_base, *((uint8_t *)send_addr));
break;
default:
LOG_E("Data length is not supported.\n");
break;
}
......@@ -414,8 +429,8 @@ static int nu_uspi_write(USPI_T *uspi_base, const uint8_t *send_addr, uint8_t by
}
/**
* @brief SPI bus polling
* @param dev : The pointer of the specified SPI module.
* @brief USPI bus polling
* @param dev : The pointer of the specified USPI module.
* @param send_addr : Source address
* @param recv_addr : Destination address
* @param length : Data length
......@@ -440,10 +455,10 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
uspi_bus->dummy = 0;
while (length > 0)
{
/* Input data to SPI TX FIFO */
/* Input data to USPI TX FIFO */
length -= nu_uspi_write(uspi_base, (const uint8_t *)&uspi_bus->dummy, bytes_per_word);
/* Read data from RX FIFO */
/* Read data from USPI RX FIFO */
while (USPI_GET_RX_EMPTY_FLAG(uspi_base));
recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
}
......@@ -453,20 +468,20 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
{
while (length > 0)
{
/* Input data to SPI TX FIFO */
/* Input data to USPI TX FIFO */
send_addr += nu_uspi_write(uspi_base, send_addr, bytes_per_word);
length -= bytes_per_word;
/* Read data from RX FIFO */
/* Read data from USPI RX FIFO */
while (USPI_GET_RX_EMPTY_FLAG(uspi_base));
recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
}
} // else
/* Wait RX or drain RX-FIFO */
/* Wait USPI RX or drain USPI RX-FIFO */
if (recv_addr)
{
// Wait SPI transmission done
// Wait USPI transmission done
while (USPI_IS_BUSY(uspi_base))
{
while (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
......@@ -482,7 +497,7 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
}
else
{
/* Clear SPI RX FIFO */
/* Clear USPI RX FIFO */
nu_uspi_drain_rxfifo(uspi_base);
}
}
......@@ -490,10 +505,10 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
static void nu_uspi_transfer(struct nu_uspi *uspi_bus, uint8_t *tx, uint8_t *rx, int length, uint8_t bytes_per_word)
{
#if defined(BSP_USING_USPI_PDMA)
/* DMA transfer constrains */
/* PDMA transfer constrains */
if ((uspi_bus->pdma_chanid_rx >= 0) &&
!((uint32_t)tx % bytes_per_word) &&
!((uint32_t)rx % bytes_per_word))
(!((uint32_t)tx % bytes_per_word)) &&
(!((uint32_t)rx % bytes_per_word)))
nu_uspi_pdma_transmit(uspi_bus, tx, rx, length, bytes_per_word);
else
nu_uspi_transmission_with_poll(uspi_bus, tx, rx, length, bytes_per_word);
......@@ -519,7 +534,7 @@ static rt_uint32_t nu_uspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
if ((message->length % bytes_per_word) != 0)
{
/* Say bye. */
rt_kprintf("%s: error payload length(%d%%%d != 0).\n", uspi_bus->name, message->length, bytes_per_word);
LOG_E("%s: error payload length(%d%%%d != 0).\n", uspi_bus->name, message->length, bytes_per_word);
return 0;
}
......@@ -578,7 +593,7 @@ static int rt_hw_uspi_init(void)
{
if (nu_hw_uspi_pdma_allocate(&nu_uspi_arr[i]) != RT_EOK)
{
rt_kprintf("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_uspi_arr[i].name);
LOG_E("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_uspi_arr[i].name);
}
}
#endif
......
bsp/nuvoton/libraries/m480/rtt_port/drv_uuart.c
浏览文件 @ dfbeb9e8
......@@ -484,7 +484,7 @@ static int nu_hw_uuart_dma_allocate(nu_uuart_t puuart)
static rt_err_t nu_uuart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
rt_err_t result = RT_EOK;
rt_uint32_t flag;
rt_uint32_t flag = 0;
rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
RT_ASSERT(serial != RT_NULL);
......
bsp/nuvoton/libraries/nu_packages/AudioCodec/audio_test.c
浏览文件 @ dfbeb9e8
......@@ -23,10 +23,10 @@
- For record function: Run it w/o parameter.
- For replay function: Run it with parameter.
*/
static void audio_test(int argc, char **argv)
static int audio_test(int argc, char **argv)
{
#define DEF_MAX_ARGV_NUM 8
int smplrate[] = {8000, 11025, 16000, 22050, 32000, 44100, 48000};
int smplrate[] = {8000, 16000, 44100, 48000};
int smplbit[] = {16};
int chnum[] = {1, 2};
struct wavrecord_info info;
......@@ -74,6 +74,8 @@ static void audio_test(int argc, char **argv)
} // k
} // j
} // i
return 0;
}
#ifdef FINSH_USING_MSH
......
bsp/nuvoton/libraries/nu_packages/Demo/usbd_cdc_vcom_echo.c
浏览文件 @ dfbeb9e8
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-1-10 Wayne First version
*
******************************************************************************/
#include <rtthread.h>
#if defined(RT_USB_DEVICE_CDC) && (defined(BSP_USING_USBD) || defined(BSP_USING_HSUSBD))
......@@ -6,7 +18,11 @@ static struct rt_semaphore rx_sem;
static rt_err_t uart_input(rt_device_t dev, rt_size_t size)
{
rt_sem_release(&rx_sem);
rt_err_t result = 0;
result = rt_sem_release(&rx_sem);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
......@@ -21,10 +37,8 @@ static void serial_thread_entry(void *parameter)
{
if (rt_sem_take(&rx_sem, 3 * RT_TICK_PER_SECOND) == -RT_ETIMEOUT)
{
time_t now;
/* output current time */
now = time(RT_NULL);
rt_snprintf(szStr, sizeof(szStr), "%.*s\n", 25, ctime(&now));
/* output current tick */
rt_snprintf(szStr, sizeof(szStr), "%d\n", rt_tick_get());
rt_device_write(serial, 0, &szStr[0], rt_strlen(szStr));
continue;
}
......@@ -35,7 +49,7 @@ static void serial_thread_entry(void *parameter)
static int vcom_echo_init(void)
{
int err = 0;
rt_err_t result = 0;
rt_thread_t thread;
rt_device_t serial;
......@@ -45,25 +59,33 @@ static int vcom_echo_init(void)
rt_kprintf("find failed!\n");
return RT_ERROR;
}
err = rt_device_init(serial);
if (err)
result = rt_device_init(serial);
if (result)
{
rt_kprintf("find failed!\n");
return -RT_ERROR;
rt_kprintf("init failed!\n");
return -1;
}
result = rt_device_open(serial, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX/* | RT_DEVICE_FLAG_DMA_TX */);
if (result)
{
rt_kprintf("open failed!\n");
return -1;
}
err = rt_device_open(serial, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX/* | RT_DEVICE_FLAG_DMA_TX */);
rt_sem_init(&rx_sem, "rx_sem", 0, RT_IPC_FLAG_FIFO);
result = rt_sem_init(&rx_sem, "rx_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
rt_device_set_rx_indicate(serial, uart_input);
result = rt_device_set_rx_indicate(serial, uart_input);
RT_ASSERT(result == RT_EOK);
thread = rt_thread_create("serial", serial_thread_entry, (void *)serial, 1024, 25, 10);
if (thread != RT_NULL)
{
rt_thread_startup(thread);
result = rt_thread_startup(thread);
RT_ASSERT(result == RT_EOK);
}
return RT_EOK;
return 0;
}
INIT_APP_EXPORT(vcom_echo_init);
......
bsp/nuvoton/libraries/nu_packages/Demo/usbd_hid_dance_mouse.c
浏览文件 @ dfbeb9e8
......@@ -35,15 +35,17 @@ static void usb_thread_entry(void *parameter)
{
int8_t i8MouseTable[] = { -16, -16, -16, 0, 16, 16, 16, 0};
uint8_t u8MouseIdx = 0;
uint8_t u8MoveLen=0, u8MouseMode = 1;
uint8_t u8MoveLen = 0, u8MouseMode = 1;
uint8_t pu8Buf[4];
rt_err_t result = RT_EOK;
rt_device_t device = (rt_device_t)parameter;
rt_sem_init(&tx_sem_complete, "tx_complete_sem_hid", 1, RT_IPC_FLAG_FIFO);
result = rt_sem_init(&tx_sem_complete, "tx_complete_sem_hid", 1, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
rt_device_set_tx_complete(device, event_hid_in);
result = rt_device_set_tx_complete(device, event_hid_in);
RT_ASSERT(result == RT_EOK);
LOG_I("Ready.\n");
......@@ -79,7 +81,7 @@ static void usb_thread_entry(void *parameter)
{
/* Wait it done. */
result = rt_sem_take(&tx_sem_complete, RT_WAITING_FOREVER);
RT_ASSERT( result== RT_EOK );
RT_ASSERT(result == RT_EOK);
}
} // while(1)
......@@ -96,10 +98,10 @@ static int dance_mouse_init(void)
RT_ASSERT(ret == RT_EOK);
ret = rt_thread_init(&usb_thread,
"hidd",
usb_thread_entry, device,
usb_thread_stack, sizeof(usb_thread_stack),
10, 20);
"hidd",
usb_thread_entry, device,
usb_thread_stack, sizeof(usb_thread_stack),
10, 20);
RT_ASSERT(ret == RT_EOK);
ret = rt_thread_startup(&usb_thread);
......
bsp/nuvoton/libraries/nu_packages/Kconfig
浏览文件 @ dfbeb9e8
......@@ -62,4 +62,10 @@ menu "Nuvoton Packages Config"
endif
config NU_PKG_USING_SPINAND
bool "SPI NAND flash."
select BSP_USING_QSPI
select RT_USING_MTD_NAND
default n
endmenu
bsp/nuvoton/libraries/nu_packages/SPINAND/SConscript 0 → 100644
浏览文件 @ dfbeb9e8
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
group = []
if GetDepend('NU_PKG_USING_SPINAND'):
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
group = DefineGroup('nu_pkgs_spinand', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nu_packages/SPINAND/drv_spinand.c 0 → 100644
浏览文件 @ dfbeb9e8
此差异已折叠。
bsp/nuvoton/libraries/nu_packages/SPINAND/spinand.c 0 → 100644
浏览文件 @ dfbeb9e8
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-1-13 Wayne First version
*
******************************************************************************/
#include <rtthread.h>
#if defined(NU_PKG_USING_SPINAND)
#define LOG_TAG "spinand_flash"
#define DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL DBG_INFO
#define DBG_COLOR
#include <rtdbg.h>
#include "spinand.h"
const struct nu_spinand_info g_spinandflash_list[] =
{
/* Winbond */
{ 0xEFAA21, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 1024, 64, 0, "Winbond 128MB: 2048+64@64@1024" }, /* Only tested */
#if 0
{ 0xEFAA22, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 2048, 64, 0, "Winbond 256MB: 2048+64@64@1024" },
{ 0xEFAB21, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 1024, 64, 1, "Winbond 256MB: 2048+64@64@1024, MCP" },
/* Not test and supporting yet. */
/* MXIC */
{ 0x00C212, 2048, 64, 0x6b, 0x05, 0x01, 0x40, 0x1, 1024, 64, 0, "MXIC 128MB: 2048+64@64@1024" },
/* XTX */
{ 0x0BE20B, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 2048, 64, 0, "XTX 256MB: 2048+64@64@2048" },
{ 0x0BF20B, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 2048, 64, 0, "XTX 256MB: 2048+64@64@2048" },
{ 0x0BE10B, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 1024, 64, 0, "XTX 256MB: 2048+64@64@1024" },
{ 0x0BF10B, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 1024, 64, 0, "XTX 256MB: 2048+64@64@1024" },
/* ATO */
{ 0x9B129B, 2048, 64, 0x6b, 0x0f, 0x1f, 0x01, 0x1, 1024, 64, 0, "ATO 128MB: 2048+64@64@1024" },
/* Micro */
{ 0x2C242C, 2048, 128, 0x6b, 0x0f, 0x1f, 0x01, 0x1, 2048, 64, 0, "Micro 256MB: 2048+128@64@2048" },
/* GigaDevice */
{ 0xB148C8, 2048, 128, 0x6b, 0x0f, 0x1f, 0x01, 0x1, 1024, 64, 0, "GD 128MB: 2048+128@64@1024" },
/* Unknown */
{ 0x00C8D1, 2048, 128, 0x6b, 0x0f, 0x1f, 0x01, 0x1, 1024, 64, 0, "Unknown 128MB: 2048+128@64@1024" },
{ 0x00C851, 2048, 128, 0x6b, 0x0f, 0x1f, 0x01, 0x1, 1024, 64, 0, "Unknown 128MB: 2048+128@64@1024" },
{ 0x98E240, 2048, 128, 0x6b, 0x0f, 0x1f, 0x01, 0x1, 1024, 64, 0, "Unknown 128MB: 2048+128@64@1024" }
#endif
};
#define SPINAND_LIST_ELEMENT_NUM ( sizeof(g_spinandflash_list)/sizeof(struct nu_spinand_info) )
/*
For 0xEFAA21 description:
Data Area(2048-Byte)
-----------------------------
|Sect-0|Sect-1|Sect-2|Sect-3|
|(512B)|(512B)|(512B)|(512B)|
-----------------------------
Spare Area(64-Byte)
---------------------------------
|Spare-0|Spare-1|Spare-2|Spare-3|
| (16B) | (16B) | (16B) | (16B) |
---------------------------------
----------------- Spare-0 -------------------
/ \
-------------------------------------------------
| BBM | UD2 | UD1 | ECC Sect-0 | ECC Spare |
| 0 1 | 2 3 | 4 5 6 7 | 8 9 A B C D | E F |
-------------------------------------------------
| NO ECC | ECC PROTECTED | ECC 4-D |
BBM: Bad block marker.
UD1: User Data 1.
UD2: User Data 2.
ECC Sect-n: ECC for sector-n.
ECC Spare: ECC for spare 4-D.
---------------- Spare-1 -------------------
/ \
-----------------------------------------------
| UD2 | UD1 | ECC Sect-1 | ECC Spare |
| 0 1 2 3 | 4 5 6 7 | 8 9 A B C D | E F |
-----------------------------------------------
| NO ECC | ECC PROTECTED | ECC 14-1D |
---------------- Spare-2 -------------------
/ \
-----------------------------------------------
| UD2 | UD1 | ECC Sect-2 | ECC Spare |
| 0 1 2 3 | 4 5 6 7 | 8 9 A B C D | E F |
-----------------------------------------------
| NO ECC | ECC PROTECTED | ECC 24-2D |
---------------- Spare-3 -------------------
/ \
-----------------------------------------------
| UD2 | UD1 | ECC Sect-3 | ECC Spare |
| 0 1 2 3 | 4 5 6 7 | 8 9 A B C D | E F |
-----------------------------------------------
| NO ECC | ECC PROTECTED | ECC 34-3D |
*/
rt_uint8_t spinand_flash_data_layout[SPINAND_SPARE_LAYOUT_SIZE] =
{
#if defined(RT_USING_DFS_UFFS)
/* For storing Seal-byte at 0x37. */
0x04, 0x04, 0x14, 0x04, 0x24, 0x04, 0x34, 0x03, 0xFF, 0x00
#else
0x04, 0x04, 0x14, 0x04, 0x24, 0x04, 0x34, 0x04, 0xFF, 0x00
#endif
};
rt_uint8_t spinand_flash_ecc_layout[SPINAND_SPARE_LAYOUT_SIZE] =
{
#if defined(RT_USING_DFS_UFFS)
/* For storing Seal-byte at 0x37 and not report latest ECC part in Spare-3 */
0x08, 0x08, 0x18, 0x08, 0x28, 0x08, /*0x38, 0x08,*/ 0xFF, 0x00
#else
0x08, 0x08, 0x18, 0x08, 0x28, 0x08, 0x38, 0x08, 0xFF, 0x00
#endif
};
static rt_err_t spinand_info_read(struct rt_qspi_device *qspi);
static rt_err_t spinand_die_select(struct rt_qspi_device *qspi, uint8_t select_die)
{
uint8_t au8Cmd[2] = { 0xC2, 0x0 };
au8Cmd[1] = select_die;
return nu_qspi_send(qspi, &au8Cmd[0], sizeof(au8Cmd));
}
static uint8_t spinand_isbusy(struct rt_qspi_device *qspi)
{
#define BUSY_CKECKING_TIMEOUT_MS 3000
volatile uint8_t SR = 0xFF;
rt_err_t result;
uint8_t au8Cmd[2] = { 0x0F, 0xC0 };
uint32_t u32CheckingDuration = rt_tick_from_millisecond(BUSY_CKECKING_TIMEOUT_MS);
uint32_t u32Start = rt_tick_get();
do
{
result = nu_qspi_send_then_recv(qspi, &au8Cmd[0], sizeof(au8Cmd), (void *)&SR, 1);
if (result != RT_EOK)
goto timeout_spinand_isbusy;
if ((rt_tick_get() - u32Start) >= u32CheckingDuration)
{
goto timeout_spinand_isbusy;
}
}
while ((SR & 0x1) != 0x00);
return 0;
timeout_spinand_isbusy:
LOG_E("Error: spinand timeout.");
return 1;
}
static rt_err_t spinand_program_dataload(
struct rt_qspi_device *qspi,
uint8_t u8AddrH,
uint8_t u8AddrL,
uint8_t *pu8DataBuff,
uint32_t u32DataCount,
uint8_t *pu8SpareBuff,
uint32_t u32SpareCount)
{
uint32_t volatile i = 0;
uint8_t u8WECmd = 0x06;
rt_err_t result = RT_EOK;
struct rt_qspi_message qspi_messages[2] = {0};
/* 1-bit mode */
qspi_messages[0].instruction.content = 0x32;
qspi_messages[0].instruction.qspi_lines = 1;
qspi_messages[0].address.content = (u8AddrH << 8) | (u8AddrL);
qspi_messages[0].address.size = 2 * 8;
qspi_messages[0].address.qspi_lines = 1;
/* 4-bit mode */
qspi_messages[0].qspi_data_lines = 4;
qspi_messages[0].parent.cs_take = 1;
qspi_messages[0].parent.cs_release = 0;
qspi_messages[0].parent.send_buf = pu8DataBuff;
qspi_messages[0].parent.length = u32DataCount;
qspi_messages[0].parent.next = &qspi_messages[1].parent;
qspi_messages[1].qspi_data_lines = 4;
qspi_messages[1].parent.cs_take = 0;
qspi_messages[1].parent.cs_release = 1;
qspi_messages[1].parent.send_buf = pu8SpareBuff;
qspi_messages[1].parent.length = u32SpareCount;
if ((result = nu_qspi_send(qspi, &u8WECmd, sizeof(u8WECmd))) != RT_EOK)
goto exit_spinand_program_dataload;
result = nu_qspi_transfer_message(qspi, (struct rt_qspi_message *)&qspi_messages[0]);
exit_spinand_program_dataload:
return result;
}
static uint8_t spinand_status_register_read(struct rt_qspi_device *qspi, uint8_t u8SRSel)
{
uint8_t u8SR = 0;
uint8_t au8Cmd[2];
switch (u8SRSel)
{
case 0x01:
au8Cmd[0] = 0x05;
au8Cmd[1] = 0xA0;
break;
case 0x02:
au8Cmd[0] = 0x0F;
au8Cmd[1] = 0xB0;
break;
case 0x03:
au8Cmd[0] = 0x05;
au8Cmd[1] = 0xC0;
break;
default:
RT_ASSERT(0);
break;
}
if (nu_qspi_send_then_recv(qspi, &au8Cmd[0], sizeof(au8Cmd), &u8SR, 1) != RT_EOK)
RT_ASSERT(0);
return u8SR;
}
static rt_err_t spinand_status_register_write(struct rt_qspi_device *qspi, uint8_t u8SRSel, uint8_t u8Value)
{
rt_err_t result = RT_EOK;
uint8_t au8Cmd[3];
switch (u8SRSel)
{
case 0x01:
au8Cmd[0] = 0x01;
au8Cmd[1] = 0xA0;
break;
case 0x02:
au8Cmd[0] = 0x01;
au8Cmd[1] = 0xB0;
break;
case 0x03:
au8Cmd[0] = 0x01;
au8Cmd[1] = 0xC0;
break;
default:
result = RT_EINVAL;
goto exit_spinand_status_register_write;
}
au8Cmd[2] = u8Value;
if ((result = nu_qspi_send(qspi, &au8Cmd[0], sizeof(au8Cmd))) != RT_EOK)
goto exit_spinand_status_register_write;
if (spinand_isbusy(qspi))
{
result = RT_EIO;
goto exit_spinand_status_register_write;
}
exit_spinand_status_register_write:
return result;
}
static rt_err_t spinand_program_execute(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0)
{
rt_err_t result;
uint8_t au8Cmd[4], u8SR;
au8Cmd[0] = 0x10 ;
au8Cmd[1] = u8Addr2;
au8Cmd[2] = u8Addr1;
au8Cmd[3] = u8Addr0;
if ((result = nu_qspi_send(qspi, &au8Cmd, sizeof(au8Cmd))) != RT_EOK)
goto exit_spinand_program_execute;
if (spinand_isbusy(qspi))
{
result = -RT_MTD_EIO;
goto exit_spinand_program_execute;
}
u8SR = (spinand_status_register_read(SPINAND_FLASH_QSPI, 3) & 0x0C) >> 2;
if (u8SR == 1)
{
result = -RT_MTD_EIO;
LOG_E("Error write status!");
}
exit_spinand_program_execute:
return result;
}
static rt_err_t spinand_normal_read(struct rt_qspi_device *qspi, uint8_t u8AddrH, uint8_t u8AddrL, uint8_t *pu8Buff, uint32_t u32Count)
{
uint8_t au8Cmd[4];
au8Cmd[0] = 0x03;
au8Cmd[1] = u8AddrH;
au8Cmd[2] = u8AddrL;
au8Cmd[3] = 0x00;
return nu_qspi_send_then_recv(qspi, &au8Cmd[0], sizeof(au8Cmd), pu8Buff, u32Count);
}
static rt_err_t spinand_protect_set(struct rt_qspi_device *qspi, uint8_t u8Protect)
{
/* Read status register 1 */
uint8_t u8SR = spinand_status_register_read(qspi, 1);
if (u8Protect)
{
/* protect */
u8SR |= 0x7C;
}
else
{
/* unprotect */
u8SR &= 0x83;
}
return spinand_status_register_write(qspi, 1, u8SR);
}
static uint8_t spinand_program_erase_isfail(struct rt_qspi_device *qspi)
{
/* Read status register 3 */
uint8_t u8SR = spinand_status_register_read(qspi, 3);
return (u8SR & 0x0C) >> 2; /* Check P-Fail, E-Fail bit */
}
static uint8_t spinand_hwecc_status_get(struct rt_qspi_device *qspi)
{
/* Read status register 3 */
uint8_t u8SR = spinand_status_register_read(qspi, 3);
return (u8SR & 0x30) >> 4; /* ECC-1, ECC0 bit */
}
static rt_err_t spinand_hwecc_set(struct rt_qspi_device *qspi, uint8_t u8Enable)
{
uint8_t u8SR = spinand_status_register_read(qspi, 2); // Read status register 2
if (u8Enable)
{
u8SR |= 0x10; // Enable ECC-E bit
}
else
{
u8SR &= 0xEF; // Disable ECC-E bit
}
return spinand_status_register_write(qspi, 2, u8SR);
}
static uint8_t spinand_hwecc_get(struct rt_qspi_device *qspi)
{
/* Read status register 2 */
uint8_t u8SR = spinand_status_register_read(qspi, 2);
return (u8SR & 0x10) >> 4;
}
static rt_err_t spinand_read_dataload(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0)
{
rt_err_t result = RT_EOK;
uint8_t au8Cmd[4];
uint8_t u8SR;
au8Cmd[0] = 0x13 ;
au8Cmd[1] = u8Addr2;
au8Cmd[2] = u8Addr1;
au8Cmd[3] = u8Addr0;
if ((result = nu_qspi_send(qspi, &au8Cmd[0], sizeof(au8Cmd))) != RT_EOK)
goto exit_spinand_read_dataload;
if (spinand_isbusy(qspi))
{
result = -RT_EIO;
goto exit_spinand_read_dataload;
}
u8SR = spinand_hwecc_status_get(SPINAND_FLASH_QSPI);
if ((u8SR != 0x00) && (u8SR != 0x01))
{
result = -RT_MTD_EECC;
LOG_E("Error ECC status error[0x%x].", u8SR);
}
exit_spinand_read_dataload:
return result;
}
static uint8_t spinand_block_isbad(struct rt_qspi_device *qspi, uint32_t u32PageAddr)
{
rt_err_t result;
uint8_t read_buf;
again_spinand_block_isbad:
result = spinand_read_dataload(qspi, (u32PageAddr >> 16) & 0xFF, (u32PageAddr >> 8) & 0xFF, u32PageAddr & 0xFF); // Read the first page of a block
RT_ASSERT(result == RT_EOK);
result = spinand_normal_read(qspi, (SPINAND_FLASH_PAGE_SIZE >> 8) & 0xff, SPINAND_FLASH_PAGE_SIZE & 0xff, &read_buf, 1); // Read bad block mark at 0x800 update at v.1.0.8
RT_ASSERT(result == RT_EOK);
if (read_buf != 0xFF)
{
// update at v.1.0.7
return 1;
}
if (((u32PageAddr % (SPINAND_FLASH_PAGE_PER_BLOCK_NUM * SPINAND_FLASH_PAGE_SIZE)) == 0))
{
/* Need check second page again. */
u32PageAddr++;
goto again_spinand_block_isbad;
}
return 0;
}
static rt_err_t spinand_buffermode_set(struct rt_qspi_device *qspi, uint8_t u8Enable)
{
uint8_t u8SR = spinand_status_register_read(qspi, 2); // Read status register 2
if (u8Enable)
{
u8SR |= 0x08; // Enable BUF bit
}
else
{
u8SR &= 0xF7; // Disable BUF bit
}
return spinand_status_register_write(qspi, 2, u8SR);
}
static rt_err_t spinand_block_erase(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0)
{
rt_err_t result;
uint8_t u8WECmd = 0x06;
uint8_t au8EraseCmd[4], u8SR;
au8EraseCmd[0] = 0xD8;
au8EraseCmd[1] = u8Addr2;
au8EraseCmd[2] = u8Addr1;
au8EraseCmd[3] = u8Addr0;
if ((result = nu_qspi_send(qspi, &u8WECmd, sizeof(u8WECmd))) != RT_EOK)
goto exit_spinand_block_erase;
if ((result = nu_qspi_send(qspi, &au8EraseCmd[0], sizeof(au8EraseCmd))) != RT_EOK)
goto exit_spinand_block_erase;
if (spinand_isbusy(qspi))
return -RT_EIO;
u8SR = spinand_program_erase_isfail(SPINAND_FLASH_QSPI);
if (u8SR != 0)
{
/* Fail to erase */
LOG_E("Fail to erase. Will mark it bad.");
result = -RT_ERROR;
goto exit_spinand_block_erase;
}
exit_spinand_block_erase:
return result;
}
static rt_err_t spinand_block_markbad(struct rt_qspi_device *qspi, uint32_t u32PageAddr)
{
rt_err_t result = RT_EOK;
uint8_t u8BadBlockMarker = 0xF0;
result = spinand_block_erase(qspi, (u32PageAddr >> 16) & 0xFF, (u32PageAddr >> 8) & 0xFF, u32PageAddr & 0xFF);
if (result != RT_EOK)
return result;
result = spinand_program_dataload(qspi, (SPINAND_FLASH_PAGE_SIZE >> 8) & 0xff, SPINAND_FLASH_PAGE_SIZE & 0xff, &u8BadBlockMarker, 1, 0, 0);
if (result != RT_EOK)
return result;
return spinand_program_execute(qspi, (u32PageAddr >> 16) & 0xFF, (u32PageAddr >> 8) & 0xFF, u32PageAddr & 0xFF);
}
static rt_err_t spinand_read_quadoutput(
struct rt_qspi_device *qspi,
uint8_t u8AddrH,
uint8_t u8AddrL,
uint8_t *pu8DataBuff,
uint32_t u32DataCount
)
{
struct rt_qspi_message qspi_messages = {0};
/* 1-bit mode */
qspi_messages.instruction.content = SPINAND_FLASH_QUADREAD_CMDID;
qspi_messages.instruction.qspi_lines = 1;
qspi_messages.address.content = (u8AddrH << 8) | (u8AddrL);
qspi_messages.address.size = 2 * 8;
qspi_messages.address.qspi_lines = 1;
qspi_messages.dummy_cycles = SPINAND_FLASH_DUMMYBYTE * 8; //In bit
/* 4-bit mode */
qspi_messages.qspi_data_lines = 4;
qspi_messages.parent.cs_take = 1;
qspi_messages.parent.cs_release = 1;
qspi_messages.parent.recv_buf = pu8DataBuff;
qspi_messages.parent.length = u32DataCount;
qspi_messages.parent.next = RT_NULL;
return nu_qspi_transfer_message(qspi, (struct rt_qspi_message *) &qspi_messages);
}
static rt_err_t spinand_jedecid_get(struct rt_qspi_device *qspi, uint32_t *pu32ID)
{
uint32_t u32JedecId = 0;
uint32_t u32JedecId_real = 0;
uint8_t u8Cmd = 0x9F;
if (nu_qspi_send_then_recv(qspi, &u8Cmd, 1, &u32JedecId, 4) != RT_EOK)
{
return -RT_ERROR;
}
/* Reverse order. */
nu_set32_be((uint8_t *)&u32JedecId_real, u32JedecId);
/* Only keep 3-bytes. */
u32JedecId_real &= 0x00ffffff;
*pu32ID = u32JedecId_real;
return RT_EOK;
}
static rt_err_t spinand_reset(struct rt_qspi_device *qspi)
{
rt_err_t result;
uint8_t u8Cmd = 0xFF;
if ((result = nu_qspi_send(qspi, &u8Cmd, 1)) != RT_EOK)
goto exit_spinand_reset;
if (spinand_isbusy(qspi))
{
result = RT_EIO;
goto exit_spinand_reset;
}
exit_spinand_reset:
return result;
}
rt_err_t spinand_flash_init(struct rt_qspi_device *qspi)
{
rt_err_t result;
if ((result = spinand_reset(qspi)) != RT_EOK)
goto exit_spinand_init;
if ((result = spinand_info_read(qspi)) != RT_EOK)
goto exit_spinand_init;
/* Un-protect */
if ((result = spinand_protect_set(qspi, 0)) != RT_EOK)
goto exit_spinand_init;
/* Enable BUF mode */
if ((result = spinand_buffermode_set(qspi, 1)) != RT_EOK)
goto exit_spinand_init;
/* Enable HWECC */
if ((result = spinand_hwecc_set(qspi, 1)) != RT_EOK)
goto exit_spinand_init;
/* Check HWECC */
if (!(spinand_hwecc_get(qspi)))
goto exit_spinand_init;
if (SPINAND_FLASH_MCP == 1)
{
/* Select die. */
if ((result = spinand_die_select(qspi, SPINAND_DIE_ID1)) != RT_EOK)
goto exit_spinand_init;
/* Unprotect */
if ((result = spinand_protect_set(qspi, 0)) != RT_EOK)
goto exit_spinand_init;
}
LOG_I("Enabled BUF, HWECC. Unprotected.");
exit_spinand_init:
return -result;
}
struct spinand_ops spinand_ops_wb =
{
.block_erase = spinand_block_erase,
.block_isbad = spinand_block_isbad,
.block_markbad = spinand_block_markbad,
.die_select = spinand_die_select,
.jedecid_get = spinand_jedecid_get,
.program_dataload = spinand_program_dataload,
.program_execute = spinand_program_execute,
.read_dataload = spinand_read_dataload,
.read_quadoutput = spinand_read_quadoutput
};
static rt_err_t spinand_info_read(struct rt_qspi_device *qspi)
{
int i;
uint32_t u32JedecId = 0;
if (spinand_jedecid_get(qspi, &u32JedecId) != RT_EOK)
goto exit_spinand_info_read;
for (i = 0 ; i < SPINAND_LIST_ELEMENT_NUM; i++)
{
if (u32JedecId == g_spinandflash_list[i].u32JEDECID) /* Match JEDECID? */
{
rt_memcpy(SPINAND_FLASH_INFO, &g_spinandflash_list[i], sizeof(struct nu_spinand_info));
LOG_I("Found: [%08X] %s.", u32JedecId, SPINAND_FLASH_DESCRIPTION);
switch (u32JedecId & 0xff0000)
{
case 0xEF0000: /* Winbond */
SPINAND_FLASH_OPS = &spinand_ops_wb;
break;
default:
goto exit_spinand_info_read;
}
return RT_EOK;
}
}
exit_spinand_info_read:
LOG_E("Can't find the flash[%08X] in supported list.", u32JedecId);
return -RT_ERROR;
}
#endif
bsp/nuvoton/libraries/nu_packages/SPINAND/spinand.h 0 → 100644
浏览文件 @ dfbeb9e8
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-1-13 Wayne First version
*
******************************************************************************/
#ifndef __SPINAND_H__
#define __SPINAND_H__
#include <rtthread.h>
#include <drivers/mtd_nand.h>
#include "drv_spi.h"
#include <board.h>
/* SPI NAND flash information */
struct nu_spinand_info
{
uint32_t u32JEDECID;
uint16_t u16PageSize;
uint16_t u16OOBSize;
uint8_t u8QuadReadCmdId;
uint8_t u8ReadStatusCmdId;
uint8_t u8WriteStatusCmdid;
uint8_t u8StatusValue;
uint8_t u8DummyByte;
uint32_t u32BlockPerFlash;
uint32_t u32PagePerBlock;
uint8_t u8IsDieSelect;
const char *szDescription;
};
typedef struct nu_spinand_info *nu_spinand_info_t;
struct spinand_ops
{
rt_err_t (*block_erase)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
uint8_t (*block_isbad)(struct rt_qspi_device *qspi, uint32_t u32PageAddr);
rt_err_t (*block_markbad)(struct rt_qspi_device *qspi, uint32_t u32PageAddr);
rt_err_t (*die_select)(struct rt_qspi_device *qspi, uint8_t select_die);
rt_err_t (*jedecid_get)(struct rt_qspi_device *qspi, uint32_t *pu32ID);
rt_err_t (*program_dataload)(struct rt_qspi_device *qspi, uint8_t u8AddrH, uint8_t u8AddrL, uint8_t *pu8DataBuff,
uint32_t u32DataCount, uint8_t *pu8SpareBuff, uint32_t u32SpareCount);
rt_err_t (*program_execute)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
rt_err_t (*read_dataload)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
rt_err_t (*read_quadoutput)(struct rt_qspi_device *qspi, uint8_t u8AddrH, uint8_t u8AddrL, uint8_t *pu8DataBuff, uint32_t u32DataCount);
};
typedef struct spinand_ops *nu_spinand_ops_t;
struct nu_spinand
{
struct nu_spinand_info info;
struct rt_qspi_device *qspi_device;
nu_spinand_ops_t ops;
struct rt_mutex lock;
};
typedef struct nu_spinand *nu_spinand_t;
#define SPINAND_FLASH_JEDECID g_spinandflash_dev.info.u32JEDECID
#define SPINAND_FLASH_PAGE_SIZE g_spinandflash_dev.info.u16PageSize
#define SPINAND_FLASH_OOB_SIZE g_spinandflash_dev.info.u16OOBSize
#define SPINAND_FLASH_QUADREAD_CMDID g_spinandflash_dev.info.u8QuadReadCmdId
#define SPINAND_FLASH_DUMMYBYTE g_spinandflash_dev.info.u8DummyByte
#define SPINAND_FLASH_BLOCK_NUM g_spinandflash_dev.info.u32BlockPerFlash
#define SPINAND_FLASH_PAGE_PER_BLOCK_NUM g_spinandflash_dev.info.u32PagePerBlock
#define SPINAND_FLASH_DESCRIPTION g_spinandflash_dev.info.szDescription
#define SPINAND_FLASH_MCP g_spinandflash_dev.info.u8IsDieSelect
#define SPINAND_FLASH_INFO &g_spinandflash_dev.info
#define SPINAND_FLASH_QSPI g_spinandflash_dev.qspi_device
#define SPINAND_FLASH_LOCK &g_spinandflash_dev.lock
#define SPINAND_FLASH_OPS g_spinandflash_dev.ops
#define SPINAND_DIE_ID0 (0)
#define SPINAND_DIE_ID1 (1)
#define SPINAND_SPARE_LAYOUT_SIZE 16
rt_err_t rt_hw_mtd_spinand_register(const char *device_name);
rt_size_t nu_qspi_transfer_message(struct rt_qspi_device *device, struct rt_qspi_message *message);
rt_err_t nu_qspi_send_then_recv(struct rt_qspi_device *device, const void *send_buf, rt_size_t send_length, void *recv_buf, rt_size_t recv_length);
rt_err_t nu_qspi_send(struct rt_qspi_device *device, const void *send_buf, rt_size_t length);
rt_err_t spinand_flash_init(struct rt_qspi_device *qspi);
extern struct nu_spinand g_spinandflash_dev;
extern rt_uint8_t spinand_flash_data_layout[SPINAND_SPARE_LAYOUT_SIZE];
extern rt_uint8_t spinand_flash_ecc_layout[SPINAND_SPARE_LAYOUT_SIZE];
#endif /* __SPINAND_H__ */
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_can.h
浏览文件 @ dfbeb9e8
......@@ -46,45 +46,45 @@
typedef struct
{
uint32_t CREQ; /*!< [0x0020] IFn Command Request Register */
uint32_t CMASK; /*!< [0x0024] IFn Command Mask Register */
uint32_t MASK1; /*!< [0x0028] IFn Mask 1 Register */
uint32_t MASK2; /*!< [0x002c] IFn Mask 2 Register */
uint32_t ARB1; /*!< [0x0030] IFn Arbitration 1 Register */
uint32_t ARB2; /*!< [0x0034] IFn Arbitration 2 Register */
uint32_t MCON; /*!< [0x0038] IFn Message Control Register */
uint32_t DAT_A1; /*!< [0x003c] IFn Data A1 Register */
uint32_t DAT_A2; /*!< [0x0040] IFn Data A2 Register */
uint32_t DAT_B1; /*!< [0x0044] IFn Data B1 Register */
uint32_t DAT_B2; /*!< [0x0048] IFn Data B2 Register */
uint32_t RESERVE0[13];
__IO uint32_t CREQ; /*!< [0x0020] IFn Command Request Register */
__IO uint32_t CMASK; /*!< [0x0024] IFn Command Mask Register */
__IO uint32_t MASK1; /*!< [0x0028] IFn Mask 1 Register */
__IO uint32_t MASK2; /*!< [0x002c] IFn Mask 2 Register */
__IO uint32_t ARB1; /*!< [0x0030] IFn Arbitration 1 Register */
__IO uint32_t ARB2; /*!< [0x0034] IFn Arbitration 2 Register */
__IO uint32_t MCON; /*!< [0x0038] IFn Message Control Register */
__IO uint32_t DAT_A1; /*!< [0x003c] IFn Data A1 Register */
__IO uint32_t DAT_A2; /*!< [0x0040] IFn Data A2 Register */
__IO uint32_t DAT_B1; /*!< [0x0044] IFn Data B1 Register */
__IO uint32_t DAT_B2; /*!< [0x0048] IFn Data B2 Register */
__I uint32_t RESERVE0[13];
} CAN_IF_T;
typedef struct
{
uint32_t CON; /*!< [0x0000] Control Register */
uint32_t STATUS; /*!< [0x0004] Status Register */
uint32_t ERR; /*!< [0x0008] Error Counter Register */
uint32_t BTIME; /*!< [0x000c] Bit Timing Register */
uint32_t IIDR; /*!< [0x0010] Interrupt Identifier Register */
uint32_t TEST; /*!< [0x0014] Test Register */
uint32_t BRPE; /*!< [0x0018] Baud Rate Prescaler Extension Register */
uint32_t RESERVE0[1];
CAN_IF_T IF[2];
uint32_t RESERVE2[8];
uint32_t TXREQ1; /*!< [0x0100] Transmission Request Register 1 */
uint32_t TXREQ2; /*!< [0x0104] Transmission Request Register 2 */
uint32_t RESERVE3[6];
uint32_t NDAT1; /*!< [0x0120] New Data Register 1 */
uint32_t NDAT2; /*!< [0x0124] New Data Register 2 */
uint32_t RESERVE4[6];
uint32_t IPND1; /*!< [0x0140] Interrupt Pending Register 1 */
uint32_t IPND2; /*!< [0x0144] Interrupt Pending Register 2 */
uint32_t RESERVE5[6];
uint32_t MVLD1; /*!< [0x0160] Message Valid Register 1 */
uint32_t MVLD2; /*!< [0x0164] Message Valid Register 2 */
uint32_t WU_EN; /*!< [0x0168] Wake-up Enable Control Register */
uint32_t WU_STATUS; /*!< [0x016c] Wake-up Status Register */
__IO uint32_t CON; /*!< [0x0000] Control Register */
__IO uint32_t STATUS; /*!< [0x0004] Status Register */
__I uint32_t ERR; /*!< [0x0008] Error Counter Register */
__IO uint32_t BTIME; /*!< [0x000c] Bit Timing Register */
__I uint32_t IIDR; /*!< [0x0010] Interrupt Identifier Register */
__IO uint32_t TEST; /*!< [0x0014] Test Register */
__IO uint32_t BRPE; /*!< [0x0018] Baud Rate Prescaler Extension Register */
__I uint32_t RESERVE0[1];
__IO CAN_IF_T IF[2];
__I uint32_t RESERVE2[8];
__I uint32_t TXREQ1; /*!< [0x0100] Transmission Request Register 1 */
__I uint32_t TXREQ2; /*!< [0x0104] Transmission Request Register 2 */
__I uint32_t RESERVE3[6];
__I uint32_t NDAT1; /*!< [0x0120] New Data Register 1 */
__I uint32_t NDAT2; /*!< [0x0124] New Data Register 2 */
__I uint32_t RESERVE4[6];
__I uint32_t IPND1; /*!< [0x0140] Interrupt Pending Register 1 */
__I uint32_t IPND2; /*!< [0x0144] Interrupt Pending Register 2 */
__I uint32_t RESERVE5[6];
__I uint32_t MVLD1; /*!< [0x0160] Message Valid Register 1 */
__I uint32_t MVLD2; /*!< [0x0164] Message Valid Register 2 */
__IO uint32_t WU_EN; /*!< [0x0168] Wake-up Enable Control Register */
__IO uint32_t WU_STATUS; /*!< [0x016c] Wake-up Status Register */
} CAN_T;
......
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_etimer.h
浏览文件 @ dfbeb9e8
......@@ -647,6 +647,42 @@ static __inline void ETIMER_ClearCaptureIntFlag(UINT timer)
}
}
/**
* @brief This function gets the Timer capture falling edge flag.
* @param[in] timer ETIMER number. Range from 0 ~ 5
* @return None
*/
static __inline UINT8 ETIMER_GetCaptureFallingEdgeFlag(UINT timer)
{
UINT ret;
if (timer == 0)
{
ret = inpw(REG_ETMR0_ISR);
}
else if (timer == 1)
{
ret = inpw(REG_ETMR1_ISR);
}
else if (timer == 2)
{
ret = inpw(REG_ETMR2_ISR);
}
else if (timer == 3)
{
ret = inpw(REG_ETMR3_ISR);
}
else if (timer == 4)
{
ret = inpw(REG_ETMR4_ISR);
}
else
{
ret = inpw(REG_ETMR5_ISR);
}
return (ret & (1 << 6)) >> 6;
}
/**
* @brief This function indicates Timer has waked up system or not.
* @param[in] timer ETIMER number. Range from 0 ~ 5
......
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_rtc.h
浏览文件 @ dfbeb9e8
......@@ -110,23 +110,23 @@ typedef struct
typedef struct
{
uint32_t INIT; /*!< [0x0000] RTC Initiation Register */
uint32_t RWEN; /*!< [0x0004] RTC Access Enable Register */
uint32_t FREQADJ; /*!< [0x0008] RTC Frequency Compensation Register */
uint32_t TIME; /*!< [0x000c] RTC Time Loading Register */
uint32_t CAL; /*!< [0x0010] RTC Calendar Loading Register */
uint32_t CLKFMT; /*!< [0x0014] RTC Time Scale Selection Register */
uint32_t WEEKDAY; /*!< [0x0018] RTC Day of the Week Register */
uint32_t TALM; /*!< [0x001c] RTC Time Alarm Register */
uint32_t CALM; /*!< [0x0020] RTC Calendar Alarm Register */
uint32_t LEAPYEAR; /*!< [0x0024] RTC Leap Year Indicator Register */
uint32_t INTEN; /*!< [0x0028] RTC Interrupt Enable Register */
uint32_t INTSTS; /*!< [0x002c] RTC Interrupt Status Register */
uint32_t TICK; /*!< [0x0030] RTC Time Tick Register */
uint32_t PWRCTL; /*!< [0x0034] RTC Power Control Register */
uint32_t PWRCNT; /*!< [0x0038] RTC Power Control Counter Register */
uint32_t RESERVE0; /*!< [0x003c] RTC Spare Functional Control Register */
uint32_t SPR[16]; /*!< [0x0040] ~ [0x007c] RTC Spare Register 0 ~ 15 */
__IO uint32_t INIT; /*!< [0x0000] RTC Initiation Register */
__IO uint32_t RWEN; /*!< [0x0004] RTC Access Enable Register */
__IO uint32_t FREQADJ; /*!< [0x0008] RTC Frequency Compensation Register */
__IO uint32_t TIME; /*!< [0x000c] RTC Time Loading Register */
__IO uint32_t CAL; /*!< [0x0010] RTC Calendar Loading Register */
__IO uint32_t CLKFMT; /*!< [0x0014] RTC Time Scale Selection Register */
__IO uint32_t WEEKDAY; /*!< [0x0018] RTC Day of the Week Register */
__IO uint32_t TALM; /*!< [0x001c] RTC Time Alarm Register */
__IO uint32_t CALM; /*!< [0x0020] RTC Calendar Alarm Register */
__I uint32_t LEAPYEAR; /*!< [0x0024] RTC Leap Year Indicator Register */
__IO uint32_t INTEN; /*!< [0x0028] RTC Interrupt Enable Register */
__IO uint32_t INTSTS; /*!< [0x002c] RTC Interrupt Status Register */
__IO uint32_t TICK; /*!< [0x0030] RTC Time Tick Register */
__IO uint32_t PWRCTL; /*!< [0x0034] RTC Power Control Register */
__IO uint32_t PWRCNT; /*!< [0x0038] RTC Power Control Counter Register */
__IO uint32_t RESERVE0; /*!< [0x003c] RTC Spare Functional Control Register */
__I uint32_t SPR[16]; /*!< [0x0040] ~ [0x007c] RTC Spare Register 0 ~ 15 */
} RTC_T;
#define RTC_INIT_ACTIVE_Pos (0) /*!< RTC_T::INIT: INIT_ACTIVE Position */
......
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_uart.h
浏览文件 @ dfbeb9e8
......@@ -116,25 +116,25 @@
typedef struct
{
uint32_t DAT; /*!< [0x0000] UART Receive/Transmit Buffer Register */
uint32_t INTEN; /*!< [0x0004] UART Interrupt Enable Register */
uint32_t FIFO; /*!< [0x0008] UART FIFO Control Register */
uint32_t LINE; /*!< [0x000c] UART Line Control Register */
uint32_t MODEM; /*!< [0x0010] UART Modem Control Register */
uint32_t MODEMSTS; /*!< [0x0014] UART Modem Status Register */
uint32_t FIFOSTS; /*!< [0x0018] UART FIFO Status Register */
uint32_t INTSTS; /*!< [0x001c] UART Interrupt Status Register */
uint32_t TOUT; /*!< [0x0020] UART Time-out Register */
uint32_t BAUD; /*!< [0x0024] UART Baud Rate Divider Register */
uint32_t IRDA; /*!< [0x0028] UART IrDA Control Register */
uint32_t ALTCTL; /*!< [0x002c] UART Alternate Control/Status Register */
uint32_t FUNCSEL; /*!< [0x0030] UART Function Select Register */
uint32_t LINCTL; /*!< [0x0034] UART LIN Control Register */
uint32_t LINSTS; /*!< [0x0038] UART LIN Status Register */
uint32_t BRCOMP; /*!< [0x003c] UART Baud Rate Compensation Register */
uint32_t WKCTL; /*!< [0x0040] UART Wake-up Control Register */
uint32_t WKSTS; /*!< [0x0044] UART Wake-up Status Register */
uint32_t DWKCOMP; /*!< [0x0048] UART Incoming Data Wake-up Compensation Register */
__IO uint32_t DAT; /*!< [0x0000] UART Receive/Transmit Buffer Register */
__IO uint32_t INTEN; /*!< [0x0004] UART Interrupt Enable Register */
__IO uint32_t FIFO; /*!< [0x0008] UART FIFO Control Register */
__IO uint32_t LINE; /*!< [0x000c] UART Line Control Register */
__IO uint32_t MODEM; /*!< [0x0010] UART Modem Control Register */
__IO uint32_t MODEMSTS; /*!< [0x0014] UART Modem Status Register */
__IO uint32_t FIFOSTS; /*!< [0x0018] UART FIFO Status Register */
__IO uint32_t INTSTS; /*!< [0x001c] UART Interrupt Status Register */
__IO uint32_t TOUT; /*!< [0x0020] UART Time-out Register */
__IO uint32_t BAUD; /*!< [0x0024] UART Baud Rate Divider Register */
__IO uint32_t IRDA; /*!< [0x0028] UART IrDA Control Register */
__IO uint32_t ALTCTL; /*!< [0x002c] UART Alternate Control/Status Register */
__IO uint32_t FUNCSEL; /*!< [0x0030] UART Function Select Register */
__IO uint32_t LINCTL; /*!< [0x0034] UART LIN Control Register */
__IO uint32_t LINSTS; /*!< [0x0038] UART LIN Status Register */
__IO uint32_t BRCOMP; /*!< [0x003c] UART Baud Rate Compensation Register */
__IO uint32_t WKCTL; /*!< [0x0040] UART Wake-up Control Register */
__IO uint32_t WKSTS; /*!< [0x0044] UART Wake-up Status Register */
__IO uint32_t DWKCOMP; /*!< [0x0048] UART Incoming Data Wake-up Compensation Register */
} UART_T;
......
bsp/nuvoton/libraries/nuc980/Driver/SConscript
浏览文件 @ dfbeb9e8
......@@ -18,9 +18,9 @@ if not GetDepend('BSP_USE_STDDRIVER_SOURCE'):
libs += ['libstddriver_gcc']
if not libs:
group = DefineGroup('nuc980_driver', src, depend = [''], CPPPATH = cpppath)
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath)
else:
src = []
group = DefineGroup('nuc980_driver', src, depend = [''], CPPPATH = cpppath, LIBS = libs, LIBPATH = libpath)
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath, LIBS = libs, LIBPATH = libpath)
Return('group')
bsp/nuvoton/libraries/nuc980/README.md
浏览文件 @ dfbeb9e8
......@@ -16,6 +16,7 @@
| QSPI | RT_Device_Class_SPIBUS | ***qspi[0]*** |
| RTC | RT_Device_Class_RTC | ***rtc*** |
| PWM | RT_Device_Class_Miscellaneous (PWM) | ***pwm[0-1]*** |
| USBH | RT_Device_Class_USBHost | ***usbh*** |
| USBD | RT_Device_Class_USBDevice | ***usbd*** |
| SC (UART function) | RT_Device_Class_Char | ***scuart[0-1]*** |
| SDH | RT_Device_Class_Block | ***sdh[0-1]*** |
......
bsp/nuvoton/libraries/nuc980/UsbHostLib/SConscript 0 → 100644
浏览文件 @ dfbeb9e8
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
group = []
if GetDepend('BSP_USING_HSUSBH') or GetDepend('BSP_USING_USBH'):
src = Glob('*src/*.c') + Glob('src/*.cpp')
CPPPATH = [cwd + '/inc']
group = DefineGroup('nuc980_usbhostlib', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/config.h 0 → 100644
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bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/ehci.h 0 → 100644
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bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/hub.h 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/ohci.h 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/usb.h 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/usbh_lib.h 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/ehci.c 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/ehci_iso.c 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/mem_alloc.c 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/ohci.c 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/support.c 0 → 100644
浏览文件 @ dfbeb9e8
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/usb_core.c 0 → 100644
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bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig
浏览文件 @ dfbeb9e8
......@@ -114,13 +114,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM0
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER0_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
......@@ -146,13 +139,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM1
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER1_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
......@@ -177,13 +163,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM2
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER2_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
......@@ -208,13 +187,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM3
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER3_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
......@@ -239,13 +211,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM4
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER4_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
......@@ -634,9 +599,4 @@ config SOC_SERIES_NUC980
config BSP_USING_USBH
bool "Enable USB Host Controller(USBH)"
select RT_USING_USB_HOST
select RT_USBH_MSTORAGE
config BSP_USING_OTG
bool "Enable USB On-The-Go(OTG)"
select BSP_USING_USBH
select BSP_USING_USBD
select RT_USBH_MSTORAGE
\ No newline at end of file
bsp/nuvoton/libraries/nuc980/rtt_port/SConscript
浏览文件 @ dfbeb9e8
......@@ -9,6 +9,6 @@ CPPPATH = [cwd]
group = []
# USB driver constrain
group = DefineGroup('nuc980_rttport', src, depend = [''], CPPPATH = CPPPATH)
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nuc980/rtt_port/drv_usbhost.c 0 → 100644
浏览文件 @ dfbeb9e8
此差异已折叠。
bsp/nuvoton/nk-980iot/.config
浏览文件 @ dfbeb9e8
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bsp/nuvoton/nk-980iot/README.md
浏览文件 @ dfbeb9e8
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bsp/nuvoton/nk-980iot/board/Kconfig
浏览文件 @ dfbeb9e8
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bsp/nuvoton/nk-980iot/board/board.h
浏览文件 @ dfbeb9e8
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bsp/nuvoton/nk-980iot/linking_scripts/nuc980.ld
浏览文件 @ dfbeb9e8
......@@ -50,7 +50,7 @@ SECTIONS
. = ALIGN(4);
/* section information for utest */
. = ALIGN(4);
. = ALIGN(4);
__rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .;
......
bsp/nuvoton/nk-980iot/rtconfig.py
浏览文件 @ dfbeb9e8
此差异已折叠。
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