提交 9a27a2a9 编写于 作者: B bernard.xiong

remove the un-maintained porting branches

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@572 bbd45198-f89e-11dd-88c7-29a3b14d5316
上级 6c83bee2
......@@ -17,71 +17,94 @@
*/
/*@{*/
#include <board.h>
#include <rtthread.h>
#include "led.h"
char thread_led1_stack[512];
struct rt_thread thread_led1;
static void rt_thread_entry_led1(void* parameter)
{
/* init led configuration */
rt_hw_led_init();
while (1)
{
/* led on */
rt_kprintf("led1 on\r\n");
rt_hw_led_on(0);
rt_thread_delay(50); /* sleep 0.5 second and switch to other thread */
/* led off */
rt_kprintf("led1 off\r\n");
rt_hw_led_off(0);
rt_thread_delay(50);
}
}
#ifdef RT_USING_DFS
/* dfs init */
#include <dfs_init.h>
/* dfs filesystem:ELM filesystem init */
#include <dfs_elm.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#endif
char thread_led2_stack[512];
struct rt_thread thread_led2;
void rt_thread_entry_led2(void* parameter)
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <lwip/api.h>
#include <netif/ethernetif.h>
#endif
void rt_init_thread_entry(void* parameter)
{
unsigned int count=0;
while (1)
{
/* led on */
rt_kprintf("led2 on,count : %d\r\n",count);
count++;
rt_hw_led_on(1);
rt_thread_delay(RT_TICK_PER_SECOND);
/* led off */
rt_kprintf("led2 off\r\n");
rt_hw_led_off(1);
rt_thread_delay(RT_TICK_PER_SECOND);
}
/* Filesystem Initialization */
#ifdef RT_USING_DFS
{
/* init the device filesystem */
dfs_init();
#ifdef RT_USING_DFS_ELMFAT
/* init the elm chan FatFs filesystam*/
elm_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
{
rt_kprintf("File System initialized!\n");
}
else
rt_kprintf("File System initialzation failed!\n");
#endif
}
#endif
/* LwIP Initialization */
#ifdef RT_USING_LWIP
{
extern void lwip_sys_init(void);
/* register ethernetif device */
eth_system_device_init();
#ifdef STM32F10X_CL
rt_hw_stm32_eth_init();
#else
/* STM32F103 */
#if STM32_ETH_IF == 0
rt_hw_enc28j60_init();
#elif STM32_ETH_IF == 1
rt_hw_dm9000_init();
#endif
#endif
/* re-init device driver */
rt_device_init_all();
/* init lwip system */
lwip_sys_init();
rt_kprintf("TCP/IP initialized!\n");
}
#endif
}
int rt_application_init()
{
/* init led1 thread */
rt_thread_init(&thread_led1,
"led1",
rt_thread_entry_led1,
RT_NULL,
&thread_led1_stack[0],
sizeof(thread_led1_stack),10,10);
rt_thread_startup(&thread_led1);
/* init led2 thread */
rt_thread_init(&thread_led2,
"led2",
rt_thread_entry_led2,
RT_NULL,
&thread_led2_stack[0],
sizeof(thread_led2_stack),10,10);
rt_thread_startup(&thread_led2);
return 0;
rt_thread_t init_thread;
#if (RT_THREAD_PRIORITY_MAX == 32)
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 8, 20);
#else
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 80, 20);
#endif
if (init_thread != RT_NULL)
rt_thread_startup(init_thread);
return 0;
}
/*@}*/
......@@ -2,24 +2,30 @@
### Do not modify !
Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'
Target (RT-Thread STM32 Simulator), 0x0004 // Tools: 'ARM-ADS'
Group (Startup)
Group (StdPeriph_Driver)
Group (CMSIS)
Group (Kernel)
Group (STM32)
Group (finsh)
Group (Filesystem)
Group (LwIP)
File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
File 1,1,<.\board.c><board.c>
File 1,1,<.\application.c><application.c>
File 1,1,<.\startup.c><startup.c>
File 1,1,<.\led.c><led.c>
File 1,1,<.\usart.c><usart.c>
File 1,1,<.\sdcard.c><sdcard.c>
File 1,1,<.\msd.c><msd.c>
File 1,1,<.\enc28j60.c><enc28j60.c>
File 1,1,<.\dm9000a.c><dm9000a.c>
File 1,1,<.\rtc.c><rtc.c>
File 1,5,<.\rtconfig.h><rtconfig.h>
File 1,5,<.\board.h><board.h>
File 1,1,<.\usart.c><usart.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
......@@ -40,6 +46,7 @@ File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
File 4,1,<..\..\src\clock.c><clock.c>
......@@ -59,10 +66,73 @@ File 5,1,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
File 5,1,<..\..\libcpu\arm\stm32\fault.c><fault.c>
File 5,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
File 5,1,<..\..\libcpu\arm\stm32\stack.c><stack.c>
File 5,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
File 5,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
File 5,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
File 6,1,<..\..\finsh\symbol.c><symbol.c>
File 6,1,<..\..\finsh\cmd.c><cmd.c>
File 6,1,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
File 6,1,<..\..\finsh\finsh_error.c><finsh_error.c>
File 6,1,<..\..\finsh\finsh_heap.c><finsh_heap.c>
File 6,1,<..\..\finsh\finsh_init.c><finsh_init.c>
File 6,1,<..\..\finsh\finsh_node.c><finsh_node.c>
File 6,1,<..\..\finsh\finsh_ops.c><finsh_ops.c>
File 6,1,<..\..\finsh\finsh_parser.c><finsh_parser.c>
File 6,1,<..\..\finsh\finsh_token.c><finsh_token.c>
File 6,1,<..\..\finsh\finsh_var.c><finsh_var.c>
File 6,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
File 6,1,<..\..\finsh\shell.c><shell.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_cache.c><dfs_cache.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c><plibc.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c><efs.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c><extract.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c><partition.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c><ui.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c><dir.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c><fat.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c><file.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c><fs.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c><ls.c>
File 7,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c><time.c>
File 8,1,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
File 8,1,<..\..\net\lwip\src\core\dns.c><dns.c>
File 8,1,<..\..\net\lwip\src\core\init.c><init.c>
File 8,1,<..\..\net\lwip\src\core\memp.c><memp.c>
File 8,1,<..\..\net\lwip\src\core\netif.c><netif.c>
File 8,1,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
File 8,1,<..\..\net\lwip\src\core\raw.c><raw.c>
File 8,1,<..\..\net\lwip\src\core\stats.c><stats.c>
File 8,1,<..\..\net\lwip\src\core\sys.c><sys.c>
File 8,1,<..\..\net\lwip\src\core\tcp.c><tcp.c>
File 8,1,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
File 8,1,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
File 8,1,<..\..\net\lwip\src\core\udp.c><udp.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
File 8,1,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
File 8,1,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
File 8,1,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
File 8,1,<..\..\net\lwip\src\api\err.c><err.c>
File 8,1,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
File 8,1,<..\..\net\lwip\src\api\netdb.c><netdb.c>
File 8,1,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
File 8,1,<..\..\net\lwip\src\api\sockets.c><sockets.c>
File 8,1,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
File 8,1,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
File 8,1,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
File 8,1,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
Options 1,0,0 // Target 'RT-Thread STM32'
......@@ -123,7 +193,7 @@ Options 1,0,0 // Target 'RT-Thread STM32'
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD,)
ADSCUDEF ()
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32)
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\filesystem\dfs;..\..\filesystem\dfs\include;..\..\filesystem\dfs\filesystems\efsl\src\include;..\..\filesystem\dfs\filesystems\efsl\src\base\include;..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;..\..\finsh)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
......@@ -144,104 +214,14 @@ Options 1,0,0 // Target 'RT-Thread STM32'
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC ()
ADSLDMC (--keep __fsym_* --keep __vsym_*)
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH1 { 9,0,0,0,1,0,0,0,6,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JL2CM3.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt
Options 2,0,0 // Target 'RT-Thread STM32 Simulator'
Device (STM32F103ZE)
Vendor (STMicroelectronics)
Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))
FlashUt ()
StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))
FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000))
DevID (4216)
Rgf (stm32f10x_lib.h)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (ST\STM32F10x\)
OrgReg (ST\STM32F10x\)
TgStat=16
OutDir (.\obj\)
OutName (rtthread-stm32)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=0
LstDir (.\obj\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,8,0,0,8,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD, STM32_SIMULATOR)
ADSCUDEF ()
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x08000000)
ADSLDDA (0x20000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC ()
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49149,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JLTAgdi.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt
......@@ -285,6 +285,16 @@
<state>$PROJ_DIR$\Libraries\CMSIS\Core\CM3</state>
<state>$PROJ_DIR$\..\..\include</state>
<state>$PROJ_DIR$\..\..\libcpu\arm\stm32</state>
<state>$PROJ_DIR$\..\..\finsh</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\arch\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include\ipv4</state>
</option>
<option>
<name>CCStdIncCheck</name>
......@@ -1079,6 +1089,16 @@
<state>$PROJ_DIR$\Libraries\CMSIS\Core\CM3</state>
<state>$PROJ_DIR$\..\..\include</state>
<state>$PROJ_DIR$\..\..\libcpu\arm\stm32</state>
<state>$PROJ_DIR$\..\..\finsh</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\arch\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include\ipv4</state>
</option>
<option>
<name>CCStdIncCheck</name>
......@@ -1598,6 +1618,102 @@
<name>$PROJ_DIR$\Libraries\CMSIS\Core\CM3\system_stm32f10x.c</name>
</file>
</group>
<group>
<name>Filesystem</name>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_cache.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_fs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_posix.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_raw.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_util.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c</name>
</file>
</group>
<group>
<name>finsh</name>
<file>
<name>$PROJ_DIR$\..\..\finsh\cmd.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_compiler.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_error.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_heap.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_node.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_ops.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_parser.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_token.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_var.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_vm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\shell.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\symbol.c</name>
</file>
</group>
<group>
<name>Kernel</name>
<file>
......@@ -1640,6 +1756,108 @@
<name>$PROJ_DIR$\..\..\src\timer.c</name>
</file>
</group>
<group>
<name>LwIP</name>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\api_lib.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\api_msg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\autoip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\dhcp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\dns.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\err.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\netif\etharp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\netif\ethernetif.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\icmp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\igmp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\inet.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\inet_chksum.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip_addr.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip_frag.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\memp_tiny.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\netbuf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\netdb.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\netif.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\netifapi.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\pbuf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\raw.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\sockets.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\stats.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\sys.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\arch\sys_arch.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\arch\sys_arch_init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\tcp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\tcp_in.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\tcp_out.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\tcpip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\udp.c</name>
</file>
</group>
<group>
<name>Startup</name>
<file>
......@@ -1648,18 +1866,39 @@
<file>
<name>$PROJ_DIR$\board.c</name>
</file>
<file>
<name>$PROJ_DIR$\board.h</name>
</file>
<file>
<name>$PROJ_DIR$\dm9000a.c</name>
</file>
<file>
<name>$PROJ_DIR$\enc28j60.c</name>
</file>
<file>
<name>$PROJ_DIR$\led.c</name>
</file>
<file>
<name>$PROJ_DIR$\msd.c</name>
</file>
<file>
<name>$PROJ_DIR$\rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\rtconfig.h</name>
</file>
<file>
<name>$PROJ_DIR$\sdcard.c</name>
</file>
<file>
<name>$PROJ_DIR$\startup.c</name>
</file>
<file>
<name>$PROJ_DIR$\stm32f10x_it.c</name>
</file>
<file>
<name>$PROJ_DIR$\usart.c</name>
</file>
</group>
<group>
<name>StdPeriph_Driver</name>
......@@ -1747,6 +1986,9 @@
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\interrupt.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\serial.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\stack.c</name>
</file>
......
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
*/
/**
* @addtogroup STM32
*/
/*@{*/
#include <board.h>
#include <rtthread.h>
#ifdef RT_USING_DFS
/* dfs init */
#include <dfs_init.h>
/* dfs filesystem:ELM filesystem init */
#include <dfs_elm.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#endif
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <lwip/api.h>
#include <netif/ethernetif.h>
#endif
void rt_init_thread_entry(void* parameter)
{
/* Filesystem Initialization */
#ifdef RT_USING_DFS
{
/* init the device filesystem */
dfs_init();
#ifdef RT_USING_DFS_ELMFAT
/* init the elm chan FatFs filesystam*/
elm_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
{
rt_kprintf("File System initialized!\n");
}
else
rt_kprintf("File System initialzation failed!\n");
#endif
}
#endif
/* LwIP Initialization */
#ifdef RT_USING_LWIP
{
extern void lwip_sys_init(void);
/* register ethernetif device */
eth_system_device_init();
#ifdef STM32F10X_CL
rt_hw_stm32_eth_init();
#else
/* STM32F103 */
#if STM32_ETH_IF == 0
rt_hw_enc28j60_init();
#elif STM32_ETH_IF == 1
rt_hw_dm9000_init();
#endif
#endif
/* re-init device driver */
rt_device_init_all();
/* init lwip system */
lwip_sys_init();
rt_kprintf("TCP/IP initialized!\n");
}
#endif
}
int rt_application_init()
{
rt_thread_t init_thread;
#if (RT_THREAD_PRIORITY_MAX == 32)
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 8, 20);
#else
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 80, 20);
#endif
if (init_thread != RT_NULL)
rt_thread_startup(init_thread);
return 0;
}
/*@}*/
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-09-22 Bernard add board.h to this bsp
*/
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef __BOARD_H__
#define __BOARD_H__
/* board configuration */
// <o> SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
// <i>Default: 1
#define STM32_USE_SDIO 0
/* whether use board external SRAM memory */
// <e>Use external SRAM memory on the board
// <i>Enable External SRAM memory
#define STM32_EXT_SRAM 0
// <o>Begin Address of External SRAM
// <i>Default: 0x68000000
#define STM32_EXT_SRAM_BEGIN 0x68000000 /* the begining address of external SRAM */
// <o>End Address of External SRAM
// <i>Default: 0x68080000
#define STM32_EXT_SRAM_END 0x68080000 /* the end address of external SRAM */
// </e>
// <o> Internal SRAM memory size[Kbytes] <8-64>
// <i>Default: 64
#define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
// <i>Default: 1
#define STM32_CONSOLE_USART 2
// <o> Ethernet Interface: <0=> Microchip ENC28J60 <1=> Davicom DM9000A
// <i>Default: 0
#define STM32_ETH_IF 0
void rt_hw_board_led_on(int n);
void rt_hw_board_led_off(int n);
void rt_hw_board_init(void);
#if STM32_CONSOLE_USART == 0
#define CONSOLE_DEVICE "no"
#elif STM32_CONSOLE_USART == 1
#define CONSOLE_DEVICE "uart1"
#elif STM32_CONSOLE_USART == 2
#define CONSOLE_DEVICE "uart2"
#elif STM32_CONSOLE_USART == 3
#define CONSOLE_DEVICE "uart3"
#endif
void rt_hw_usart_init(void);
/* SD Card init function */
void rt_hw_sdcard_init(void);
void rt_hw_msd_init(void);
/* ETH interface init function */
void rt_hw_enc28j60_init(void);
void rt_hw_dm9000_init(void);
#endif
// <<< Use Configuration Wizard in Context Menu >>>
此差异已折叠。
/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : msd.h
* Author : MCD Application Team
* Version : V2.1
* Date : 05/30/2008
* Description : Header for msd.c file.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED
* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MSD_H
#define __MSD_H
/* Includes ------------------------------------------------------------------*/
#include <stm32f10x.h>
/* Private define ------------------------------------------------------------*/
/* Block Size */
#define BLOCK_SIZE 512
/* Dummy byte */
#define DUMMY 0xFF
/* Start Data tokens */
/* Tokens (necessary because at nop/idle (and CS active) only 0xff is on the data/command line) */
#define MSD_START_DATA_SINGLE_BLOCK_READ 0xFE /* Data token start byte, Start Single Block Read */
#define MSD_START_DATA_MULTIPLE_BLOCK_READ 0xFE /* Data token start byte, Start Multiple Block Read */
#define MSD_START_DATA_SINGLE_BLOCK_WRITE 0xFE /* Data token start byte, Start Single Block Write */
#define MSD_START_DATA_MULTIPLE_BLOCK_WRITE 0xFD /* Data token start byte, Start Multiple Block Write */
#define MSD_STOP_DATA_MULTIPLE_BLOCK_WRITE 0xFD /* Data toke stop byte, Stop Multiple Block Write */
/* MSD functions return */
#define MSD_SUCCESS 0x00
#define MSD_FAIL 0xFF
/* MSD reponses and error flags */
#define MSD_RESPONSE_NO_ERROR 0x00
#define MSD_IN_IDLE_STATE 0x01
#define MSD_ERASE_RESET 0x02
#define MSD_ILLEGAL_COMMAND 0x04
#define MSD_COM_CRC_ERROR 0x08
#define MSD_ERASE_SEQUENCE_ERROR 0x10
#define MSD_ADDRESS_ERROR 0x20
#define MSD_PARAMETER_ERROR 0x40
#define MSD_RESPONSE_FAILURE 0xFF
/* Data response error */
#define MSD_DATA_OK 0x05
#define MSD_DATA_CRC_ERROR 0x0B
#define MSD_DATA_WRITE_ERROR 0x0D
#define MSD_DATA_OTHER_ERROR 0xFF
/* Commands: CMDxx = CMD-number | 0x40 */
#define MSD_GO_IDLE_STATE 0 /* CMD0=0x40 */
#define MSD_SEND_OP_COND 1 /* CMD1=0x41 */
#define MSD_SEND_CSD 9 /* CMD9=0x49 */
#define MSD_SEND_CID 10 /* CMD10=0x4A */
#define MSD_STOP_TRANSMISSION 12 /* CMD12=0x4C */
#define MSD_SEND_STATUS 13 /* CMD13=0x4D */
#define MSD_SET_BLOCKLEN 16 /* CMD16=0x50 */
#define MSD_READ_SINGLE_BLOCK 17 /* CMD17=0x51 */
#define MSD_READ_MULTIPLE_BLOCK 18 /* CMD18=0x52 */
#define MSD_SET_BLOCK_COUNT 23 /* CMD23=0x57 */
#define MSD_WRITE_BLOCK 24 /* CMD24=0x58 */
#define MSD_WRITE_MULTIPLE_BLOCK 25 /* CMD25=0x59 */
#define MSD_PROGRAM_CSD 27 /* CMD27=0x5B */
#define MSD_SET_WRITE_PROT 28 /* CMD28=0x5C */
#define MSD_CLR_WRITE_PROT 29 /* CMD29=0x5D */
#define MSD_SEND_WRITE_PROT 30 /* CMD30=0x5E */
#define MSD_TAG_SECTOR_START 32 /* CMD32=0x60 */
#define MSD_TAG_SECTOR_END 33 /* CMD33=0x61 */
#define MSD_UNTAG_SECTOR 34 /* CMD34=0x62 */
#define MSD_TAG_ERASE_GROUP_START 35 /* CMD35=0x63 */
#define MSD_TAG_ERASE_GROUP_END 36 /* CMD36=0x64 */
#define MSD_UNTAG_ERASE_GROUP 37 /* CMD37=0x65 */
#define MSD_ERASE 38 /* CMD38=0x66 */
#define MSD_READ_OCR 39 /* CMD39=0x67 */
#define MSD_CRC_ON_OFF 40 /* CMD40=0x68 */
/* Exported types ------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
typedef struct _MSD_CSD /*Card Specific Data*/
{
vu8 CSDStruct; /* CSD structure */
vu8 SysSpecVersion; /* System specification version */
vu8 Reserved1; /* Reserved */
vu8 TAAC; /* Data read access-time 1 */
vu8 NSAC; /* Data read access-time 2 in CLK cycles */
vu8 MaxBusClkFrec; /* Max. bus clock frequency */
vu16 CardComdClasses; /* Card command classes */
vu8 RdBlockLen; /* Max. read data block length */
vu8 PartBlockRead; /* Partial blocks for read allowed */
vu8 WrBlockMisalign; /* Write block misalignment */
vu8 RdBlockMisalign; /* Read block misalignment */
vu8 DSRImpl; /* DSR implemented */
vu8 Reserved2; /* Reserved */
vu16 DeviceSize; /* Device Size */
vu8 MaxRdCurrentVDDMin; /* Max. read current @ VDD min */
vu8 MaxRdCurrentVDDMax; /* Max. read current @ VDD max */
vu8 MaxWrCurrentVDDMin; /* Max. write current @ VDD min */
vu8 MaxWrCurrentVDDMax; /* Max. write current @ VDD max */
vu8 DeviceSizeMul; /* Device size multiplier */
vu8 EraseGrSize; /* Erase group size */
vu8 EraseGrMul; /* Erase group size multiplier */
vu8 WrProtectGrSize; /* Write protect group size */
vu8 WrProtectGrEnable; /* Write protect group enable */
vu8 ManDeflECC; /* Manufacturer default ECC */
vu8 WrSpeedFact; /* Write speed factor */
vu8 MaxWrBlockLen; /* Max. write data block length */
vu8 WriteBlockPaPartial; /* Partial blocks for write allowed */
vu8 Reserved3; /* Reserded */
vu8 ContentProtectAppli; /* Content protection application */
vu8 FileFormatGrouop; /* File format group */
vu8 CopyFlag; /* Copy flag (OTP) */
vu8 PermWrProtect; /* Permanent write protection */
vu8 TempWrProtect; /* Temporary write protection */
vu8 FileFormat; /* File Format */
vu8 ECC; /* ECC code */
vu8 msd_CRC; /* CRC */
vu8 Reserved4; /* always 1*/
}
sMSD_CSD;
typedef struct _MSD_CID /*Card Identification Data*/
{
vu8 ManufacturerID; /* ManufacturerID */
vu16 OEM_AppliID; /* OEM/Application ID */
vu32 ProdName1; /* Product Name part1 */
vu8 ProdName2; /* Product Name part2*/
vu8 ProdRev; /* Product Revision */
vu32 ProdSN; /* Product Serial Number */
vu8 Reserved1; /* Reserved1 */
vu16 ManufactDate; /* Manufacturing Date */
vu8 msd_CRC; /* CRC */
vu8 Reserved2; /* always 1*/
}
sMSD_CID;
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/*----- High layer function -----*/
u8 MSD_Init(void);
u8 MSD_WriteBlock(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite);
u8 MSD_ReadBlock(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead);
u8 MSD_WriteBuffer(u8* pBuffer, u32 WriteAddr, u32 NumByteToWrite);
u8 MSD_ReadBuffer(u8* pBuffer, u32 ReadAddr, u32 NumByteToRead);
u8 MSD_GetCSDRegister(sMSD_CSD* MSD_csd);
u8 MSD_GetCIDRegister(sMSD_CID* MSD_cid);
/*----- Medium layer function -----*/
void MSD_SendCmd(u8 Cmd, u32 Arg, u8 Crc);
u8 MSD_GetResponse(u8 Response);
u8 MSD_GetDataResponse(void);
u8 MSD_GoIdleState(void);
u16 MSD_GetStatus(void);
/*----- Low layer function -----*/
void MSD_WriteByte(u8 byte);
u8 MSD_ReadByte(void);
#endif /* __MSD_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'
Group (Startup)
Group (StdPeriph_Driver)
Group (CMSIS)
Group (Kernel)
Group (STM32)
Group (LwIP)
Group (finsh)
Group (Filesystem)
File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
File 1,1,<.\board.c><board.c>
File 1,1,<.\application.c><application.c>
File 1,1,<.\startup.c><startup.c>
File 1,1,<.\led.c><led.c>
File 1,1,<.\usart.c><usart.c>
File 1,5,<.\rtconfig.h><rtconfig.h>
File 1,5,<.\board.h><board.h>
File 1,1,<.\stm32_eth.c><stm32_eth.c>
File 1,1,<.\rtc.c><rtc.c>
File 1,1,<.\msd.c><msd.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
File 4,1,<..\..\src\clock.c><clock.c>
File 4,1,<..\..\src\device.c><device.c>
File 4,1,<..\..\src\idle.c><idle.c>
File 4,1,<..\..\src\ipc.c><ipc.c>
File 4,1,<..\..\src\irq.c><irq.c>
File 4,1,<..\..\src\kservice.c><kservice.c>
File 4,1,<..\..\src\mem.c><mem.c>
File 4,1,<..\..\src\mempool.c><mempool.c>
File 4,1,<..\..\src\object.c><object.c>
File 4,1,<..\..\src\scheduler.c><scheduler.c>
File 4,1,<..\..\src\slab.c><slab.c>
File 4,1,<..\..\src\thread.c><thread.c>
File 4,1,<..\..\src\timer.c><timer.c>
File 5,1,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
File 5,1,<..\..\libcpu\arm\stm32\fault.c><fault.c>
File 5,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
File 5,1,<..\..\libcpu\arm\stm32\stack.c><stack.c>
File 5,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
File 5,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
File 6,1,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
File 6,1,<..\..\net\lwip\src\core\dns.c><dns.c>
File 6,1,<..\..\net\lwip\src\core\init.c><init.c>
File 6,1,<..\..\net\lwip\src\core\memp.c><memp.c>
File 6,1,<..\..\net\lwip\src\core\netif.c><netif.c>
File 6,1,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
File 6,1,<..\..\net\lwip\src\core\raw.c><raw.c>
File 6,1,<..\..\net\lwip\src\core\stats.c><stats.c>
File 6,1,<..\..\net\lwip\src\core\sys.c><sys.c>
File 6,1,<..\..\net\lwip\src\core\tcp.c><tcp.c>
File 6,1,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
File 6,1,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
File 6,1,<..\..\net\lwip\src\core\udp.c><udp.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
File 6,1,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
File 6,1,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
File 6,1,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
File 6,1,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
File 6,1,<..\..\net\lwip\src\api\err.c><err.c>
File 6,1,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
File 6,1,<..\..\net\lwip\src\api\netdb.c><netdb.c>
File 6,1,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
File 6,1,<..\..\net\lwip\src\api\sockets.c><sockets.c>
File 6,1,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
File 6,1,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
File 6,1,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
File 6,1,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
File 7,1,<..\..\finsh\symbol.c><symbol.c>
File 7,1,<..\..\finsh\cmd.c><cmd.c>
File 7,1,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
File 7,1,<..\..\finsh\finsh_error.c><finsh_error.c>
File 7,1,<..\..\finsh\finsh_heap.c><finsh_heap.c>
File 7,1,<..\..\finsh\finsh_init.c><finsh_init.c>
File 7,1,<..\..\finsh\finsh_node.c><finsh_node.c>
File 7,1,<..\..\finsh\finsh_ops.c><finsh_ops.c>
File 7,1,<..\..\finsh\finsh_parser.c><finsh_parser.c>
File 7,1,<..\..\finsh\finsh_token.c><finsh_token.c>
File 7,1,<..\..\finsh\finsh_var.c><finsh_var.c>
File 7,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
File 7,1,<..\..\finsh\shell.c><shell.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
File 8,1,<..\..\filesystem\dfs\filesystems\elmfat\dfs_elm.c><dfs_elm.c>
File 8,1,<..\..\filesystem\dfs\filesystems\elmfat\ff.c><ff.c>
Options 1,0,0 // Target 'RT-Thread STM32'
Device (STM32F107xC)
Vendor (STMicroelectronics)
Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))
FlashUt ()
StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))
FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_256 -FS08000000 -FL080000))
DevID (0)
Rgf (stm32f10x_lib.h)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (ST\STM32F10x\)
OrgReg (ST\STM32F10x\)
TgStat=16
OutDir (.\obj\)
OutName (rtthread-stm32)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=0
LstDir (.\obj\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,8,0,0,4,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,4,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_CL,)
ADSCUDEF ()
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\finsh;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;..\..\filesystem\dfs;..\..\filesystem\dfs\include)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x08000000)
ADSLDDA (0x20000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC (--keep __fsym_* --keep __vsym_*)
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 1,0,0,0,1,0,0,0,6,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JL2CM3.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt
此差异已折叠。
此差异已折叠。
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second */
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug */
#define RT_DEBUG
#define RT_THREAD_DEBUG
#define RT_USING_OVERFLOW_CHECK
/* Using Hook */
#define RT_USING_HOOK
/* Using Software Timer */
/* #define RT_USING_TIMER_SOFT */
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_TICK_PER_SECOND 10
/* SECTION: IPC */
/* Using Semaphore*/
#define RT_USING_SEMAPHORE
/* Using Mutex */
#define RT_USING_MUTEX
/* Using Event */
#define RT_USING_EVENT
/* Using MailBox */
#define RT_USING_MAILBOX
/* Using Message Queue */
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
#define RT_USING_MEMPOOL
/* Using Dynamic Heap Management */
#define RT_USING_HEAP
/* Using Small MM */
#define RT_USING_SMALL_MEM
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
#define RT_USING_UART2
/* SECTION: Console options */
/* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: finsh, a C-Express shell */
#define RT_USING_FINSH
/* Using symbol table */
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_DEVICE_NAME "uart2"
/* SECTION: device filesystem */
#define RT_USING_DFS
#define RT_USING_DFS_ELMFAT
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
#define RT_USING_LWIP
/* LwIP uses RT-Thread Memory Management */
#define RT_LWIP_USING_RT_MEM
/* Enable ICMP protocol*/
#define RT_LWIP_ICMP
/* Enable UDP protocol*/
#define RT_LWIP_UDP
/* Enable TCP protocol*/
#define RT_LWIP_TCP
/* Enable DNS */
#define RT_LWIP_DNS
/* the number of simulatenously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 1
#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 1
#define RT_LWIP_GWADDR3 1
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* tcp thread options */
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
/* ethernet if thread options */
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#endif
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-31 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include "stm32f10x.h"
#include "board.h"
#include "rtc.h"
/**
* @addtogroup STM32
*/
/*@{*/
extern int rt_application_init(void);
#ifdef RT_USING_FINSH
extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
extern int __bss_end;
#endif
#ifdef DEBUG
/*******************************************************************************
* Function Name : assert_failed
* Description : Reports the name of the source file and the source line number
* where the assert error has occurred.
* Input : - file: pointer to the source file name
* - line: assert error line source number
* Output : None
* Return : None
*******************************************************************************/
void assert_failed(u8* file, u32 line)
{
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line);
while (1) ;
}
#endif
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_HEAP
#if STM32_EXT_SRAM
rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
#else
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
#else
/* init memory system */
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
#endif
#endif
#endif
/* init scheduler system */
rt_system_scheduler_init();
#ifdef RT_USING_DFS
/* init sdcard driver */
#if STM32_USE_SDIO
rt_hw_sdcard_init();
#else
rt_hw_msd_init();
#endif
#endif
rt_hw_rtc_init();
/* init all device */
rt_device_init_all();
/* init application */
rt_application_init();
#ifdef RT_USING_FINSH
/* init finsh */
finsh_system_init();
finsh_set_device(FINSH_DEVICE_NAME);
#endif
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
rt_uint32_t UNUSED level;
/* disable interrupt first */
level = rt_hw_interrupt_disable();
/* init system setting */
SystemInit();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/*@}*/
/**
******************************************************************************
* @file Project/Template/stm32f10x_it.c
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_it.h"
#include <board.h>
#include <rtthread.h>
/** @addtogroup Template_Project
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/******************************************************************************/
/* STM32F10x Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f10x_xx.s). */
/******************************************************************************/
/*******************************************************************************
* Function Name : DMA1_Channel2_IRQHandler
* Description : This function handles DMA1 Channel 2 interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void DMA1_Channel2_IRQHandler(void)
{
#ifdef RT_USING_UART3
extern struct rt_device uart3_device;
extern void rt_hw_serial_dma_tx_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
if (DMA_GetITStatus(DMA1_IT_TC2))
{
/* transmission complete, invoke serial dma tx isr */
rt_hw_serial_dma_tx_isr(&uart3_device);
}
/* clear DMA flag */
DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART1_IRQHandler
* Description : This function handles USART1 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART1_IRQHandler(void)
{
#ifdef RT_USING_UART1
extern struct rt_device uart1_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart1_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART2_IRQHandler
* Description : This function handles USART2 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART2_IRQHandler(void)
{
#ifdef RT_USING_UART2
extern struct rt_device uart2_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart2_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART3_IRQHandler
* Description : This function handles USART3 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART3_IRQHandler(void)
{
#ifdef RT_USING_UART3
extern struct rt_device uart3_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart3_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
#if defined(RT_USING_DFS) && STM32_USE_SDIO
/*******************************************************************************
* Function Name : SDIO_IRQHandler
* Description : This function handles SDIO global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SDIO_IRQHandler(void)
{
extern int SD_ProcessIRQSrc(void);
/* enter interrupt */
rt_interrupt_enter();
/* Process All SDIO Interrupt Sources */
SD_ProcessIRQSrc();
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef RT_USING_LWIP
#ifdef STM32F10X_CL
/*******************************************************************************
* Function Name : ETH_IRQHandler
* Description : This function handles ETH interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void ETH_IRQHandler(void)
{
extern void rt_hw_stm32_eth_isr(void);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_stm32_eth_isr();
/* leave interrupt */
rt_interrupt_leave();
}
#else
#if (STM32_ETH_IF == 0)
/*******************************************************************************
* Function Name : EXTI0_IRQHandler
* Description : This function handles External interrupt Line 0 request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void EXTI0_IRQHandler(void)
{
extern void enc28j60_isr(void);
/* enter interrupt */
rt_interrupt_enter();
enc28j60_isr();
/* Clear the Key Button EXTI line pending bit */
EXTI_ClearITPendingBit(EXTI_Line0);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#if (STM32_ETH_IF == 1)
/*******************************************************************************
* Function Name : EXTI9_5_IRQHandler
* Description : This function handles External lines 9 to 5 interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void EXTI9_5_IRQHandler(void)
{
extern void rt_dm9000_isr(void);
/* enter interrupt */
rt_interrupt_enter();
rt_dm9000_isr();
/* Clear the Key Button EXTI line pending bit */
EXTI_ClearITPendingBit(EXTI_Line7);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#endif
#endif /* end of RT_USING_LWIP */
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
/**
******************************************************************************
* @file Project/Template/stm32f10x_it.h
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_IT_H
#define __STM32F10x_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F10x_IT_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
*/
/**
* @addtogroup STM32
*/
/*@{*/
#include <rtthread.h>
#ifdef RT_USING_DFS
/* dfs init */
#include <dfs_init.h>
/* dfs filesystem:ELM FatFs filesystem init */
#include <dfs_elm.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#endif
void rt_init_thread_entry(void* parameter)
{
/* Filesystem Initialization */
#ifdef RT_USING_DFS
{
/* init the device filesystem */
dfs_init();
#ifdef RT_USING_DFS_ELMFAT
/* init the elm FAT filesystam*/
elm_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
rt_kprintf("File System initialized!\n");
else
rt_kprintf("File System init failed!\n");
#endif
}
#endif
}
int rt_application_init()
{
rt_thread_t init_thread;
#if (RT_THREAD_PRIORITY_MAX == 32)
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 8, 20);
#else
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 80, 20);
#endif
if (init_thread != RT_NULL)
rt_thread_startup(init_thread);
return 0;
}
/*@}*/
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'
Group (Startup)
Group (StdPeriph_Driver)
Group (CMSIS)
Group (Kernel)
Group (STM32)
Group (Filesystem)
File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
File 1,1,<.\board.c><board.c>
File 1,1,<.\application.c><application.c>
File 1,1,<.\startup.c><startup.c>
File 1,1,<.\led.c><led.c>
File 1,1,<.\usart.c><usart.c>
File 1,1,<.\msd.c><msd.c>
File 1,1,<.\sdcard.c><sdcard.c>
File 1,5,<.\rtconfig.h><rtconfig.h>
File 1,5,<.\board.h><board.h>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
File 4,1,<..\..\src\clock.c><clock.c>
File 4,1,<..\..\src\device.c><device.c>
File 4,1,<..\..\src\idle.c><idle.c>
File 4,1,<..\..\src\ipc.c><ipc.c>
File 4,1,<..\..\src\irq.c><irq.c>
File 4,1,<..\..\src\kservice.c><kservice.c>
File 4,1,<..\..\src\mem.c><mem.c>
File 4,1,<..\..\src\mempool.c><mempool.c>
File 4,1,<..\..\src\object.c><object.c>
File 4,1,<..\..\src\scheduler.c><scheduler.c>
File 4,1,<..\..\src\slab.c><slab.c>
File 4,1,<..\..\src\thread.c><thread.c>
File 4,1,<..\..\src\timer.c><timer.c>
File 5,1,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
File 5,1,<..\..\libcpu\arm\stm32\fault.c><fault.c>
File 5,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
File 5,1,<..\..\libcpu\arm\stm32\stack.c><stack.c>
File 5,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
File 5,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
File 6,1,<..\..\filesystem\dfs\filesystems\elmfat\dfs_elm.c><dfs_elm.c>
File 6,1,<..\..\filesystem\dfs\filesystems\elmfat\ff.c><ff.c>
Options 1,0,0 // Target 'RT-Thread STM32'
Device (STM32F103ZE)
Vendor (STMicroelectronics)
Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))
FlashUt ()
StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))
FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000))
DevID (4216)
Rgf (stm32f10x_lib.h)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (ST\STM32F10x\)
OrgReg (ST\STM32F10x\)
TgStat=16
OutDir (.\obj\)
OutName (rtthread-stm32)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=0
LstDir (.\obj\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,8,0,0,8,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD,)
ADSCUDEF ()
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\filesystem\dfs;..\..\filesystem\dfs\include;..\..\finsh)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x08000000)
ADSLDDA (0x20000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC ()
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JL2CM3.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt
此差异已折叠。
此差异已折叠。
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second */
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug */
#define RT_DEBUG
#define RT_THREAD_DEBUG
#define RT_USING_OVERFLOW_CHECK
/* Using Hook */
#define RT_USING_HOOK
/* Using Software Timer */
/* #define RT_USING_TIMER_SOFT */
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_TICK_PER_SECOND 10
/* SECTION: IPC */
/* Using Semaphore*/
#define RT_USING_SEMAPHORE
/* Using Mutex */
#define RT_USING_MUTEX
/* Using Event */
#define RT_USING_EVENT
/* Using MailBox */
#define RT_USING_MAILBOX
/* Using Message Queue */
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
#define RT_USING_MEMPOOL
/* Using Dynamic Heap Management */
#define RT_USING_HEAP
/* Using Small MM */
#define RT_USING_SMALL_MEM
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
#define RT_USING_UART1
/* SECTION: Console options */
/* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: FinSH shell options */
/* Using FinSH as Shell*/
/* #define RT_USING_FINSH */
/* Using symbol table */
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
/* SECTION: device filesystem */
#define RT_USING_DFS
/* #define RT_USING_DFS_EFSL */
#define RT_USING_DFS_ELMFAT
#define RT_DFS_ELM_WORD_ACCESS
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
#endif
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-31 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include "stm32f10x.h"
#include "board.h"
/**
* @addtogroup STM32
*/
/*@{*/
extern int rt_application_init(void);
#ifdef RT_USING_FINSH
extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
extern int __bss_end;
#endif
#ifdef DEBUG
/*******************************************************************************
* Function Name : assert_failed
* Description : Reports the name of the source file and the source line number
* where the assert error has occurred.
* Input : - file: pointer to the source file name
* - line: assert error line source number
* Output : None
* Return : None
*******************************************************************************/
void assert_failed(u8* file, u32 line)
{
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line);
while (1) ;
}
#endif
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_HEAP
#if STM32_EXT_SRAM
rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
#else
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
#else
/* init memory system */
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
#endif
#endif
#endif
/* init scheduler system */
rt_system_scheduler_init();
/* init sdcard driver */
#if STM32_USE_SDIO
rt_hw_sdcard_init();
#else
rt_hw_msd_init();
#endif
/* init all device */
rt_device_init_all();
/* init application */
rt_application_init();
#ifdef RT_USING_FINSH
/* init finsh */
finsh_system_init();
finsh_set_device("uart1");
#endif
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
rt_uint32_t UNUSED level;
/* disable interrupt first */
level = rt_hw_interrupt_disable();
/* init system setting */
SystemInit();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/*@}*/
/**
******************************************************************************
* @file Project/Template/stm32f10x_conf.h
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief Library configuration file.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_CONF_H
#define __STM32F10x_CONF_H
/* Includes ------------------------------------------------------------------*/
/* Uncomment the line below to enable peripheral header file inclusion */
/* #include "stm32f10x_adc.h" */
#include "stm32f10x_bkp.h"
/* #include "stm32f10x_can.h" */
/* #include "stm32f10x_crc.h" */
/* #include "stm32f10x_dac.h" */
/* #include "stm32f10x_dbgmcu.h" */
/* #include "stm32f10x_dma.h" */
#include "stm32f10x_exti.h"
#include "stm32f10x_flash.h"
//#include "stm32f10x_fsmc.h"
#include "stm32f10x_gpio.h"
/* #include "stm32f10x_i2c.h" */
/* #include "stm32f10x_iwdg.h" */
#include "stm32f10x_pwr.h"
#include "stm32f10x_rcc.h"
#include "stm32f10x_rtc.h"
/* #include "stm32f10x_sdio.h" */
//#include "stm32f10x_spi.h"
/* #include "stm32f10x_tim.h" */
#include "stm32f10x_usart.h"
/* #include "stm32f10x_wwdg.h" */
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#endif /* __STM32F10x_CONF_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
此差异已折叠。
/**
******************************************************************************
* @file Project/Template/stm32f10x_it.h
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_IT_H
#define __STM32F10x_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F10x_IT_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
*/
/**
* @addtogroup STM32
*/
/*@{*/
#include <rtthread.h>
int rt_application_init()
{
return 0;
}
/*@}*/
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'
Group (Startup)
Group (StdPeriph_Driver)
Group (CMSIS)
Group (Kernel)
Group (STM32)
Group (finsh)
File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
File 1,1,<.\board.c><board.c>
File 1,1,<.\application.c><application.c>
File 1,1,<.\startup.c><startup.c>
File 1,1,<.\led.c><led.c>
File 1,1,<.\usart.c><usart.c>
File 1,5,<.\rtconfig.h><rtconfig.h>
File 1,5,<.\board.h><board.h>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
File 4,1,<..\..\src\clock.c><clock.c>
File 4,1,<..\..\src\device.c><device.c>
File 4,1,<..\..\src\idle.c><idle.c>
File 4,1,<..\..\src\ipc.c><ipc.c>
File 4,1,<..\..\src\irq.c><irq.c>
File 4,1,<..\..\src\kservice.c><kservice.c>
File 4,1,<..\..\src\mem.c><mem.c>
File 4,1,<..\..\src\mempool.c><mempool.c>
File 4,1,<..\..\src\object.c><object.c>
File 4,1,<..\..\src\scheduler.c><scheduler.c>
File 4,1,<..\..\src\slab.c><slab.c>
File 4,1,<..\..\src\thread.c><thread.c>
File 4,1,<..\..\src\timer.c><timer.c>
File 5,1,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
File 5,1,<..\..\libcpu\arm\stm32\fault.c><fault.c>
File 5,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
File 5,1,<..\..\libcpu\arm\stm32\stack.c><stack.c>
File 5,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
File 5,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
File 6,1,<..\..\finsh\symbol.c><symbol.c>
File 6,1,<..\..\finsh\cmd.c><cmd.c>
File 6,1,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
File 6,1,<..\..\finsh\finsh_error.c><finsh_error.c>
File 6,1,<..\..\finsh\finsh_heap.c><finsh_heap.c>
File 6,1,<..\..\finsh\finsh_init.c><finsh_init.c>
File 6,1,<..\..\finsh\finsh_node.c><finsh_node.c>
File 6,1,<..\..\finsh\finsh_ops.c><finsh_ops.c>
File 6,1,<..\..\finsh\finsh_parser.c><finsh_parser.c>
File 6,1,<..\..\finsh\finsh_token.c><finsh_token.c>
File 6,1,<..\..\finsh\finsh_var.c><finsh_var.c>
File 6,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
File 6,1,<..\..\finsh\shell.c><shell.c>
Options 1,0,0 // Target 'RT-Thread STM32'
Device (STM32F103ZE)
Vendor (STMicroelectronics)
Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))
FlashUt ()
StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))
FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000))
DevID (4216)
Rgf (stm32f10x_lib.h)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (ST\STM32F10x\)
OrgReg (ST\STM32F10x\)
TgStat=16
OutDir (.\obj\)
OutName (rtthread-stm32)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=0
LstDir (.\obj\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,8,0,0,8,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD,)
ADSCUDEF ()
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\finsh)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x08000000)
ADSLDDA (0x20000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC (--keep __fsym_* --keep __vsym_*)
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JL2CM3.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>
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