提交 383509e2 编写于 作者: W wangyq2018

[bsp]add bsp essemi/es8p508x.

上级 96fd9a50
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart5"
CONFIG_RT_VER_NUM=0x40002
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=2048
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_LIBC_USING_TIME is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_LCD_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
CONFIG_SOC_ES8P508x=y
#
# Hardware Drivers Config
#
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
#
# UART Drivers
#
# CONFIG_BSP_USING_UART0 is not set
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set
CONFIG_BSP_USING_UART5=y
#
# Onboard Peripheral Drivers
#
#
# Offboard Peripheral Drivers
#
mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_ES8P508x
bool
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
source "drivers/Kconfig"
# HRSDK-GDB-ES8P508 开发板 BSP 说明
标签: EastSoft、国产MCU、Cortex-M0、ES8P5088FLLQ
## 1. 简介
本文档为上海东软载波微电子开发团队为 HRSDK-GDB-ES8P508 开发板提供的 BSP (板级支持包) 说明。
通过阅读本文档,开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。
### 1.1 开发板介绍
主要内容如下:
HRSDK-GDB-ES8P508x 是东软载波微电子官方推出的一款基于 ARM Cortex-M0 内核的开发板,最高主频为 48MHz,可满足基础功能测试及高端功能扩展等开发需求。
开发板外观如下图所示:
HRSDK-GDB-ES8P508x-V1.0
![ES8P508](figures/HRSDK-GDB-ES8P508x-V1.0.jpg)
该开发板常用 **板载资源** 如下:
- MCU:ES8P5088FLLQ,主频 48MHz,24KB SRAM,128KB FLASH,45 GPIOs
- 常用外设
- LED:1个,(PA14)
- 按键:1个(MRSTN)
- 常用接口:GPIO、UART、SPI、I2C
- 调试接口,ESLinkⅡ(EastSoft 官方推出的开发工具,有标准版和mini版两种版本,均自带 CDC 串口功能) SWD 下载
外设支持:
本 BSP 目前对外设的支持情况如下:
| **片上外设** | **支持情况** | **备注** |
| :---------------- | :----------: | :-----------------------------------|
| GPIO | 支持 | 45 GPIOs |
| UART | 支持 | UART0/1/2/3/4/5 |
更多详细信息请咨询[上海东软载波微电子技术支持](http://www.essemi.com/)
## 2. 快速上手
本 BSP 为开发者提供 MDK4 工程。下面以 MDK4 开发环境为例,介绍如何将系统运行起来。
### 硬件连接
使用 ESLinkⅡ (自带 CDC 串口)或 Jlink 等调试工具连接开发板到 PC,拨动开关选择使用调试工具供电或使用外部电源供电。若使用 Jlink 等调试工具,还需要将 UART5_TX(PB13)、UART5_RX(PB12)、GND 接到串口工具上。
使用ESlinkⅡ(mini)连接开发板如下图所示:
ESLinkⅡ(mini) + HRSDK-GDB-ES8P508-V1.0
![ESLinkII](figures/ESLinkII-mini.jpg)
### 编译下载
双击 project.uvprojx 文件,打开 MDK4 工程,工程默认配置使用 JLink 下载程序,在通过 JLink 连接开发板的基础上,点击下载按钮即可下载程序到开发板,如果使用 ESLinkⅡ,则选择 "CMSIS-DAP Debugger",连接正常后即可编译并下载程序到开发板。
### 运行结果
下载程序成功之后,系统会自动运行,观察串口输出的信息,同时开发板LED闪烁。
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.2 build Jul 12 2019
2006 - 2019 Copyright by rt-thread team
msh />
```
## 3. 进阶使用
此 BSP 默认只开启了 GPIO 和 uart5 的功能,如果需使用 SPI 等更多高级功能,需要利用 ENV 工具对 BSP 进行配置,步骤如下:
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程,配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=MDK4` 命令重新生成工程。
更多 Env 工具的详细介绍请参考 [RT-Thread 文档中心](https://www.rt-thread.org/document/site/)
## 4. 联系人信息
- [wangyongquan](https://github.com/wangyq2018)
## 5. 参考
- [ EastSoft 官网](http://www.essemi.com)
# for module compiling
import os
Import('RTT_ROOT')
objs = []
cwd = str(Dir('#'))
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-12 wangyq the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <lib_wdt.h>
#define LED_PIN 29
int main(void)
{
int count = 1;
/* set PA14 pin mode to output */
rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
while (count++)
{
rt_pin_write(LED_PIN, PIN_HIGH);
rt_thread_mdelay(500);
rt_pin_write(LED_PIN, PIN_LOW);
rt_thread_mdelay(500);
}
return RT_EOK;
}
menu "Hardware Drivers Config"
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
menu "UART Drivers"
config BSP_USING_UART0
bool "Enable UART0 PB00/PB01(R/T)"
select RT_USING_SERIAL
default n
config BSP_USING_UART1
bool "Enable UART1 PA18/PA17(R/T)"
select RT_USING_SERIAL
default n
config BSP_USING_UART2
bool "Enable UART2 PA04/PA05(R/T)"
select RT_USING_SERIAL
default n
config BSP_USING_UART3
bool "Enable UART3 PA30/PA29(R/T)"
select RT_USING_SERIAL
default n
config BSP_USING_UART4
bool "Enable UART4 PB10/PB11(R/T)"
select RT_USING_SERIAL
default n
config BSP_USING_UART5
bool "Enable UART5 PB12/PB13(R/T)"
select RT_USING_SERIAL
default y
endmenu
endmenu
menu "Onboard Peripheral Drivers"
endmenu
menu "Offboard Peripheral Drivers"
endmenu
endmenu
from building import *
cwd = GetCurrentDir()
# add the general drivers.
src = Split('''
board.c
''')
# add gpio code
if GetDepend('RT_USING_PIN'):
src += ['drv_gpio.c']
# add serial driver code
if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3') or GetDepend('BSP_USING_UART4') or GetDepend('BSP_USING_UART5'):
src += ['drv_uart.c']
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-11 wangyq the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "drv_uart.h"
#include "drv_gpio.h"
#include <lib_scu.h>
#include <lib_gpio.h>
/**
* @addtogroup es8p
*/
/*@{*/
/*******************************************************************************
* Function Name : NVIC_Configuration
* Description : Configures Vector Table base location.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_Configuration(void)
{
}
/*******************************************************************************
* Function Name : SystemClock_Configuration
* Description : Configures the System Clock.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SystemClock_Config(void)
{
/* system clock 48MHz */
PLLClock_Config(ENABLE, SCU_PLL_HRC, SCU_PLL_48M, ENABLE);
}
/*******************************************************************************
* Function Name : SysTick_Configuration
* Description : Configures the SysTick for OS tick.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SysTick_Configuration(void)
{
/* ticks = SYS_CLK / RT_TICK_PER_SECOND */
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
}
/**
* This is the timer interrupt service routine.
*
*/
void systick_irq_cbk(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
/*@}*/
/**
* This function will initial es8p board.
*/
void rt_hw_board_init(void)
{
/* NVIC Configuration */
NVIC_Configuration();
/*System Clock Configuration */
SystemClock_Config();
/* Configure the SysTick */
SysTick_Configuration();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
}
/**
* This function will delay for some us.
*
* @param us the delay time of us
*/
void rt_hw_us_delay(rt_uint32_t us)
{
unsigned int start, now, delta, reload, us_tick;
start = SysTick->VAL;
reload = SysTick->LOAD;
us_tick = SystemCoreClock / 1000000UL;
do
{
now = SysTick->VAL;
delta = start > now ? start - now : reload + start - now;
}
while (delta < us_tick * us);
}
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-11 wangyq the first version
*/
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef __BOARD_H__
#define __BOARD_H__
#include <ES8P508x.h>
#define ES8P_SRAM_SIZE 0x6000
#define ES8P_SRAM_END (0x20000000 + ES8P_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END ES8P_SRAM_END
void rt_hw_board_init(void);
#endif
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-11 wangyq the first version
*/
#include <rthw.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_gpio.h"
#include <lib_scu.h>
#include <lib_gpio.h>
#ifdef RT_USING_PIN
#define __ES8P_PIN(index, gpio, gpio_index) {index, GPIO##gpio, GPIO_Pin_##gpio_index}
#define __ES8P_PIN_DEFAULT {-1, GPIOA, GPIO_Pin_0}
/* es8p GPIO driver */
struct pin_index
{
int index;
GPIO_TYPE gpio;
GPIO_TYPE_PIN pin;
};
static const struct pin_index pins[] =
{
__ES8P_PIN_DEFAULT,
__ES8P_PIN(1, B, 0),
__ES8P_PIN(2, B, 1),
__ES8P_PIN(3, B, 2),
__ES8P_PIN(4, B, 3),
__ES8P_PIN(5, B, 4),
__ES8P_PIN(6, B, 5),
__ES8P_PIN(7, B, 6),
__ES8P_PIN(8, B, 7),
__ES8P_PIN(9, B, 8),
__ES8P_PIN(10, B, 9),
__ES8P_PIN(11, B, 10),
__ES8P_PIN(12, B, 11),
__ES8P_PIN(13, B, 12),
__ES8P_PIN(14, B, 13),
__ES8P_PIN(15, A, 0),
__ES8P_PIN(16, A, 1),
__ES8P_PIN(17, A, 2),
__ES8P_PIN(18, A, 3),
__ES8P_PIN(19, A, 4),
__ES8P_PIN(20, A, 5),
__ES8P_PIN(21, A, 6),
__ES8P_PIN(22, A, 7),
__ES8P_PIN(23, A, 8),
__ES8P_PIN(24, A, 9),
__ES8P_PIN(25, A, 10),
__ES8P_PIN(26, A, 11),
__ES8P_PIN(27, A, 12),
__ES8P_PIN(28, A, 13),
__ES8P_PIN(29, A, 14),
__ES8P_PIN(30, A, 15),
__ES8P_PIN(31, A, 16),
__ES8P_PIN_DEFAULT,
__ES8P_PIN_DEFAULT,
__ES8P_PIN(34, A, 17),
__ES8P_PIN(35, A, 18),
__ES8P_PIN_DEFAULT,
__ES8P_PIN(37, A, 20),
__ES8P_PIN(38, A, 21),
__ES8P_PIN(39, A, 22),
__ES8P_PIN(40, A, 23),
__ES8P_PIN(41, A, 24),
__ES8P_PIN(42, A, 25),
__ES8P_PIN(43, A, 26),
__ES8P_PIN(44, A, 27),
__ES8P_PIN(45, A, 28),
__ES8P_PIN(46, A, 29),
__ES8P_PIN(47, A, 30),
__ES8P_PIN(48, A, 31),
};
struct irq_map
{
PINT_TYPE pinno;
IRQn_Type irqno;
};
static const struct irq_map irq_map[] =
{
{PINT0, PINT0_IRQn},
{PINT1, PINT1_IRQn},
{PINT2, PINT2_IRQn},
{PINT3, PINT3_IRQn},
{PINT4, PINT4_IRQn},
{PINT5, PINT5_IRQn},
{PINT6, PINT6_IRQn},
{PINT7, PINT7_IRQn},
};
struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
{
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
};
#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
const struct pin_index *get_pin(uint8_t pin)
{
const struct pin_index *index;
if (pin < ITEM_NUM(pins))
{
index = &pins[pin];
if (index->index == -1)
index = RT_NULL;
}
else
{
index = RT_NULL;
}
return index;
};
void es8p_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
{
const struct pin_index *index;
index = get_pin(pin);
if (index == RT_NULL)
{
return;
}
if (value == 0)
{
if (index->gpio == GPIOA)
GPIOA_ResetBit(index->pin);
else if (index->gpio == GPIOB)
GPIOB_ResetBit(index->pin);
}
else
{
if (index->gpio == GPIOA)
GPIOA_SetBit(index->pin);
else if (index->gpio == GPIOB)
GPIOB_SetBit(index->pin);
}
}
int es8p_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
const struct pin_index *index;
value = PIN_LOW;
index = get_pin(pin);
if (index == RT_NULL)
{
return value;
}
value = GPIO_ReadBit(index->gpio, index->pin);
return value;
}
void es8p_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
{
const struct pin_index *index;
GPIO_InitStruType gpio_initstruct;
index = get_pin(pin);
if (index == RT_NULL)
{
return;
}
/* Configure GPIO_InitStructure */
gpio_initstruct.GPIO_Signal = GPIO_Pin_Signal_Digital;
gpio_initstruct.GPIO_Func = GPIO_Func_0;
gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Disable;
gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
gpio_initstruct.GPIO_DS = GPIO_DS_Output_Normal;
if (mode == PIN_MODE_OUTPUT)
{
/* output setting */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
}
else if (mode == PIN_MODE_INPUT)
{
/* input setting: not pull. */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
}
else if (mode == PIN_MODE_INPUT_PULLUP)
{
/* input setting: pull up. */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Enable;
}
else if (mode == PIN_MODE_INPUT_PULLDOWN)
{
/* input setting: pull down. */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Enable;
}
else if (mode == PIN_MODE_OUTPUT_OD)
{
/* output setting: od. */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Enable;
}
GPIO_Init(index->gpio, index->pin, &gpio_initstruct);
}
rt_inline const struct irq_map *get_pin_irq_map(rt_uint16_t gpio_pin)
{
rt_int32_t mapindex = gpio_pin & 0x00FF;
if (mapindex < 0 || mapindex >= 32)
{
return RT_NULL;
}
return &irq_map[mapindex % 8];
};
rt_err_t es8p_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
{
const struct pin_index *index;
rt_base_t level;
rt_int32_t irqindex;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
}
irqindex = index->pin % 8;
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == pin &&
pin_irq_hdr_tab[irqindex].hdr == hdr &&
pin_irq_hdr_tab[irqindex].mode == mode &&
pin_irq_hdr_tab[irqindex].args == args)
{
rt_hw_interrupt_enable(level);
return RT_EOK;
}
if (pin_irq_hdr_tab[irqindex].pin != -1)
{
rt_hw_interrupt_enable(level);
return RT_EBUSY;
}
pin_irq_hdr_tab[irqindex].pin = pin;
pin_irq_hdr_tab[irqindex].hdr = hdr;
pin_irq_hdr_tab[irqindex].mode = mode;
pin_irq_hdr_tab[irqindex].args = args;
rt_hw_interrupt_enable(level);
return RT_EOK;
}
rt_err_t es8p_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{
const struct pin_index *index;
rt_base_t level;
rt_int32_t irqindex = -1;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
}
irqindex = index->pin % 8;
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_EOK;
}
pin_irq_hdr_tab[irqindex].pin = -1;
pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
pin_irq_hdr_tab[irqindex].mode = 0;
pin_irq_hdr_tab[irqindex].args = RT_NULL;
rt_hw_interrupt_enable(level);
return RT_EOK;
}
rt_err_t es8p_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
{
const struct pin_index *index;
const struct irq_map *irqmap;
rt_base_t level;
rt_int32_t irqindex = -1;
/* Configure GPIO_InitStructure */
GPIO_InitStruType gpio_initstruct;
index = get_pin(pin);
if (index == RT_NULL)
{
return RT_ENOSYS;
}
if (enabled == PIN_IRQ_ENABLE)
{
irqindex = pin % 8;
level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == -1)
{
rt_hw_interrupt_enable(level);
return RT_ENOSYS;
}
irqmap = &irq_map[irqindex];
/* Configure GPIO_InitStructure */
gpio_initstruct.GPIO_Signal = GPIO_Pin_Signal_Digital;
gpio_initstruct.GPIO_Func = GPIO_Func_0;
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Disable;
gpio_initstruct.GPIO_DS = GPIO_DS_Output_Normal;
switch (pin_irq_hdr_tab[irqindex].mode)
{
case PIN_IRQ_MODE_RISING:
gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Enable;
if (index->gpio == GPIOA)
PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Rise);
else
PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Rise);
break;
case PIN_IRQ_MODE_FALLING:
gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Enable;
gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
if (index->gpio == GPIOA)
PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Fall);
else
PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Fall);
break;
case PIN_IRQ_MODE_RISING_FALLING:
gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Disable;
gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
if (index->gpio == GPIOA)
PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)(pin >> 3), PINT_Trig_Change);
else
PINT_Config(irqmap->pinno, (PINT_TYPE_SEL)((pin >> 3) + 4), PINT_Trig_Change);
break;
default:
break;
}
GPIO_Init(index->gpio, index->pin, &gpio_initstruct);
NVIC_EnableIRQ(irqmap->irqno);
rt_hw_interrupt_enable(level);
}
else if (enabled == PIN_IRQ_DISABLE)
{
irqmap = get_pin_irq_map(index->pin);
if (irqmap == RT_NULL)
{
return RT_ENOSYS;
}
NVIC_DisableIRQ(irqmap->irqno);
}
else
{
return RT_ENOSYS;
}
return RT_EOK;
}
const static struct rt_pin_ops _es8p_pin_ops =
{
es8p_pin_mode,
es8p_pin_write,
es8p_pin_read,
es8p_pin_attach_irq,
es8p_pin_detach_irq,
es8p_pin_irq_enable,
};
int rt_hw_pin_init(void)
{
int result;
SCU_GPIOCLK_Enable();
result = rt_device_pin_register("pin", &_es8p_pin_ops, RT_NULL);
return result;
}
INIT_BOARD_EXPORT(rt_hw_pin_init);
rt_inline void pin_irq_hdr(PINT_TYPE_IT GPIO_Pin)
{
uint16_t irqno;
/* pin no. convert to dec no. */
for (irqno = 0; irqno < 16; irqno++)
{
if ((0x01 << irqno) == GPIO_Pin)
{
break;
}
}
if (pin_irq_hdr_tab[irqno].hdr)
{
pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
}
}
rt_inline void GPIO_EXTI_Callback(PINT_TYPE_IT GPIO_Pin)
{
if (PINT_GetIFStatus(GPIO_Pin) != RESET)
{
PINT_ClearITPendingBit(GPIO_Pin);
pin_irq_hdr(GPIO_Pin);
}
}
void PINT0_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT0);
rt_interrupt_leave();
}
void PINT1_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT1);
rt_interrupt_leave();
}
void PINT2_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT2);
rt_interrupt_leave();
}
void PINT3_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT3);
rt_interrupt_leave();
}
void PINT4_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT4);
rt_interrupt_leave();
}
void PINT5_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT5);
rt_interrupt_leave();
}
void PINT6_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT6);
rt_interrupt_leave();
}
void PINT7_IRQHandler(void)
{
rt_interrupt_enter();
GPIO_EXTI_Callback(PINT_IT_PINT7);
rt_interrupt_leave();
}
#endif
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-11 wangyq the first version
*/
#ifndef DRV_GPIO_H__
#define DRV_GPIO_H__
int rt_hw_pin_init(void);
#endif
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-12 wangyq the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_uart.h"
#include <lib_gpio.h>
#include <lib_uart.h>
#ifdef RT_USING_SERIAL
/* es8p uart driver */
struct es8p_uart
{
UART_TypeDef *huart;
IRQn_Type irq;
};
static rt_err_t es8px_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
GPIO_InitStruType gpio_initstruct;
UART_InitStruType uart_initstruct;
struct es8p_uart *uart;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (struct es8p_uart *)serial->parent.user_data;
gpio_initstruct.GPIO_Signal = GPIO_Pin_Signal_Digital;
gpio_initstruct.GPIO_OD = GPIO_ODE_Output_Disable;
gpio_initstruct.GPIO_PUEN = GPIO_PUE_Input_Enable;
gpio_initstruct.GPIO_PDEN = GPIO_PDE_Input_Disable;
gpio_initstruct.GPIO_DS = GPIO_DS_Output_Normal;
#ifdef BSP_USING_UART0
gpio_initstruct.GPIO_Func = GPIO_Func_2;
/* Initialize rx pin */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
GPIO_Init(GPIOB, GPIO_Pin_0, &gpio_initstruct);
/* Initialize tx pin ,the same as rx pin except mode */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
GPIO_Init(GPIOB, GPIO_Pin_1, &gpio_initstruct);
#endif
#ifdef BSP_USING_UART1
gpio_initstruct.GPIO_Func = GPIO_Func_1;
/* Initialize rx pin */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
GPIO_Init(GPIOA, GPIO_Pin_18, &gpio_initstruct);
/* Initialize tx pin ,the same as rx pin except mode */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
GPIO_Init(GPIOA, GPIO_Pin_17, &gpio_initstruct);
#endif
#ifdef BSP_USING_UART2
gpio_initstruct.GPIO_Func = GPIO_Func_2;
/* Initialize rx pin */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
GPIO_Init(GPIOA, GPIO_Pin_4, &gpio_initstruct);
/* Initialize tx pin ,the same as rx pin except mode */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
GPIO_Init(GPIOA, GPIO_Pin_5, &gpio_initstruct);
#endif
#ifdef BSP_USING_UART3
gpio_initstruct.GPIO_Func = GPIO_Func_2;
/* Initialize rx pin */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
GPIO_Init(GPIOA, GPIO_Pin_30, &gpio_initstruct);
/* Initialize tx pin ,the same as rx pin except mode */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
GPIO_Init(GPIOA, GPIO_Pin_29, &gpio_initstruct);
#endif
#ifdef BSP_USING_UART4
gpio_initstruct.GPIO_Func = GPIO_Func_1;
/* Initialize rx pin */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
GPIO_Init(GPIOB, GPIO_Pin_10, &gpio_initstruct);
/* Initialize tx pin ,the same as rx pin except mode */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
GPIO_Init(GPIOB, GPIO_Pin_11, &gpio_initstruct);
#endif
#ifdef BSP_USING_UART5
gpio_initstruct.GPIO_Func = GPIO_Func_1;
/* Initialize rx pin */
gpio_initstruct.GPIO_Direction = GPIO_Dir_In;
GPIO_Init(GPIOB, GPIO_Pin_12, &gpio_initstruct);
/* Initialize tx pin ,the same as rx pin except mode */
gpio_initstruct.GPIO_Direction = GPIO_Dir_Out;
GPIO_Init(GPIOB, GPIO_Pin_13, &gpio_initstruct);
#endif
uart_initstruct.UART_ClockSet = UART_Clock_1;
uart_initstruct.UART_BaudRate = cfg->baud_rate;
uart_initstruct.UART_RxPolar = UART_Polar_Normal;
uart_initstruct.UART_TxPolar = UART_Polar_Normal;
if (cfg->data_bits == DATA_BITS_7)
{
uart_initstruct.UART_RxMode = UART_DataMode_7;
uart_initstruct.UART_TxMode = UART_DataMode_7;
if (cfg->parity == PARITY_EVEN)
{
uart_initstruct.UART_RxMode = UART_DataMode_7Even;
uart_initstruct.UART_TxMode = UART_DataMode_7Even;
}
else if (cfg->parity == PARITY_ODD)
{
uart_initstruct.UART_RxMode = UART_DataMode_7Odd;
uart_initstruct.UART_TxMode = UART_DataMode_7Odd;
}
}
else if (cfg->data_bits == DATA_BITS_8)
{
uart_initstruct.UART_RxMode = UART_DataMode_8;
uart_initstruct.UART_TxMode = UART_DataMode_8;
if (cfg->parity == PARITY_EVEN)
{
uart_initstruct.UART_RxMode = UART_DataMode_8Even;
uart_initstruct.UART_TxMode = UART_DataMode_8Even;
}
else if (cfg->parity == PARITY_ODD)
{
uart_initstruct.UART_RxMode = UART_DataMode_8Odd;
uart_initstruct.UART_TxMode = UART_DataMode_8Odd;
}
}
else if (cfg->data_bits == DATA_BITS_9)
{
uart_initstruct.UART_RxMode = UART_DataMode_9;
uart_initstruct.UART_TxMode = UART_DataMode_9;
}
if (cfg->bit_order == BIT_ORDER_MSB)
{
return RT_EINVAL;
}
if (cfg->invert == NRZ_INVERTED)
{
uart_initstruct.UART_RxPolar = UART_Polar_Opposite;
uart_initstruct.UART_TxPolar = UART_Polar_Opposite;
}
/* config uart function */
UART_Init(uart->huart, &uart_initstruct);
/* enable rx and tx */
uart->huart->CON.RXEN = 1;
uart->huart->CON.TXEN = 1;
NVIC_SetPriority(uart->irq, 1);
return RT_EOK;
}
static rt_err_t es8px_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct es8p_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct es8p_uart *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
NVIC_DisableIRQ(uart->irq);
/* disable interrupt */
UART_ITConfig(uart->huart, UART_IT_RB, DISABLE);
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
NVIC_EnableIRQ(uart->irq);
/* enable interrupt */
UART_ITConfig(uart->huart, UART_IT_RB, ENABLE);
break;
}
return RT_EOK;
}
static int es8px_putc(struct rt_serial_device *serial, char c)
{
struct es8p_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct es8p_uart *)serial->parent.user_data;
while (UART_GetFlagStatus(uart->huart, UART_FLAG_TB) == RESET) ;
UART_SendByte(uart->huart, c);
return 1;
}
static int es8px_getc(struct rt_serial_device *serial)
{
int ch = -1;
struct es8p_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct es8p_uart *)serial->parent.user_data;
if (UART_GetFlagStatus(uart->huart, UART_FLAG_RB))
{
ch = UART_RecByte(uart->huart);
}
return ch;
}
static const struct rt_uart_ops es8px_uart_ops =
{
es8px_configure,
es8px_control,
es8px_putc,
es8px_getc,
};
#ifdef BSP_USING_UART0
/* UART0 device driver structure */
struct es8p_uart uart0 =
{
UART0,
UART0_IRQn
};
struct rt_serial_device serial0;
void UART0_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (UART0->IF.RBIF)
{
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART0 */
#ifdef BSP_USING_UART1
/* UART1 device driver structure */
struct es8p_uart uart1 =
{
UART1,
UART1_IRQn
};
struct rt_serial_device serial1;
void UART1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (UART1->IF.RBIF)
{
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART1 */
#ifdef BSP_USING_UART2
/* UART1 device driver structure */
struct es8p_uart uart2 =
{
UART2,
UART2_IRQn
};
struct rt_serial_device serial2;
void UART2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (UART2->IF.RBIF)
{
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART2 */
#ifdef BSP_USING_UART3
/* UART3 device driver structure */
struct es8p_uart uart3 =
{
UART3,
UART3_IRQn
};
struct rt_serial_device serial3;
void UART3_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (UART3->IF.RBIF)
{
rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART3 */
#ifdef BSP_USING_UART4
/* UART4 device driver structure */
struct es8p_uart uart4 =
{
UART4,
UART4_IRQn
};
struct rt_serial_device serial4;
void UART4_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (UART4->IF.RBIF)
{
rt_hw_serial_isr(&serial4, RT_SERIAL_EVENT_RX_IND);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART4 */
#ifdef BSP_USING_UART5
/* UART5 device driver structure */
struct es8p_uart uart5 =
{
UART5,
UART5_IRQn
};
struct rt_serial_device serial5;
void UART5_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (UART5->IF.RBIF)
{
rt_hw_serial_isr(&serial5, RT_SERIAL_EVENT_RX_IND);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART5 */
int rt_hw_uart_init(void)
{
struct es8p_uart *uart;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef BSP_USING_UART0
uart = &uart0;
serial0.ops = &es8px_uart_ops;
serial0.config = config;
/* register UART0 device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
#endif /* BSP_USING_UART0 */
#ifdef BSP_USING_UART1
uart = &uart1;
serial1.ops = &es8px_uart_ops;
serial1.config = config;
/* register UART1 device */
rt_hw_serial_register(&serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
#endif /* BSP_USING_UART1 */
#ifdef BSP_USING_UART2
uart = &uart2;
serial2.ops = &es8px_uart_ops;
serial2.config = config;
/* register UART2 device */
rt_hw_serial_register(&serial2, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
#endif /* BSP_USING_UART2 */
#ifdef BSP_USING_UART3
uart = &uart3;
serial3.ops = &es8px_uart_ops;
serial3.config = config;
/* register UART3 device */
rt_hw_serial_register(&serial3, "uart3",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
#endif /* BSP_USING_UART3 */
#ifdef BSP_USING_UART4
uart = &uart4;
serial4.ops = &es8px_uart_ops;
serial4.config = config;
/* register UART4 device */
rt_hw_serial_register(&serial4, "uart4",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
#endif /* BSP_USING_UART4 */
#ifdef BSP_USING_UART5
uart = &uart5;
serial5.ops = &es8px_uart_ops;
serial5.config = config;
/* register UART5 device */
rt_hw_serial_register(&serial5, "uart5",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
#endif /* BSP_USING_UART5 */
return 0;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
#endif
/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-12 wangyq the first version
*/
#ifndef DRV_UART_H__
#define DRV_UART_H__
int rt_hw_uart_init(void);
#endif
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x00020000 { ; load region size_region
ER_IROM1 0x00000000 0x00020000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00006000 { ; RW data
.ANY (+RW +ZI)
}
}
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/***************************************************************
*Copyright (C), 2017, Shanghai Eastsoft Microelectronics Co., Ltd.
*文件名: system_ES8P508x.h
*作 者: Liut
*版 本: V1.00
*日 期: 2017/07/14
*描 述: 库函数配置文件
*备 注: 适用于 ES8P508x芯片
本软件仅供学习和演示使用,对用户直接引用代码所带来的风险或后果不承担任何法律责任。
***************************************************************/
#ifndef __SYSTEMES8P508x_H__
#define __SYSTEMES8P508x_H__
#include "ES8P508x.h"
#include "type.h"
extern uint32_t SystemCoreClock;
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
#endif
/*************************END OF FILE**********************/
#ifndef __IRQHANDLER_H__
#define __IRQHANDLER_H__
#include "ES8P508x.h"
extern void systick_irq_cbk(void);
/************жϺ***********/
void NMI_IRQHandler(void);
void HardFault_IRQHandler(void);
void SVC_IRQHandler(void);
void PendSV_IRQHandler(void);
void SysTick_IRQHandler(void);
#endif
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/*********************************************************
*Copyright (C), 2017, Shanghai Eastsoft Microelectronics Co., Ltd.
*文件名: type.h
*作 者: Liut
*版 本: V1.01
*日 期: 2017/11/01
*描 述: type define
*备 注: 适用于HRSDK-GDB-8P508x
本软件仅供学习和演示使用,对用户直接引用代码所带来的风险或后果不承担任何法律责任。
**********************************************************/
#ifndef __TYPE_H__
#define __TYPE_H__
typedef enum {DISABLE = 0, ENABLE = !DISABLE} TYPE_FUNCEN,FuncState,TYPE_PINTIE,TYPE_PINTMASK,TYPE_BUZZEN;
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, PinStatus;
typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
#endif
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