update jz47xx branch code.

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@894 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/jz47xx/uart.c

@@ -128,7 +128,7 @@ struct rt_uart_jz
 	rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
 }uart_device;
 
-static void rt_uart_irqhandler(void)
+static void rt_uart_irqhandler(int irqno)
 {
 	rt_ubase_t level, isr;
     struct rt_uart_jz* uart = &uart_device;

libcpu/mips/jz47xx/jz47xx.h

@@ -91,6 +91,6 @@
 #define IRQ_GPIO0	28
 #define IRQ_LCD		30
 
-#define SYSTEM_STACK          0x8000ffe8		/* the kernel system stack address */
+#define SYSTEM_STACK          0x80003fe8		/* the kernel system stack address */
 
 #endif

libcpu/mips/jz47xx/stack.c

@@ -53,7 +53,8 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_ad
 	*(--stk) = (rt_uint32_t) 0xffff;		/* c0_badvaddr */
 	*(--stk) = (rt_uint32_t) cp0_get_lo();	/* lo */
 	*(--stk) = (rt_uint32_t) cp0_get_hi();	/* hi */
-	*(--stk) = (rt_uint32_t) g_sr; 			/* C0_SR: HW2 = En, IE = En */
+	// *(--stk) = (rt_uint32_t) g_sr; 			/* C0_SR: HW2 = En, IE = En */
+	*(--stk) = (rt_uint32_t) 0xFC01; 		/* C0_SR: HW2 = En, IE = En */
 	*(--stk) = (rt_uint32_t) texit;	        /* ra */
 	*(--stk) = (rt_uint32_t) 0x0000001e;	/* s8 */
 	*(--stk) = (rt_uint32_t) stack_addr;	/* sp */

libcpu/mips/jz47xx/start_gcc.S

@@ -20,7 +20,7 @@ _start:
     la      ra, _start
 
     /* init cp0 registers. */
-    li	    t0, 0x0040FC00
+    li	    t0, 0x0000FC00 /* BEV = 0 and mask all interrupt */
     mtc0    t0, CP0_STATUS
 
     li	    t1, 0x00800000