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5df25c4a
编写于
9月 26, 2017
作者:
E
Eduard-Mihai Burtescu
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
rustc: remove redundant/unused fields from layout::Abi::Vector.
上级
b203a26e
变更
6
隐藏空白更改
内联
并排
Showing
6 changed file
with
19 addition
and
28 deletion
+19
-28
src/librustc/ty/layout.rs
src/librustc/ty/layout.rs
+9
-18
src/librustc_trans/abi.rs
src/librustc_trans/abi.rs
+2
-2
src/librustc_trans/cabi_x86_64.rs
src/librustc_trans/cabi_x86_64.rs
+4
-4
src/librustc_trans/cabi_x86_win64.rs
src/librustc_trans/cabi_x86_win64.rs
+1
-1
src/librustc_trans/mir/constant.rs
src/librustc_trans/mir/constant.rs
+1
-1
src/librustc_trans/type_of.rs
src/librustc_trans/type_of.rs
+2
-2
未找到文件。
src/librustc/ty/layout.rs
浏览文件 @
5df25c4a
...
...
@@ -740,10 +740,7 @@ pub fn index_by_increasing_offset<'a>(&'a self) -> impl iter::Iterator<Item=usiz
#[derive(Copy,
Clone,
PartialEq,
Eq,
Hash,
Debug)]
pub
enum
Abi
{
Scalar
(
Primitive
),
Vector
{
element
:
Primitive
,
count
:
u64
},
Vector
,
Aggregate
{
/// If true, the size is exact, otherwise it's only a lower bound.
sized
:
bool
,
...
...
@@ -755,7 +752,7 @@ impl Abi {
/// Returns true if the layout corresponds to an unsized type.
pub
fn
is_unsized
(
&
self
)
->
bool
{
match
*
self
{
Abi
::
Scalar
(
_
)
|
Abi
::
Vector
{
..
}
=>
false
,
Abi
::
Scalar
(
_
)
|
Abi
::
Vector
=>
false
,
Abi
::
Aggregate
{
sized
,
..
}
=>
!
sized
}
}
...
...
@@ -763,7 +760,7 @@ pub fn is_unsized(&self) -> bool {
/// Returns true if the fields of the layout are packed.
pub
fn
is_packed
(
&
self
)
->
bool
{
match
*
self
{
Abi
::
Scalar
(
_
)
|
Abi
::
Vector
{
..
}
=>
false
,
Abi
::
Scalar
(
_
)
|
Abi
::
Vector
=>
false
,
Abi
::
Aggregate
{
packed
,
..
}
=>
packed
}
}
...
...
@@ -1202,14 +1199,14 @@ enum StructKind {
ty
::
TyAdt
(
def
,
..
)
if
def
.repr
.simd
()
=>
{
let
count
=
ty
.simd_size
(
tcx
)
as
u64
;
let
element
=
cx
.layout_of
(
ty
.simd_type
(
tcx
))
?
;
let
element_scalar
=
match
element
.abi
{
Abi
::
Scalar
(
value
)
=>
value
,
match
element
.abi
{
Abi
::
Scalar
(
_
)
=>
{}
_
=>
{
tcx
.sess
.fatal
(
&
format!
(
"monomorphising SIMD type `{}` with
\
a non-machine element type `{}`"
,
ty
,
element
.ty
));
}
}
;
}
let
size
=
element
.size
.checked_mul
(
count
,
dl
)
.ok_or
(
LayoutError
::
SizeOverflow
(
ty
))
?
;
let
align
=
dl
.vector_align
(
size
);
...
...
@@ -1221,10 +1218,7 @@ enum StructKind {
stride
:
element
.size
,
count
},
abi
:
Abi
::
Vector
{
element
:
element_scalar
,
count
},
abi
:
Abi
::
Vector
,
size
,
align
,
primitive_align
:
align
...
...
@@ -2076,7 +2070,7 @@ pub fn is_packed(&self) -> bool {
pub
fn
is_zst
(
&
self
)
->
bool
{
match
self
.abi
{
Abi
::
Scalar
(
_
)
=>
false
,
Abi
::
Vector
{
count
,
..
}
=>
count
==
0
,
Abi
::
Vector
=>
self
.size
.bytes
()
==
0
,
Abi
::
Aggregate
{
sized
,
..
}
=>
sized
&&
self
.size
.bytes
()
==
0
}
}
...
...
@@ -2233,10 +2227,7 @@ fn hash_stable<W: StableHasherResult>(&self,
Scalar
(
ref
value
)
=>
{
value
.hash_stable
(
hcx
,
hasher
);
}
Vector
{
ref
element
,
count
}
=>
{
element
.hash_stable
(
hcx
,
hasher
);
count
.hash_stable
(
hcx
,
hasher
);
}
Vector
=>
{}
Aggregate
{
packed
,
sized
}
=>
{
packed
.hash_stable
(
hcx
,
hasher
);
sized
.hash_stable
(
hcx
,
hasher
);
...
...
src/librustc_trans/abi.rs
浏览文件 @
5df25c4a
...
...
@@ -279,7 +279,7 @@ impl<'tcx> LayoutExt<'tcx> for TyLayout<'tcx> {
fn
is_aggregate
(
&
self
)
->
bool
{
match
self
.abi
{
layout
::
Abi
::
Scalar
(
_
)
|
layout
::
Abi
::
Vector
{
..
}
=>
false
,
layout
::
Abi
::
Vector
=>
false
,
layout
::
Abi
::
Aggregate
{
..
}
=>
true
}
}
...
...
@@ -300,7 +300,7 @@ fn homogeneous_aggregate<'a>(&self, ccx: &CrateContext<'a, 'tcx>) -> Option<Reg>
})
}
layout
::
Abi
::
Vector
{
..
}
=>
{
layout
::
Abi
::
Vector
=>
{
Some
(
Reg
{
kind
:
RegKind
::
Vector
,
size
:
self
.size
...
...
src/librustc_trans/cabi_x86_64.rs
浏览文件 @
5df25c4a
...
...
@@ -75,14 +75,14 @@ fn classify<'a, 'tcx>(ccx: &CrateContext<'a, 'tcx>,
unify
(
cls
,
off
,
reg
);
}
layout
::
Abi
::
Vector
{
element
,
count
}
=>
{
layout
::
Abi
::
Vector
=>
{
unify
(
cls
,
off
,
Class
::
Sse
);
// everything after the first one is the upper
// half of a register.
let
eltsz
=
element
.size
(
ccx
);
for
i
in
1
..
count
{
unify
(
cls
,
off
+
eltsz
*
(
i
as
u64
)
,
Class
::
SseUp
);
for
i
in
1
..
layout
.fields
.count
()
{
let
field_off
=
off
+
layout
.fields
.offset
(
i
);
unify
(
cls
,
field_off
,
Class
::
SseUp
);
}
}
...
...
src/librustc_trans/cabi_x86_win64.rs
浏览文件 @
5df25c4a
...
...
@@ -26,7 +26,7 @@ pub fn compute_abi_info(fty: &mut FnType) {
_
=>
a
.make_indirect
()
}
}
layout
::
Abi
::
Vector
{
..
}
=>
{
layout
::
Abi
::
Vector
=>
{
// FIXME(eddyb) there should be a size cap here
// (probably what clang calls "illegal vectors").
}
...
...
src/librustc_trans/mir/constant.rs
浏览文件 @
5df25c4a
...
...
@@ -1098,7 +1098,7 @@ fn trans_const_adt<'a, 'tcx>(
match
l
.variants
{
layout
::
Variants
::
Single
{
index
}
=>
{
assert_eq!
(
variant_index
,
index
);
if
let
layout
::
Abi
::
Vector
{
..
}
=
l
.abi
{
if
let
layout
::
Abi
::
Vector
=
l
.abi
{
Const
::
new
(
C_vector
(
&
vals
.iter
()
.map
(|
x
|
x
.llval
)
.collect
::
<
Vec
<
_
>>
()),
t
)
}
else
if
let
layout
::
FieldPlacement
::
Union
(
_
)
=
l
.fields
{
assert_eq!
(
variant_index
,
0
);
...
...
src/librustc_trans/type_of.rs
浏览文件 @
5df25c4a
...
...
@@ -23,7 +23,7 @@ fn uncached_llvm_type<'a, 'tcx>(ccx: &CrateContext<'a, 'tcx>,
->
Type
{
match
layout
.abi
{
layout
::
Abi
::
Scalar
(
_
)
=>
bug!
(
"handled elsewhere"
),
layout
::
Abi
::
Vector
{
..
}
=>
{
layout
::
Abi
::
Vector
=>
{
return
Type
::
vector
(
&
layout
.field
(
ccx
,
0
)
.llvm_type
(
ccx
),
layout
.fields
.count
()
as
u64
);
}
...
...
@@ -158,7 +158,7 @@ pub trait LayoutLlvmExt<'tcx> {
impl
<
'tcx
>
LayoutLlvmExt
<
'tcx
>
for
TyLayout
<
'tcx
>
{
fn
is_llvm_immediate
(
&
self
)
->
bool
{
match
self
.abi
{
layout
::
Abi
::
Scalar
(
_
)
|
layout
::
Abi
::
Vector
{
..
}
=>
true
,
layout
::
Abi
::
Scalar
(
_
)
|
layout
::
Abi
::
Vector
=>
true
,
layout
::
Abi
::
Aggregate
{
..
}
=>
self
.is_zst
()
}
...
...
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