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185cc5f2
编写于
10月 02, 2017
作者:
B
bors
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差异文件
Auto merge of #44885 - lu-zero:master, r=alexcrichton
More Altivec Intrinsics Float-specific intrinsics
上级
0f0f5db4
7bdf013a
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
120 addition
and
0 deletion
+120
-0
src/etc/platform-intrinsics/powerpc.json
src/etc/platform-intrinsics/powerpc.json
+70
-0
src/librustc_platform_intrinsics/powerpc.rs
src/librustc_platform_intrinsics/powerpc.rs
+50
-0
未找到文件。
src/etc/platform-intrinsics/powerpc.json
浏览文件 @
185cc5f2
...
...
@@ -219,6 +219,76 @@
"llvm"
:
"vsumsws"
,
"ret"
:
"s32"
,
"args"
:
[
"0"
,
"0"
]
},
{
"intrinsic"
:
"madd"
,
"width"
:
[
128
],
"llvm"
:
"vmaddfp"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
,
"0"
,
"0"
]
},
{
"intrinsic"
:
"nmsub"
,
"width"
:
[
128
],
"llvm"
:
"vnmsubfp"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
,
"0"
,
"0"
]
},
{
"intrinsic"
:
"expte"
,
"width"
:
[
128
],
"llvm"
:
"vexptefp"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
},
{
"intrinsic"
:
"floor"
,
"width"
:
[
128
],
"llvm"
:
"vrfim"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
},
{
"intrinsic"
:
"ceil"
,
"width"
:
[
128
],
"llvm"
:
"vrfip"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
},
{
"intrinsic"
:
"round"
,
"width"
:
[
128
],
"llvm"
:
"vrfin"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
},
{
"intrinsic"
:
"trunc"
,
"width"
:
[
128
],
"llvm"
:
"vrfiz"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
},
{
"intrinsic"
:
"loge"
,
"width"
:
[
128
],
"llvm"
:
"vlogefp"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
},
{
"intrinsic"
:
"re"
,
"width"
:
[
128
],
"llvm"
:
"vrefp"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
},
{
"intrinsic"
:
"rsqrte"
,
"width"
:
[
128
],
"llvm"
:
"vrsqrtefp"
,
"ret"
:
"f32"
,
"args"
:
[
"0"
]
}
]
}
src/librustc_platform_intrinsics/powerpc.rs
浏览文件 @
185cc5f2
...
...
@@ -397,6 +397,56 @@ pub fn find(name: &str) -> Option<Intrinsic> {
output
:
&
::
I32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vsumsws"
)
},
"_vec_madd"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
3
]
=
[
&
::
F32x4
,
&
::
F32x4
,
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vmaddfp"
)
},
"_vec_nmsub"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
3
]
=
[
&
::
F32x4
,
&
::
F32x4
,
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vnmsubfp"
)
},
"_vec_expte"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vexptefp"
)
},
"_vec_floor"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vrfim"
)
},
"_vec_ceil"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vrfip"
)
},
"_vec_round"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vrfin"
)
},
"_vec_trunc"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vrfiz"
)
},
"_vec_loge"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vlogefp"
)
},
"_vec_re"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vrefp"
)
},
"_vec_rsqrte"
=>
Intrinsic
{
inputs
:
{
static
INPUTS
:
[
&
'static
Type
;
1
]
=
[
&
::
F32x4
];
&
INPUTS
},
output
:
&
::
F32x4
,
definition
:
Named
(
"llvm.ppc.altivec.vrsqrtefp"
)
},
_
=>
return
None
,
})
}
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