first console project

bsp/maxim/MAX32660_EVSYS/.config

@@ -54,6 +54,7 @@ CONFIG_RT_USING_MEMPOOL=y
 # CONFIG_RT_USING_NOHEAP is not set
 CONFIG_RT_USING_SMALL_MEM=y
 # CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_USERHEAP is not set
 # CONFIG_RT_USING_MEMTRACE is not set
 CONFIG_RT_USING_HEAP=y
 
@@ -63,9 +64,7 @@ CONFIG_RT_USING_HEAP=y
 CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_DEVICE_OPS is not set
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
-CONFIG_RT_USING_CONSOLE=y
-CONFIG_RT_CONSOLEBUF_SIZE=128
-CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
+# CONFIG_RT_USING_CONSOLE is not set
 CONFIG_RT_VER_NUM=0x40003
 # CONFIG_RT_USING_CPU_FFS is not set
 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@@ -73,10 +72,8 @@ CONFIG_RT_VER_NUM=0x40003
 #
 # RT-Thread Components
 #
-CONFIG_RT_USING_COMPONENTS_INIT=y
-CONFIG_RT_USING_USER_MAIN=y
-CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
-CONFIG_RT_MAIN_THREAD_PRIORITY=10
+# CONFIG_RT_USING_COMPONENTS_INIT is not set
+# CONFIG_RT_USING_USER_MAIN is not set
 
 #
 # C++ features
@@ -86,21 +83,7 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10
 #
 # Command shell
 #
-CONFIG_RT_USING_FINSH=y
-CONFIG_FINSH_THREAD_NAME="tshell"
-CONFIG_FINSH_USING_HISTORY=y
-CONFIG_FINSH_HISTORY_LINES=5
-CONFIG_FINSH_USING_SYMTAB=y
-CONFIG_FINSH_USING_DESCRIPTION=y
-# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
-CONFIG_FINSH_THREAD_PRIORITY=20
-CONFIG_FINSH_THREAD_STACK_SIZE=4096
-CONFIG_FINSH_CMD_SIZE=80
-# CONFIG_FINSH_USING_AUTH is not set
-CONFIG_FINSH_USING_MSH=y
-CONFIG_FINSH_USING_MSH_DEFAULT=y
-CONFIG_FINSH_USING_MSH_ONLY=y
-CONFIG_FINSH_ARG_MAX=10
+# CONFIG_RT_USING_FINSH is not set
 
 #
 # Device virtual file system
@@ -297,6 +280,8 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
 # CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
 
 #
 # tools packages
@@ -311,6 +296,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
@@ -318,6 +304,8 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_GPS_RMC is not set
 # CONFIG_PKG_USING_URLENCODE is not set
 # CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
 
 #
 # system packages
@@ -344,10 +332,16 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_RAMDISK is not set
 # CONFIG_PKG_USING_MININI is not set
 # CONFIG_PKG_USING_QBOOT is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
 # CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
 # CONFIG_PKG_USING_UC_CRC is not set
 # CONFIG_PKG_USING_UC_CLK is not set
 # CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
 # CONFIG_PKG_USING_PPOOL is not set
 
 #
@@ -407,6 +401,10 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
 # CONFIG_PKG_USING_WK2124 is not set
 # CONFIG_PKG_USING_LY68L6400 is not set
 # CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_BSAL is not set
 
 #
 # miscellaneous packages
@@ -416,6 +414,7 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
@@ -436,63 +435,33 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_NNOM is not set
 # CONFIG_PKG_USING_LIBANN is not set
 # CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_TETRIS is not set
 # CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_CRCLIB is not set
+
+#
+# games: games run on RT-Thread console
+#
 # CONFIG_PKG_USING_THREES is not set
 # CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
 # CONFIG_PKG_USING_LWGPS is not set
 # CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
 
 #
 # Hardware Drivers Config
 #
-CONFIG_SOC_NRF52840=y
-CONFIG_NRFX_CLOCK_ENABLED=1
-CONFIG_NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY=7
-CONFIG_NRFX_CLOCK_CONFIG_LF_SRC=1
-CONFIG_SOC_NORDIC=y
-
-#
-# Onboard Peripheral Drivers
-#
-CONFIG_BSP_USING_JLINK_TO_USART=y
-# CONFIG_BSP_USING_QSPI_FLASH is not set
+CONFIG_SOC_MAXIM=y
 
 #
 # On-chip Peripheral Drivers
 #
 CONFIG_BSP_USING_GPIO=y
-CONFIG_NRFX_GPIOTE_ENABLED=1
-# CONFIG_BSP_USING_SAADC is not set
-# CONFIG_BSP_USING_PWM is not set
-CONFIG_BSP_USING_UART=y
-CONFIG_NRFX_USING_UART=y
-# CONFIG_NRFX_USING_UARTE is not set
-CONFIG_NRFX_UART_ENABLED=1
-CONFIG_BSP_USING_UART0=y
-CONFIG_NRFX_UART0_ENABLED=1
-CONFIG_BSP_UART0_RX_PIN=8
-CONFIG_BSP_UART0_TX_PIN=6
-# CONFIG_BSP_USING_SPI is not set
 # CONFIG_BSP_USING_ON_CHIP_FLASH is not set
-
-#
-# On-chip flash config
-#
-CONFIG_MCU_FLASH_START_ADDRESS=0x00000000
-CONFIG_MCU_FLASH_SIZE_KB=1024
-CONFIG_MCU_SRAM_START_ADDRESS=0x20000000
-CONFIG_MCU_SRAM_SIZE_KB=256
-CONFIG_MCU_FLASH_PAGE_SIZE=0x1000
-# CONFIG_BSP_USING_WDT is not set
-# CONFIG_BSP_USING_ONCHIP_RTC is not set
-CONFIG_BLE_STACK_USING_NULL=y
-# CONFIG_BSP_USING_SOFTDEVICE is not set
-# CONFIG_BSP_USING_NIMBLE is not set

bsp/maxim/MAX32660_EVSYS/SConstruct

@@ -48,10 +48,10 @@ print(SDK_LIB)
 objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
 
 # include drivers
-objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
+#objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
 
 # include cmsis
-objs.extend(SConscript(os.path.join(libraries_path_prefix, 'cmsis', 'SConscript')))
+#objs.extend(SConscript(os.path.join(libraries_path_prefix, 'cmsis', 'SConscript')))
 
 # make a building
 DoBuilding(TARGET, objs)

bsp/maxim/MAX32660_EVSYS/applications/application.c

@@ -13,19 +13,24 @@
 #include <rtdevice.h>
 #define DK_BOARD_LED_1  13
 #define DK_BOARD_LED_2  14
+#include "gpio.h"
 
+const gpio_cfg_t led_pin[] = {
+    {PORT_0, PIN_13, GPIO_FUNC_OUT, GPIO_PAD_NONE},
+};
 int main(void)
 {
     int count = 1; 
-    rt_pin_mode(DK_BOARD_LED_1, PIN_MODE_OUTPUT);
-    
+    GPIO_Config(&led_pin[0]);
+    //rt_pin_mode(DK_BOARD_LED_1, PIN_MODE_OUTPUT);
+    GPIO_OutSet(&led_pin[0]);
     while (count++)
     {    
-        rt_pin_write(DK_BOARD_LED_1, PIN_HIGH);
+        //rt_pin_write(DK_BOARD_LED_1, PIN_HIGH);
         rt_thread_mdelay(500);
-        
-        rt_pin_write(DK_BOARD_LED_1, PIN_LOW);
-        rt_thread_mdelay(500);                    
+        GPIO_OutToggle(&led_pin[0]);
+        //rt_pin_write(DK_BOARD_LED_1, PIN_LOW);
+        //rt_thread_mdelay(500);                    
     }
     return RT_EOK;
 }

bsp/maxim/MAX32660_EVSYS/applications/drv_uart.c

+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-02-08     Supperthomas first version
+ */
+
+#include "board.h"
+#include "uart.h"
+#include "rtdevice.h"
+
+#define BUFF_SIZE           10
+uint8_t rxdata[BUFF_SIZE]={0};
+
+
+#define UART0_CONFIG                                                \
+    {                                                               \
+        .name = "uart0",                                            \
+        .Instance = MXC_UART_GET_UART(0),                                         \
+        .irq_type = MXC_UART_GET_IRQ(0),                                    \
+    }
+
+    
+#define UART1_CONFIG                                                \
+    {                                                               \
+        .name = "uart1",                                            \
+        .Instance = MXC_UART_GET_UART(1),                                         \
+        .irq_type = MXC_UART_GET_IRQ(1),                                    \
+    }
+
+struct mcu_uart_config
+{
+    const char *name;
+    mxc_uart_regs_t *Instance;
+    IRQn_Type irq_type;
+};
+
+struct mcu_uart
+{
+    mxc_uart_regs_t *handle;
+    struct mcu_uart_config *config;
+
+    rt_uint16_t uart_dma_flag;
+    struct rt_serial_device serial;
+};
+
+
+#ifdef RT_USING_SERIAL
+
+//#define DRV_DEBUG
+//#define LOG_TAG             "drv.usart"
+//#include <drv_log.h>
+
+#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1)
+
+#error "Please define at least one BSP_USING_UARTx"
+/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
+#endif
+
+enum
+{
+#ifdef BSP_USING_UART0
+    UART0_INDEX,
+#endif
+#ifdef BSP_USING_UART1
+    UART1_INDEX,
+#endif
+
+};
+
+static struct mcu_uart_config uart_config[] =
+{
+#ifdef BSP_USING_UART0
+    UART0_CONFIG,
+#endif
+#ifdef BSP_USING_UART1
+    UART1_CONFIG,
+#endif
+};
+
+static struct mcu_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
+
+#ifdef BSP_USING_UART1
+void UART1_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    
+    rt_hw_serial_isr(&(uart_obj[UART1_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
+    /* leave interrupt */
+    uint32_t  intst = 0;
+    intst = MXC_UART1->int_fl;
+    MXC_UART1->int_fl = intst;
+
+    rt_interrupt_leave();
+}
+#endif
+
+#ifdef BSP_USING_UART0
+void UART0_IRQHandler(void)
+{
+    //UART_Handler(MXC_UART0);
+    /* enter interrupt */
+    rt_interrupt_enter();
+    
+    rt_hw_serial_isr(&(uart_obj[UART0_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
+    /* leave interrupt */
+    uint32_t  intst = 0;
+    intst = MXC_UART0->int_fl;
+    MXC_UART0->int_fl = intst;
+    
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+
+static rt_err_t mcu_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    int error, i;
+    struct mcu_uart *uart;
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+    const sys_cfg_uart_t sys_uart_cfg = {
+        MAP_A,
+        UART_FLOW_DISABLE,
+    };
+    uart = rt_container_of(serial, struct mcu_uart, serial);
+    uart_cfg_t mcu_cfg;
+    uart->handle = uart->config->Instance;
+    mcu_cfg.baud = cfg->baud_rate;
+    mcu_cfg.stop = UART_STOP_1;
+    mcu_cfg.parity = UART_PARITY_DISABLE;
+    mcu_cfg.size = UART_DATA_SIZE_8_BITS;
+    mcu_cfg.flow = UART_FLOW_CTRL_EN;
+    mcu_cfg.pol = UART_FLOW_POL_EN;
+    
+    error= UART_Init(uart->handle, &mcu_cfg, &sys_uart_cfg);
+    
+     
+    return RT_EOK;
+}
+
+static rt_err_t mcu_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct mcu_uart *uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = rt_container_of(serial, struct mcu_uart, serial);
+
+    switch (cmd)
+    {
+    /* disable interrupt */
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+      //  NVIC_DisableIRQ(uart->config->irq_type);
+        NVIC_ClearPendingIRQ(uart->config->irq_type);
+        NVIC_DisableIRQ(uart->config->irq_type);
+        /* disable interrupt */
+        break;
+
+    /* enable interrupt */
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+          NVIC_SetPriority(uart->config->irq_type, 1);
+          NVIC_EnableIRQ(uart->config->irq_type);
+    /* enable interrupt */
+          uart->handle->ctrl |=  0x05 << MXC_F_UART_CTRL_RX_TO_POS;
+          uart->handle->int_en |= MXC_F_UART_INT_EN_RX_FIFO_THRESH | MXC_F_UART_INT_EN_RX_TIMEOUT;
+#define UART_ER_IE (MXC_F_UART_INT_EN_RX_FRAME_ERROR | \
+                    MXC_F_UART_INT_EN_RX_PARITY_ERROR | \
+                    MXC_F_UART_INT_EN_RX_OVERRUN )
+              uart->handle->int_en |= UART_ER_IE;
+    
+          uart->handle->thresh_ctrl=MXC_UART_FIFO_DEPTH<<
+                      MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH_POS;
+        break;
+
+#ifdef RT_SERIAL_USING_DMA
+    case RT_DEVICE_CTRL_CONFIG:
+        stm32_dma_config(serial, ctrl_arg);
+        break;
+#endif
+
+    case RT_DEVICE_CTRL_CLOSE:
+//        if (HAL_UART_DeInit(&(uart->handle)) != HAL_OK )
+//        {
+//            RT_ASSERT(0)
+//        }
+        break;
+
+    }
+    return RT_EOK;
+}
+
+static int mcu_putc(struct rt_serial_device *serial, char c)
+{
+    struct mcu_uart *uart;
+    RT_ASSERT(serial != RT_NULL);
+
+    uart = rt_container_of(serial, struct mcu_uart, serial);
+    UART_WriteByte(uart->handle, c);
+    return 1;
+}
+
+static int mcu_getc(struct rt_serial_device *serial)
+{
+    int ch;
+    struct mcu_uart *uart;
+    RT_ASSERT(serial != RT_NULL);
+    uart = rt_container_of(serial, struct mcu_uart, serial);
+
+    ch = -1;
+
+    if(UART_NumReadAvail(uart->handle))
+    {
+       ch = UART_ReadByte(uart->handle);
+    }
+
+    return ch;
+}
+
+
+
+
+
+static const struct rt_uart_ops mcu_uart_ops =
+{
+    .configure = mcu_configure,
+    .control = mcu_control,
+    .putc = mcu_putc,
+    .getc = mcu_getc,
+};
+
+int rt_hw_usart_init(void)
+{
+    rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct mcu_uart);
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+    rt_err_t result = 0;
+
+    for (int i = 0; i < obj_num; i++)
+    {
+        /* init UART object */
+        uart_obj[i].config = &uart_config[i];
+        uart_obj[i].serial.ops    = &mcu_uart_ops;
+        uart_obj[i].serial.config = config;
+
+        /* register UART device */
+        result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
+                                       RT_DEVICE_FLAG_RDWR
+                                       | RT_DEVICE_FLAG_INT_RX
+                                       | RT_DEVICE_FLAG_INT_TX
+                                       , NULL);
+        RT_ASSERT(result == RT_EOK);
+    }
+
+    return result;
+}
+//INIT_BOARD_EXPORT(rt_hw_usart_init);
+#endif /* RT_USING_SERIAL */

bsp/maxim/MAX32660_EVSYS/applications/drv_usart.h

+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018.10.30     SummerGift   first version
+ * 2019.03.05     whj4674672   add stm32h7
+ * 2020-10-14     Dozingfiretruck   Porting for stm32wbxx
+ */
+
+#ifndef __DRV_USART_H__
+#define __DRV_USART_H__
+
+int rt_hw_usart_init(void);
+
+#endif  /* __DRV_USART_H__ */

bsp/maxim/MAX32660_EVSYS/board/Kconfig

 menu "Hardware Drivers Config"
 
-config SOC_NRF52840
+config SOC_MAX32660
     bool
-    config SOC_NRF52840
+    config SOC_MAX32660
     select RT_USING_COMPONENTS_INIT
     select RT_USING_USER_MAIN
-    default y
-    config NRFX_CLOCK_ENABLED
-    int 
-    default 1
-    config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
-    int 
-    default 7
-    config NRFX_CLOCK_CONFIG_LF_SRC
-    int 
-    default 1  
-
     
-config SOC_NORDIC
+config SOC_MAXIM
     bool 
-    config SOC_NORDIC
+    config SOC_MAXIM
     default y
 
-menu "Onboard Peripheral Drivers"
-    config BSP_USING_JLINK_TO_USART
-        bool "Enable JLINK TO USART (uart0|RX_PIN:8|TX_PIN:6)"
-        select BSP_USING_UART
-        select BSP_USING_UART0
-        default y
-
-    menuconfig BSP_USING_QSPI_FLASH
-        select PKG_USING_FAL
-        bool "Enable QSPI FLASH(MX25R64 8MB)"
-        default n
-
-        if BSP_USING_QSPI_FLASH
-            config NRFX_QSPI_ENABLED
-            int 
-            default 1
-            config BSP_QSPI_SCK_PIN
-                int "QSPI SCK pin number"
-                range 0 31
-                default 19
-            config BSP_QSPI_CSN_PIN
-                int "QSPI CSN pin number"
-                range 0 31
-                default 17
-            config BSP_QSPI_IO0_PIN
-                int "QSPI IO0 pin number"
-                range 0 31
-                default 20
-            config BSP_QSPI_IO1_PIN
-                int "QSPI IO1 pin number"
-                range 0 31
-                default 21
-            config BSP_QSPI_IO2_PIN
-                int "QSPI IO2 pin number"
-                range 0 31
-                default 22
-            config BSP_QSPI_IO3_PIN
-                int "QSPI IO3 pin number"
-                range 0 31
-                default 23
-            config QSPI_FLASH_SIZE_KB 
-                int "QSPI FLASH SIZE, DEFAULT size 8192 KB"
-                default 8192
-        endif
-endmenu
-
 menu "On-chip Peripheral Drivers"
     config BSP_USING_GPIO
         bool "Enable GPIO"
         select RT_USING_PIN
         default y
-    if BSP_USING_GPIO
-        config NRFX_GPIOTE_ENABLED
-        int 
-        default 1  
-    endif
-    config BSP_USING_SAADC
-        bool "Enable SAADC"
-        select RT_USING_ADC
-        default n
-        if BSP_USING_SAADC
-                config NRFX_SAADC_ENABLED
-                int 
-                default 1  
-        endif
-    menuconfig BSP_USING_PWM
-        bool "Enable PWM"
-        select RT_USING_PWM
-        default n
-        if BSP_USING_PWM
-                config NRFX_PWM_ENABLED
-                int 
-                default 1
-                config BSP_USING_PWM0
-                    bool "Enable PWM0 bus"
-                    default y
-                if BSP_USING_PWM0
-                    config NRFX_PWM0_ENABLED
-                    int 
-                    default 1
-                    config BSP_USING_PWM0_CH0
-                        int "PWM0 channel 0 pin number set"
-                        range 0 47
-                        default 13
-                    config BSP_USING_PWM0_CH1
-                        int "PWM0 channel 1 pin number set"
-                        range 0 47
-                        default 14
-                    config BSP_USING_PWM0_CH2
-                        int "PWM0 channel 2 pin number set"
-                        range 0 47
-                        default 15
-                    config BSP_USING_PWM0_CH3
-                        int "PWM0 channel 3 pin number set"
-                        range 0 47
-                        default 16
-                endif
-                config BSP_USING_PWM1
-                    bool "Enable PWM1 bus"
-                    default n
-                if BSP_USING_PWM1
-                    config NRFX_PWM1_ENABLED
-                    int 
-                    default 1
-                    config BSP_USING_PWM1_CH0
-                        int "PWM1 channel 0 pin number set"
-                        range 0 47
-                        default 13
-                    config BSP_USING_PWM1_CH1
-                        int "PWM1 channel 1 pin number set"
-                        range 0 47
-                        default 14
-                    config BSP_USING_PWM1_CH2
-                        int "PWM1 channel 2 pin number set"
-                        range 0 47
-                        default 15
-                    config BSP_USING_PWM1_CH3
-                        int "PWM1 channel 3 pin number set"
-                        range 0 47
-                        default 16
-                endif
-                config BSP_USING_PWM2
-                    bool "Enable PWM2 bus"
-                    default n
-                if BSP_USING_PWM2
-                    config NRFX_PWM2_ENABLED
-                    int 
-                    default 1
-                    config BSP_USING_PWM2_CH0
-                        int "PWM2 channel 0 pin number set"
-                        range 0 47
-                        default 13
-                    config BSP_USING_PWM2_CH1
-                        int "PWM2 channel 1 pin number set"
-                        range 0 47
-                        default 14
-                    config BSP_USING_PWM2_CH2
-                        int "PWM2 channel 2 pin number set"
-                        range 0 47
-                        default 15
-                    config BSP_USING_PWM2_CH3
-                        int "PWM2 channel 3 pin number set"
-                        range 0 47
-                        default 16
-                endif
-                config BSP_USING_PWM3
-                    bool "Enable PWM3 bus"
-                    default n
-                if BSP_USING_PWM3
-                    config NRFX_PWM3_ENABLED
-                    int 
-                    default 1
-                    config BSP_USING_PWM3_CH0
-                        int "PWM3 channel 0 pin number set"
-                        range 0 47
-                        default 13
-                    config BSP_USING_PWM3_CH1
-                        int "PWM3 channel 1 pin number set"
-                        range 0 47
-                        default 14
-                    config BSP_USING_PWM3_CH2
-                        int "PWM3 channel 2 pin number set"
-                        range 0 47
-                        default 15
-                    config BSP_USING_PWM3_CH3
-                        int "PWM3 channel 3 pin number set"
-                        range 0 47
-                        default 16
-                endif
-        endif
-
-    
-    config BSP_USING_UART
-		bool "Enable UART"
-        default y
-        select RT_USING_SERIAL
-		if BSP_USING_UART
-		choice
-		prompt "UART or UARTE"
-		default NRFX_USING_UART
-		help
-			Select the UART or UARTE
-		config NRFX_USING_UART
-			bool "UART"
-		
-		config NRFX_USING_UARTE
-			bool "UARTE"
-		endchoice
-		endif
-        if BSP_USING_UART&&NRFX_USING_UART
-            config NRFX_UART_ENABLED
-            int 
-            default 1
-
-            config BSP_USING_UART0
-                bool "Enable UART0"
-                default y 
-                if BSP_USING_UART0
-                    config NRFX_UART0_ENABLED
-                    int 
-                    default 1
-                    config BSP_UART0_RX_PIN
-                        int "uart0 rx pin number"
-                        range 0 31
-                        default 8
-                    config BSP_UART0_TX_PIN
-                        int "uart0 tx pin number"
-                        range 0 31
-                        default 6
-                endif
-        endif
-        if BSP_USING_UART&&NRFX_USING_UARTE
-            config NRFX_UARTE_ENABLED
-            int 
-            default 1
-
-            config BSP_USING_UART0
-                bool "Enable UARTE0"
-                default n 
-                if BSP_USING_UART0
-                    config NRFX_UARTE0_ENABLED
-                    int 
-                    default 1
-                    config BSP_UART0_RX_PIN
-                        int "uarte0 rx pin number"
-                        range 0 31
-                        default 8
-                    config BSP_UART0_TX_PIN
-                        int "uarte0 tx pin number"
-                        range 0 31
-                        default 6
-                endif
-            config BSP_USING_UART1
-                bool "Enable UARTE1"
-                default n 
-                if BSP_USING_UART1
-                    config NRFX_UARTE1_ENABLED
-                    int 
-                    default 1
-                    config BSP_UART1_RX_PIN
-                        int "uarte1 rx pin number"
-                        range 0 31
-                        default 7
-                    config BSP_UART1_TX_PIN
-                        int "uarte1 tx pin number"
-                        range 0 31
-                        default 5
-                endif
-        endif
-    config BSP_USING_I2C
-        bool "Enable I2C"
-        select RT_USING_I2C
-        default n
-        if BSP_USING_I2C
-            config NRFX_TWIM_ENABLED
-            int 
-            default 1
-            config BSP_USING_I2C0
-                bool "Enable I2C0 bus"
-                default n
-            if BSP_USING_I2C0
-                config NRFX_TWIM0_ENABLED
-                int 
-                default 1
-                config BSP_I2C0_SCL_PIN
-                    int "i2c0 scl pin number"
-                    range 0 31
-                    default 27
-                config BSP_I2C0_SDA_PIN
-                    int "I2C0 sda pin number"
-                    range 0 31
-                    default 26
-            endif
-            config BSP_USING_I2C1
-                bool "Enable I2C1 bus"
-                default n
-            if BSP_USING_I2C1
-                config NRFX_TWIM1_ENABLED
-                int 
-                default 1
-                config BSP_I2C1_SCL_PIN
-                    int "i2c1 scl pin number"
-                    range 0 31
-                    default 3
-                config BSP_I2C1_SDA_PIN
-                    int "I2C1 sda pin number"
-                    range 0 31
-                    default 2
-            endif
-        endif
-    config BSP_USING_SPI
-        bool "Enable SPI"
-        select RT_USING_PIN
-        default y
-
-        if BSP_USING_SPI
-            config NRFX_SPI_ENABLED
-            int 
-            default 1
-            config BSP_USING_SPI0
-                bool "Enable SPI0 bus"
-                default y
-            if BSP_USING_SPI0
-                config NRFX_SPI0_ENABLED
-                    int "Enable SPI0 instance"
-                    default 1
-                config BSP_SPI0_SCK_PIN
-                    int "SPI0 sck pin number set"
-                    range 0 47
-                    default 28
-                config BSP_SPI0_MOSI_PIN
-                    int "SPI0 mosi pin number set"
-                    range 0 47
-                    default 29
-                config BSP_SPI0_MISO_PIN
-                    int "SPI0 miso pin number set"
-                    range 0 47
-                    default 30
-                config BSP_SPI0_SS_PIN
-                    int "SPI0 ss pin number set"
-                    range 0 47
-                    default 31
-            endif
-
-            config BSP_USING_SPI1
-                bool "Enable SPI1 bus"
-                default n
-            if BSP_USING_SPI1
-                config NRFX_SPI1_ENABLED
-                    int "Enable SPI1 instance"
-                    default 1
-                config BSP_SPI1_SCK_PIN
-                    int "SPI0 sck pin number set"
-                    range 0 47
-                    default 28
-                config BSP_SPI1_MOSI_PIN
-                    int "SPI0 mosi pin number set"
-                    range 0 47
-                    default 29
-                config BSP_SPI1_MISO_PIN
-                    int "SPI0 miso pin number set"
-                    range 0 47
-                    default 30
-                config BSP_SPI1_SS_PIN
-                    int "SPI0 ss pin number set"
-                    range 0 47
-                    default 31
-            endif
-
-            config BSP_USING_SPI2
-                bool "Enable SPI2 bus"
-                default n
-            if BSP_USING_SPI2
-                config NRFX_SPI2_ENABLED
-                    int "Enable SPI2 instance"
-                    default 1
-                config BSP_SPI2_SCK_PIN
-                    int "SPI0 sck pin number set"
-                    range 0 47
-                    default 28
-                config BSP_SPI2_MOSI_PIN
-                    int "SPI0 mosi pin number set"
-                    range 0 47
-                    default 29
-                config BSP_SPI2_MISO_PIN
-                    int "SPI0 miso pin number set"
-                    range 0 47
-                    default 30
-                config BSP_SPI2_SS_PIN
-                    int "SPI0 ss pin number set"
-                    range 0 47
-                    default 31
-            endif
-
-        endif
     config BSP_USING_ON_CHIP_FLASH
         select PKG_USING_FAL
         bool "Enable on-chip FLASH"
         default n
 
-    menu "On-chip flash config"
-
-        config MCU_FLASH_START_ADDRESS  
-            hex "MCU FLASH START ADDRESS"
-            default 0x00000000
-
-        config MCU_FLASH_SIZE_KB  
-            int "MCU FLASH SIZE, MAX size 1024 KB"
-            range 1 1024
-            default 1024		
-
-        config MCU_SRAM_START_ADDRESS 
-            hex "MCU RAM START ADDRESS"
-            default 0x20000000
-
-        config MCU_SRAM_SIZE_KB 
-            int "MCU RAM SIZE, MAX size 256 KB"
-            range 1 256
-            default 256
-
-        config MCU_FLASH_PAGE_SIZE 
-            hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000"
-            range 0x1000 0x1000
-            default 0x1000
-	endmenu
-    config BSP_USING_WDT
-        bool "Enable WDT"
-        select RT_USING_WDT
-        default n
-    if BSP_USING_WDT
-        config NRFX_WDT_ENABLED
-        int
-        default 1
-        config NRFX_WDT0_ENABLED
-        int
-        default 1
-        config NRFX_WDT_CONFIG_NO_IRQ
-        int
-        default 1
-    endif
-
-    menuconfig BSP_USING_ONCHIP_RTC
-    bool "Enable RTC"
-    select RT_USING_RTC
-    select RT_USING_LIBC
-    default n
-    if BSP_USING_ONCHIP_RTC
-        config NRFX_CLOCK_ENABLED
-        int 
-        default 1
-        config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
-        int
-        default 7
-        config NRFX_RTC_ENABLED
-        int 
-        default 1
-        config NRFX_RTC0_ENABLED
-        int
-        default 1
-        config NRFX_RTC1_ENABLED
-        int
-        default 1
-        config NRFX_RTC2_ENABLED
-        int
-        default 1
-        config RTC_INSTANCE_ID
-        int 
-        default 2
-        config RTC_INSTANCE_ID
-            int "select RTC instance id, must be 0, 1, 2"
-            range 0 2
-            default 2
-    endif
-
 endmenu
 
-choice
-prompt "BLE STACK"
-default BLE_STACK_USING_NULL
-help
-    Select the ble stack
-
-config BLE_STACK_USING_NULL
-    bool "not use the ble stack"
-
-config  BSP_USING_SOFTDEVICE
-    select PKG_USING_NRF5X_SDK
-    bool "Nordic softdevice(perpheral)"
-
-config BSP_USING_NIMBLE
-    select PKG_USING_NIMBLE
-    select PKG_NIMBLE_BSP_NRF52840
-    bool "use nimble stack(iot)"
-endchoice
-
 
 endmenu
 

bsp/maxim/MAX32660_EVSYS/board/board.c

@@ -10,11 +10,12 @@
  */
 #include <rtthread.h>
 #include <rthw.h>
-#include <nrfx_systick.h>
-
+#include <stdio.h>
 #include "board.h"
-#include "drv_uart.h"
-#include <nrfx_clock.h>
+#include "mxc_sys.h"
+#ifdef RT_USING_SERIAL
+#include "drv_usart.h"
+#endif
 
 /**
  * This is the timer interrupt service routine.
@@ -31,63 +32,49 @@ void SysTick_Handler(void)
     rt_interrupt_leave();
 }
 
-static void clk_event_handler(nrfx_clock_evt_type_t event){}
-
 void SysTick_Configuration(void)
 {
-    nrfx_clock_init(clk_event_handler);
-    nrfx_clock_enable();
-    nrfx_clock_lfclk_start();
-    /* Set interrupt priority */
-    NVIC_SetPriority(SysTick_IRQn, 0xf);
-
-    /* Configure SysTick to interrupt at the requested rate. */
-    nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND);
-    nrf_systick_val_clear();
-    nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE
-                        | NRF_SYSTICK_CSR_ENABLE);
+    uint32_t error;
+    error = SYS_SysTick_Config(SYS_SysTick_GetFreq()/RT_TICK_PER_SECOND, 1, MXC_TMR0);
 
+    if (error != E_NO_ERROR) {
+        printf("ERROR: Ticks is not valid");
+    }
 }
 
+mxc_uart_regs_t *ConsoleUART = MXC_UART_GET_UART(1);
+
+const sys_cfg_uart_t console_uart_sys_cfg = {
+    MAP_A,
+    UART_FLOW_DISABLE,
+};
+
 
 void rt_hw_board_init(void)
 {
-    rt_hw_interrupt_enable(0);
+   // rt_hw_interrupt_enable(0);
     // sd_power_dcdc_mode_set(NRF_POWER_DCDC_ENABLE);
     /* Activate deep sleep mode */
-    SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 
     SysTick_Configuration();
 
 #if defined(RT_USING_HEAP)
-    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+    rt_system_heap_init((void *)(0x20000000+16*1024), (void *)(0x20000000+64*1024));
 #endif
-
+   
 #ifdef RT_USING_SERIAL
-    rt_hw_uart_init();
+    rt_hw_usart_init();
 #endif
-
+    
 #ifdef RT_USING_CONSOLE
     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
 #endif
-
+    
 #ifdef RT_USING_COMPONENTS_INIT
     rt_components_board_init();
 #endif
+    
 
-#ifdef BSP_USING_SOFTDEVICE
-    extern uint32_t  Image$$RW_IRAM1$$Base;
-    uint32_t const *const m_ram_start  = &Image$$RW_IRAM1$$Base;
-    if ((uint32_t)m_ram_start == 0x20000000)
-    {
-        rt_kprintf("\r\n using softdevice the RAM couldn't be %p,please use the templete from package\r\n", m_ram_start);
-        while (1);
-    }
-    else
-    {
-        rt_kprintf("\r\n using softdevice the RAM at %p\r\n", m_ram_start);
-    }
-#endif
 
 }
 

bsp/maxim/MAX32660_EVSYS/board/board.h

@@ -3,7 +3,6 @@
 
 #include <rtthread.h>
 #include <rthw.h>
-#include "nrf.h"
 
 #define MCU_FLASH_SIZE MCU_FLASH_SIZE_KB*1024
 #define MCU_FLASH_END_ADDRESS        ((uint32_t)(MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE))

bsp/maxim/MAX32660_EVSYS/board/linker_scripts/link.sct

@@ -2,13 +2,14 @@
 ; *** Scatter-Loading Description File generated by uVision ***
 ; *************************************************************
 
-LR_IROM1 0x00000000 0x100000  {    ; load region size_region
-  ER_IROM1 0x00000000 0x100000  {  ; load address = execution address
+LR_IROM1 0x00000000 0x00040000  {    ; load region size_region
+  ER_IROM1 0x00000000 0x00040000  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
+   .ANY (+XO)
   }
-  RW_IRAM1 0x20000000 0x40000  {  ; RW data
+  RW_IRAM1 0x20000000 0x00018000  {  ; RW data
    .ANY (+RW +ZI)
   }
 }

bsp/maxim/MAX32660_EVSYS/board/nrfx_config.h

-/**
- * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- *    list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- *    Semiconductor ASA integrated circuit in a product or a software update for
- *    such product, must reproduce the above copyright notice, this list of
- *    conditions and the following disclaimer in the documentation and/or other
- *    materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- *    contributors may be used to endorse or promote products derived from this
- *    software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- *    Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- *    engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef NRFX_CONFIG_H__
-#define NRFX_CONFIG_H__
-
-// TODO - temporary redirection
-#include <sdk_config.h>
-
-#endif // NRFX_CONFIG_H__

bsp/maxim/MAX32660_EVSYS/board/nrfx_glue.h

-/*
- * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- *    list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its
- *    contributors may be used to endorse or promote products derived from this
- *    software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef NRFX_GLUE_H__
-#define NRFX_GLUE_H__
-
-// THIS IS A TEMPLATE FILE.
-// It should be copied to a suitable location within the host environment into
-// which nrfx is integrated, and the following macros should be provided with
-// appropriate implementations.
-// And this comment should be removed from the customized file.
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-#include <stdbool.h>
-#include "nrf.h"
-/**
- * @defgroup nrfx_glue nrfx_glue.h
- * @{
- * @ingroup nrfx
- *
- * @brief This file contains macros that should be implemented according to
- *        the needs of the host environment into which @em nrfx is integrated.
- */
-
-// Uncomment this line to use the standard MDK way of binding IRQ handlers
-// at linking time.
-#include <soc/nrfx_irqs.h>
-
-//------------------------------------------------------------------------------
-
-/**
- * @brief Macro for placing a runtime assertion.
- *
- * @param expression Expression to be evaluated.
- */
-#define NRFX_ASSERT(expression)
-
-/**
- * @brief Macro for placing a compile time assertion.
- *
- * @param expression Expression to be evaluated.
- */
-#define NRFX_STATIC_ASSERT(expression)
-
-//------------------------------------------------------------------------------
-
-/**
- * @brief Macro for setting the priority of a specific IRQ.
- *
- * @param irq_number IRQ number.
- * @param priority   Priority to be set.
- */
-#define NRFX_IRQ_PRIORITY_SET(irq_number, priority)     NVIC_SetPriority(irq_number, priority)
-
-/**
- * @brief Macro for enabling a specific IRQ.
- *
- * @param irq_number IRQ number.
- */
-#define NRFX_IRQ_ENABLE(irq_number)     NVIC_EnableIRQ(irq_number)
-
-/**
- * @brief Macro for checking if a specific IRQ is enabled.
- *
- * @param irq_number IRQ number.
- *
- * @retval true  If the IRQ is enabled.
- * @retval false Otherwise.
- */
-#define NRFX_IRQ_IS_ENABLED(irq_number)  _NRFX_IRQ_IS_ENABLED(irq_number)
-static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number)
-{
-    return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32)));
-}
-
-
-/**
- * @brief Macro for disabling a specific IRQ.
- *
- * @param irq_number IRQ number.
- */
-#define NRFX_IRQ_DISABLE(irq_number)  _NRFX_IRQ_DISABLE(irq_number)
-static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number)
-{
-    NVIC_DisableIRQ(irq_number);
-}
-
-
-/**
- * @brief Macro for setting a specific IRQ as pending.
- *
- * @param irq_number IRQ number.
- */
-#define NRFX_IRQ_PENDING_SET(irq_number)
-
-/**
- * @brief Macro for clearing the pending status of a specific IRQ.
- *
- * @param irq_number IRQ number.
- */
-#define NRFX_IRQ_PENDING_CLEAR(irq_number)
-
-/**
- * @brief Macro for checking the pending status of a specific IRQ.
- *
- * @retval true  If the IRQ is pending.
- * @retval false Otherwise.
- */
-#define NRFX_IRQ_IS_PENDING(irq_number)
-
-/** @brief Macro for entering into a critical section. */
-#define NRFX_CRITICAL_SECTION_ENTER()
-
-/** @brief Macro for exiting from a critical section. */
-#define NRFX_CRITICAL_SECTION_EXIT()
-
-//------------------------------------------------------------------------------
-
-/**
- * @brief When set to a non-zero value, this macro specifies that
- *        @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
- *        A compilation error is generated if the DWT unit is not present
- *        in the SoC used.
- */
-#define NRFX_DELAY_DWT_BASED    0
-
-/**
- * @brief Macro for delaying the code execution for at least the specified time.
- *
- * @param us_time Number of microseconds to wait.
- */
-#define NRFX_DELAY_US(us_time)
-
-//------------------------------------------------------------------------------
-
-/** @brief Atomic 32-bit unsigned type. */
-#define nrfx_atomic_t
-
-/**
- * @brief Macro for storing a value to an atomic object and returning its previous value.
- *
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value  Value to store.
- *
- * @return Previous value of the atomic object.
- */
-#define NRFX_ATOMIC_FETCH_STORE(p_data, value)
-
-/**
- * @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
- *
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value  Value of the second operand in the OR operation.
- *
- * @return Previous value of the atomic object.
- */
-#define NRFX_ATOMIC_FETCH_OR(p_data, value)
-
-/**
- * @brief Macro for running a bitwise AND operation on an atomic object
- *        and returning its previous value.
- *
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value  Value of the second operand in the AND operation.
- *
- * @return Previous value of the atomic object.
- */
-#define NRFX_ATOMIC_FETCH_AND(p_data, value)
-
-/**
- * @brief Macro for running a bitwise XOR operation on an atomic object
- *        and returning its previous value.
- *
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value  Value of the second operand in the XOR operation.
- *
- * @return Previous value of the atomic object.
- */
-#define NRFX_ATOMIC_FETCH_XOR(p_data, value)
-
-/**
- * @brief Macro for running an addition operation on an atomic object
- *        and returning its previous value.
- *
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value  Value of the second operand in the ADD operation.
- *
- * @return Previous value of the atomic object.
- */
-#define NRFX_ATOMIC_FETCH_ADD(p_data, value)
-
-/**
- * @brief Macro for running a subtraction operation on an atomic object
- *        and returning its previous value.
- *
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value  Value of the second operand in the SUB operation.
- *
- * @return Previous value of the atomic object.
- */
-#define NRFX_ATOMIC_FETCH_SUB(p_data, value)
-
-//------------------------------------------------------------------------------
-
-/**
- * @brief When set to a non-zero value, this macro specifies that the
- *        @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined
- *        in a customized way and the default definitions from @c <nrfx_error.h>
- *        should not be used.
- */
-#define NRFX_CUSTOM_ERROR_CODES 0
-
-//------------------------------------------------------------------------------
-
-/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
-#define NRFX_DPPI_CHANNELS_USED  0
-
-/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
-#define NRFX_DPPI_GROUPS_USED    0
-
-/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
-#define NRFX_PPI_CHANNELS_USED  0
-
-/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
-#define NRFX_PPI_GROUPS_USED    0
-
-/** @brief Bitmask that defines EGU instances that are reserved for use outside of the nrfx library. */
-#define NRFX_EGUS_USED          0
-
-/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
-#define NRFX_TIMERS_USED        0
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRFX_GLUE_H__

bsp/maxim/MAX32660_EVSYS/board/nrfx_log.h

-/*
- * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- *    list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its
- *    contributors may be used to endorse or promote products derived from this
- *    software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef NRFX_LOG_H__
-#define NRFX_LOG_H__
-
-// THIS IS A TEMPLATE FILE.
-// It should be copied to a suitable location within the host environment into
-// which nrfx is integrated, and the following macros should be provided with
-// appropriate implementations.
-// And this comment should be removed from the customized file.
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrfx_log nrfx_log.h
- * @{
- * @ingroup nrfx
- *
- * @brief This file contains macros that should be implemented according to
- *        the needs of the host environment into which @em nrfx is integrated.
- */
-
-/**
- * @brief Macro for logging a message with the severity level ERROR.
- *
- * @param format printf-style format string, optionally followed by arguments
- *               to be formatted and inserted in the resulting string.
- */
-#define NRFX_LOG_ERROR(format, ...)
-
-/**
- * @brief Macro for logging a message with the severity level WARNING.
- *
- * @param format printf-style format string, optionally followed by arguments
- *               to be formatted and inserted in the resulting string.
- */
-#define NRFX_LOG_WARNING(format, ...)
-
-/**
- * @brief Macro for logging a message with the severity level INFO.
- *
- * @param format printf-style format string, optionally followed by arguments
- *               to be formatted and inserted in the resulting string.
- */
-#define NRFX_LOG_INFO(format, ...)
-
-/**
- * @brief Macro for logging a message with the severity level DEBUG.
- *
- * @param format printf-style format string, optionally followed by arguments
- *               to be formatted and inserted in the resulting string.
- */
-#define NRFX_LOG_DEBUG(format, ...)
-
-
-/**
- * @brief Macro for logging a memory dump with the severity level ERROR.
- *
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length   Length of the memory region in bytes.
- */
-#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
-
-/**
- * @brief Macro for logging a memory dump with the severity level WARNING.
- *
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length   Length of the memory region in bytes.
- */
-#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
-
-/**
- * @brief Macro for logging a memory dump with the severity level INFO.
- *
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length   Length of the memory region in bytes.
- */
-#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
-
-/**
- * @brief Macro for logging a memory dump with the severity level DEBUG.
- *
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length   Length of the memory region in bytes.
- */
-#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
-
-
-/**
- * @brief Macro for getting the textual representation of a given error code.
- *
- * @param[in] error_code Error code.
- *
- * @return String containing the textual representation of the error code.
- */
-#define NRFX_LOG_ERROR_STRING_GET(error_code)
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRFX_LOG_H__

bsp/maxim/MAX32660_EVSYS/rtconfig.h

 #ifndef RT_CONFIG_H__
 #define RT_CONFIG_H__
 
+#define RT_USING_USER_MAIN
+#define RT_TICK_PER_SECOND 1000
+#define BSP_USING_UART1
+#define BSP_USING_UART0
+#define RT_USING_COMPONENTS_INIT
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 256
+#define RT_CONSOLE_DEVICE_NAME "uart1"
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_USING_MSH_ONLY
+#define FINSH_ARG_MAX 10
+
+
 /* Automatically generated file; DO NOT EDIT. */
 /* RT-Thread Configuration */
 
@@ -10,7 +36,8 @@
 #define RT_ALIGN_SIZE 4
 #define RT_THREAD_PRIORITY_32
 #define RT_THREAD_PRIORITY_MAX 32
-#define RT_TICK_PER_SECOND 100
+
+
 #define RT_USING_OVERFLOW_CHECK
 #define RT_USING_HOOK
 #define RT_USING_IDLE_HOOK
@@ -38,36 +65,16 @@
 /* Kernel Device Object */
 
 #define RT_USING_DEVICE
-#define RT_USING_CONSOLE
-#define RT_CONSOLEBUF_SIZE 128
-#define RT_CONSOLE_DEVICE_NAME "uart0"
 #define RT_VER_NUM 0x40003
 
 /* RT-Thread Components */
 
-#define RT_USING_COMPONENTS_INIT
-#define RT_USING_USER_MAIN
-#define RT_MAIN_THREAD_STACK_SIZE 2048
-#define RT_MAIN_THREAD_PRIORITY 10
 
 /* C++ features */
 
 
 /* Command shell */
 
-#define RT_USING_FINSH
-#define FINSH_THREAD_NAME "tshell"
-#define FINSH_USING_HISTORY
-#define FINSH_HISTORY_LINES 5
-#define FINSH_USING_SYMTAB
-#define FINSH_USING_DESCRIPTION
-#define FINSH_THREAD_PRIORITY 20
-#define FINSH_THREAD_STACK_SIZE 4096
-#define FINSH_CMD_SIZE 80
-#define FINSH_USING_MSH
-#define FINSH_USING_MSH_DEFAULT
-#define FINSH_USING_MSH_ONLY
-#define FINSH_ARG_MAX 10
 
 /* Device virtual file system */
 
@@ -138,6 +145,9 @@
 /* system packages */
 
 
+/* Micrium: Micrium software products porting for RT-Thread */
+
+
 /* peripheral libraries and drivers */
 
 #define PKG_USING_NRFX
@@ -149,37 +159,15 @@
 /* samples: kernel and components samples */
 
 
-/* Hardware Drivers Config */
+/* games: games run on RT-Thread console */
 
-#define SOC_NRF52840
-#define NRFX_CLOCK_ENABLED 1
-#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7
-#define NRFX_CLOCK_CONFIG_LF_SRC 1
-#define SOC_NORDIC
 
-/* Onboard Peripheral Drivers */
+/* Hardware Drivers Config */
 
-#define BSP_USING_JLINK_TO_USART
+#define SOC_MAXIM
 
 /* On-chip Peripheral Drivers */
 
 #define BSP_USING_GPIO
-#define NRFX_GPIOTE_ENABLED 1
-#define BSP_USING_UART
-#define NRFX_USING_UART
-#define NRFX_UART_ENABLED 1
-#define BSP_USING_UART0
-#define NRFX_UART0_ENABLED 1
-#define BSP_UART0_RX_PIN 8
-#define BSP_UART0_TX_PIN 6
-
-/* On-chip flash config */
-
-#define MCU_FLASH_START_ADDRESS 0x00000000
-#define MCU_FLASH_SIZE_KB 1024
-#define MCU_SRAM_START_ADDRESS 0x20000000
-#define MCU_SRAM_SIZE_KB 256
-#define MCU_FLASH_PAGE_SIZE 0x1000
-#define BLE_STACK_USING_NULL
 
 #endif

bsp/maxim/MAX32660_EVSYS/template.uvoptx

@@ -77,7 +77,7 @@
         <tvExpOptDlg>0</tvExpOptDlg>
         <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
-      <CpuCode>5</CpuCode>
+      <CpuCode>255</CpuCode>
       <DebugOpt>
         <uSim>0</uSim>
         <uTrg>1</uTrg>
@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>4</nTsel>
+        <nTsel>3</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -114,18 +114,18 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile></tIfile>
-        <pMon>Segger\JL2CM3.dll</pMon>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
         <SetRegEntry>
           <Number>0</Number>
-          <Key>JL2CM3</Key>
-          <Name>-U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"CMSIS-DAP" -U04440000e28e0cd70000000000000000 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0MAX32660.FLM -FS00 -FL040000 -FP0($$Device:MAX32660$Flash\MAX32660.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
-          <Name>UL2CM3(-S0 -C0 -P0 )  -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0MAX32660 -FL040000 -FS00 -FP0($$Device:MAX32660$Flash\MAX32660.FLM)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>

bsp/maxim/MAX32660_EVSYS/template.uvprojx

@@ -14,16 +14,16 @@
       <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
-          <Device>nRF52840_xxAA</Device>
-          <Vendor>Nordic Semiconductor</Vendor>
-          <PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.32.1</PackID>
-          <PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x40000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Device>MAX32660</Device>
+          <Vendor>Maxim</Vendor>
+          <PackID>Maxim.MAX32660.1.2.0</PackID>
+          <PackURL>http://www.mxim.net/microcontroller/pack/</PackURL>
+          <Cpu>IRAM(0x20000000,0x00018000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
-          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm))</FlashDriverDll>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0MAX32660 -FS00 -FL040000 -FP0($$Device:MAX32660$Flash\MAX32660.FLM))</FlashDriverDll>
           <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:nRF52840_xxAA$Device\Include\nrf.h</RegisterFile>
+          <RegisterFile>$$Device:MAX32660$Libraries\Device\Maxim\MAX32660\Include\max32660.h</RegisterFile>
           <MemoryEnv></MemoryEnv>
           <Cmp></Cmp>
           <Asm></Asm>
@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:nRF52840_xxAA$SVD\nrf52840.svd</SFDFile>
+          <SFDFile>$$Device:MAX32660$SVD\MAX32660\max32660.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -110,11 +110,11 @@
         </CommonProperty>
         <DllOption>
           <SimDllName>SARMCM3.DLL</SimDllName>
-          <SimDllArguments>  -MPU</SimDllArguments>
+          <SimDllArguments> </SimDllArguments>
           <SimDlgDll>DCM.DLL</SimDlgDll>
           <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
           <TargetDllName>SARMCM3.DLL</TargetDllName>
-          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDllArguments></TargetDllArguments>
           <TargetDlgDll>TCM.DLL</TargetDlgDll>
           <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
         </DllOption>
@@ -245,12 +245,12 @@
               <IRAM>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x40000</Size>
+                <Size>0x18000</Size>
               </IRAM>
               <IROM>
                 <Type>1</Type>
                 <StartAddress>0x0</StartAddress>
-                <Size>0x100000</Size>
+                <Size>0x40000</Size>
               </IROM>
               <XRAM>
                 <Type>0</Type>
@@ -275,7 +275,7 @@
               <OCR_RVCT4>
                 <Type>1</Type>
                 <StartAddress>0x0</StartAddress>
-                <Size>0x100000</Size>
+                <Size>0x40000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
@@ -300,7 +300,7 @@
               <OCR_RVCT9>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x40000</Size>
+                <Size>0x18000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -315,7 +315,7 @@
             <Optim>1</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>1</OneElfS>
+            <OneElfS>0</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
@@ -336,7 +336,7 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls>--reduce_paths</MiscControls>
-              <Define>BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S140 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74</Define>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -372,7 +372,7 @@
             <ScatterFile></ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
-            <Misc>--diag_suppress 6330</Misc>
+            <Misc></Misc>
             <LinkerInputFile></LinkerInputFile>
             <DisabledWarnings></DisabledWarnings>
           </LDads>

bsp/maxim/libraries/CMSIS/RTE_Components.h

+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: 'Hello_World' 
+ * Target:  'Debug' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File: 
+ */
+#define CMSIS_device_header "max32660.h"
+
+#define BOARD EvKit_V1 /* Target Board */
+#define RTE_USING_FINSH
+#define TARGET 32660   /* Target Device Part Number */
+               #define TARGET_REV 0x4131 /* Target Device Revision Number */
+
+#endif /* RTE_COMPONENTS_H */

bsp/maxim/libraries/CMSIS/cmsis_compiler.h

+/**************************************************************************//**
+ * @file     cmsis_compiler.h
+ * @brief    CMSIS compiler generic header file
+ * @version  V5.1.0
+ * @date     09. October 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#include <stdint.h>
+
+/*
+ * Arm Compiler 4/5
+ */
+#if   defined ( __CC_ARM )
+  #include "cmsis_armcc.h"
+
+
+/*
+ * Arm Compiler 6.6 LTM (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
+  #include "cmsis_armclang_ltm.h"
+
+  /*
+ * Arm Compiler above 6.10.1 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
+  #include "cmsis_armclang.h"
+
+
+/*
+ * GNU Compiler
+ */
+#elif defined ( __GNUC__ )
+  #include "cmsis_gcc.h"
+
+
+/*
+ * IAR Compiler
+ */
+#elif defined ( __ICCARM__ )
+  #include <cmsis_iccarm.h>
+
+
+/*
+ * TI Arm Compiler
+ */
+#elif defined ( __TI_ARM__ )
+  #include <cmsis_ccs.h>
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __attribute__((packed))
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)                           __attribute__((aligned(x)))
+  #endif
+  #ifndef   __RESTRICT
+    #define __RESTRICT                             __restrict
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * TASKING Compiler
+ */
+#elif defined ( __TASKING__ )
+  /*
+   * The CMSIS functions have been implemented as intrinsics in the compiler.
+   * Please use "carm -?i" to get an up to date list of all intrinsics,
+   * Including the CMSIS ones.
+   */
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __packed__
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __packed__
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __packed__
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __packed__ T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)              __align(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * COSMIC Compiler
+ */
+#elif defined ( __CSMC__ )
+   #include <cmsis_csm.h>
+
+ #ifndef   __ASM
+    #define __ASM                                  _asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    // NO RETURN is automatically detected hence no warning here
+    #define __NO_RETURN
+  #endif
+  #ifndef   __USED
+    #warning No compiler specific solution for __USED. __USED is ignored.
+    #define __USED
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __weak
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               @packed
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        @packed struct
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         @packed union
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    @packed struct T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+    #define __ALIGNED(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+#else
+  #error Unknown compiler.
+#endif
+
+
+#endif /* __CMSIS_COMPILER_H */
+

bsp/maxim/libraries/CMSIS/cmsis_version.h

+/**************************************************************************//**
+ * @file     cmsis_version.h
+ * @brief    CMSIS Core(M) Version definitions
+ * @version  V5.0.4
+ * @date     23. July 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CMSIS_VERSION_H
+#define __CMSIS_VERSION_H
+
+/*  CMSIS Version definitions */
+#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB   ( 4U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
+                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
+#endif

bsp/maxim/libraries/CMSIS/mxc_config.h

+/**
+ * @file       mxc_config.h
+ * @brief      Top-level include file for device configuration.
+ */
+ 
+/*******************************************************************************
+ * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *
+ * $Date: 2018-08-09 18:45:02 -0500 (Thu, 09 Aug 2018) $
+ * $Revision: 36818 $
+ *
+ ******************************************************************************/
+
+#ifndef _MXC_CONFIG_H
+#define _MXC_CONFIG_H
+
+#if !defined __GNUC__
+#include "RTE_Components.h"
+#endif /* not __GNUC__ */
+
+#include "mxc_device.h"
+#include "mxc_errors.h"
+#include "mxc_pins.h"
+
+#endif /* _CONFIG_H */

bsp/maxim/libraries/MAX32660PeriphDriver/Include/mxc_config.h

+/**
+ * @file       mxc_config.h
+ * @brief      Top-level include file for device configuration.
+ */
+ 
+/*******************************************************************************
+ * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *
+ * $Date: 2018-08-09 18:45:02 -0500 (Thu, 09 Aug 2018) $
+ * $Revision: 36818 $
+ *
+ ******************************************************************************/
+
+#ifndef _MXC_CONFIG_H
+#define _MXC_CONFIG_H
+
+#if !defined __GNUC__
+#include "RTE_Components.h"
+#endif /* not __GNUC__ */
+
+#include "mxc_device.h"
+#include "mxc_errors.h"
+#include "mxc_pins.h"
+
+#endif /* _CONFIG_H */