[libcpu/aarch64] disable irq/fiq when switch thread (#5605)

* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

libcpu/aarch64/common/context_gcc.S

@@ -150,15 +150,15 @@ rt_hw_get_gtimer_frq:
     B.EQ    1f
     B       .
 3:
-    MOV     X3, 0x0d
+    MOV     X3, #((3 << 6) | 0x0d)  /* EL3h */
     MOV     X2, X30
     B       0f
 2:
-    MOV     X3, 0x09
+    MOV     X3, #((3 << 6) | 0x09)  /* EL2h */
     MOV     X2, X30
     B       0f
 1:
-    MOV     X3, 0x05
+    MOV     X3, #((3 << 6) | 0x05)  /* EL1h */
     MOV     X2, X30
     B       0f
 0:

libcpu/aarch64/common/cpu.c

@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2011-09-15     Bernard      first version
  * 2019-07-28     zdzn         add smp support
- * 2021-12-21     GuEe-GUI     set tpidr_el2 as multiprocessor id instead of mpidr_el1
+ * 2021-12-21     GuEe-GUI     set tpidr_el1 as multiprocessor id instead of mpidr_el1
  * 2021-12-28     GuEe-GUI     add spinlock for aarch64
  */
 

libcpu/aarch64/common/startup_gcc.S

-/*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- */
-
-    .global Reset_Handler
-    .section ".start", "ax"
-Reset_Handler:
-    nop

libcpu/aarch64/common/vector_gcc.S

@@ -8,9 +8,6 @@
  * 2022-02-16     GuEe-GUI     replace vectors entry to macro
  */
 
-#include "rtconfig.h"
-
-#ifndef RT_USING_VMTHREAD
 .macro  ventry label
     .align 7
     b   \label
@@ -45,4 +42,3 @@ system_vectors:
     ventry  vector_error    /* IRQ/vIRQ */
     ventry  vector_error    /* FIQ/vFIQ */
     ventry  vector_error    /* SError/vSError */
-#endif /* !RT_USING_VMTHREAD */