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未验证 提交 0e254652 编写于 作者: Dozingfiretruck's avatar Dozingfiretruck 提交者： GitHub
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add:air105 bsp (#5607) 

* add:air105 bsp

* add:去掉注释代码

* add:注释修改

* fix:格式化一遍代码格式

* add:main函数添加闪灯

* add:完善bsp

* add:添加一些信息

* add:使用工作队列喂狗

* add:整理目录

* add:去掉乱码部分

* add:修改readme

* add:更新readme说明

* add:去掉bootloader.bin和soc_download.exe，README.md中添加标注

* fix:去除多余文件

* add:补充license

* add:支持scons --dist

* add:更新soc_download.exe连接地址
上级 7746d288
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bsp/airm2m/README.md 0 → 100644
浏览文件 @ 0e254652
### 本文档为 合宙 开发团队为 airm2m bsp 提供的资料、介绍说明。
**合宙官网：https://openluat.com**
**wiki教程文档：https://wiki.luatos.com/**
**luatos仓库：https://gitee.com/openLuat/LuatOS**
**Luatos RTthread 软件包仓库：https://github.com/openLuat/luatos-soc-rtt**
**API手册：https://wiki.luatos.com/api/index.html**
**社区：https://doc.openluat.com/**
**air105仓库：https://gitee.com/openLuat/luatos-soc-air105**
**购买地址：https://luat.taobao.com/index.htm?spm=a1z10.5-c-s.w5002-24045920810.2.457f5bcdtkiPyX**
**如有问题提问请详细说明现象，提供日志以及最新复现工程,在https://gitee.com/openLuat/LuatOS/issues报问题**
bsp/airm2m/air105/.config 0 → 100644
浏览文件 @ 0e254652
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
#
# kservice optimization
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMHEAP is not set
CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
# CONFIG_RT_USING_SLAB_AS_HEAP is not set
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
# CONFIG_RT_USING_HEAP_ISR is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40100
CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M4=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
# CONFIG_RT_USING_LEGACY is not set
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_RT_USING_MSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_USING_SERIAL_V1 is not set
CONFIG_RT_USING_SERIAL_V2=y
CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
CONFIG_RT_USING_WDT=y
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB is not set
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# POSIX (Portable Operating System Interface) layer
#
# CONFIG_RT_USING_POSIX_FS is not set
# CONFIG_RT_USING_POSIX_DELAY is not set
# CONFIG_RT_USING_POSIX_CLOCK is not set
# CONFIG_RT_USING_POSIX_TIMER is not set
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Interprocess Communication (IPC)
#
# CONFIG_RT_USING_POSIX_PIPE is not set
# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set
# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set
#
# Socket is in the 'Network' category
#
#
# Network
#
# CONFIG_RT_USING_SAL is not set
# CONFIG_RT_USING_NETDEV is not set
# CONFIG_RT_USING_LWIP is not set
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
# CONFIG_PKG_USING_ZB_COORDINATOR is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_EZ_IOT_OS is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_LORA_PKT_FWD is not set
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
# CONFIG_PKG_USING_SMALL_MODBUS is not set
# CONFIG_PKG_USING_NET_SERVER is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_LIBSODIUM is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
#
# CONFIG_PKG_USING_LUATOS_SOC is not set
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
# CONFIG_PKG_USING_PIKASCRIPT is not set
#
# multimedia packages
#
#
# LVGL: powerful and easy-to-use embedded GUI library
#
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
#
# u8g2: a monochrome graphic library
#
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
# CONFIG_PKG_USING_UGUI is not set
#
# PainterEngine: A cross-platform graphics application framework written in C language
#
# CONFIG_PKG_USING_PAINTERENGINE is not set
# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_TERMBOX is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_QRCODE is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_MEMORYPERF is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# CONFIG_PKG_USING_FDT is not set
#
# system packages
#
#
# enhanced kernel services
#
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
#
# POSIX extension functions
#
# CONFIG_PKG_USING_POSIX_GETLINE is not set
# CONFIG_PKG_USING_POSIX_WCWIDTH is not set
# CONFIG_PKG_USING_POSIX_ITOA is not set
# CONFIG_PKG_USING_POSIX_STRINGS is not set
#
# acceleration: Assembly language or algorithmic acceleration packages
#
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
#
# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
#
# CONFIG_PKG_USING_CMSIS_5 is not set
# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_RT_USING_ARDUINO is not set
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
# CONFIG_PKG_USING_ARM_2D is not set
# CONFIG_PKG_USING_MCUBOOT is not set
# CONFIG_PKG_USING_TINYUSB is not set
# CONFIG_PKG_USING_USB_STACK is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_RS232 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
# CONFIG_PKG_USING_KOBUKI is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_MICRO_ROS is not set
# CONFIG_PKG_USING_MCP23008 is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_CW2015 is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# miscellaneous packages
#
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# entertainment: terminal games and other interesting software packages
#
# CONFIG_PKG_USING_CMATRIX is not set
# CONFIG_PKG_USING_SL is not set
# CONFIG_PKG_USING_CAL is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_LZMA is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
# CONFIG_PKG_USING_CONTROLLER is not set
# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
#
# Hardware Drivers Config
#
CONFIG_SOC_AIR105=y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_SHELL_TO_USART=y
# CONFIG_BSP_USING_SPI_FLASH is not set
# CONFIG_BSP_USING_ETH is not set
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
CONFIG_BSP_UART0_RX_BUFSIZE=256
CONFIG_BSP_UART0_TX_BUFSIZE=0
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
CONFIG_BSP_USING_WDT=y
bsp/airm2m/air105/Kconfig 0 → 100644
浏览文件 @ 0e254652
mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "board/Kconfig"
bsp/airm2m/air105/README.md 0 → 100644
浏览文件 @ 0e254652
# AIR105开发板 BSP 说明
## 简介
本文档为 合宙 开发团队为 AIR105开发板提供的 BSP (板级支持包) 说明。
主要内容如下：
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 开发板介绍
AIR105 是合宙推出的一款基于 ARM Cortex-M4 内核的10mm x 10mm 大小的MCU，最高主频为 204Mhz，不仅提供UART/GPIO/I2C/ADC/SPI等基础外设，更提供DAC/USB/DCMI/HSPI等高级外设接口，内置充电功能，支持5V/3.3V供电，同时自带5v转3.3V的LDO，4M字节Flash，640K字节RAM。
开发板外观如下图所示：
![board](figures/board.png)
该开发板常用 **板载资源** 如下：
- MCU：Air105，主频 204MHz，4M FLASH ，640KB RAM
- 调试下载接口，UART0 To Type-c USB 接口
开发板更多详细信息请参考合宙Air105 [合宙Air105开发板介绍](https://wiki.luatos.com/chips/air105/board.html)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
| 片上外设 | **支持情况** |
| -------- | ------------ |
| GPIO | 支持 |
| UART | 支持 |
| SPI | 支持 |
| I2C | 支持 |
| RTC | 支持 |
| WDT | 支持 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 GCC 工程，支持 GCC 开发环境。下面介绍如何将系统运行起来。
#### 硬件连接
使用数据线连接开发板到 PC。
#### 编译下载
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`。
3. 输入`scons`进行编译。
编译完成会自动打包bl : bootloader.bin和下载工具:soc_download.exe在bsp目录下生成rtthread_air105.soc，使用[Luatools](http://cdndownload.openluat.com/Luat_tool_src/last_release/Luatools_v2.exe)下载进开发板即可。
#### 运行结果
下载程序成功之后，系统会自动运行。
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（1500000-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.1.0 build Feb 22 2022 09:53:22
2006 - 2022 Copyright by RT-Thread team
msh >
```
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口0 的功能，如果需使用更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons`进行编译。
**Luatos同样也上线了RTthread 软件包，仓库：https://github.com/openLuat/luatos-soc-rtt**
## 注意事项
**bootloader.bin和soc_download.exe如不存在会自动下载，请保持网络通畅**
**烧录前请设置波特率为1500000**
**air105必须启用看门狗，默认启用**
**更多资料参考[WIKI](https://wiki.luatos.com/)**
## 联系人信息
维护人:
- [**合宙Luat**](https://gitee.com/openLuat)
- [**淘宝地址**](https://item.taobao.com/item.htm?spm=a1z10.5-c-s.w4002-24045920841.15.29395bcdUExSHR&id=666216389131)
bsp/airm2m/air105/SConscript 0 → 100644
浏览文件 @ 0e254652
# for module compiling
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
bsp/airm2m/air105/SConstruct 0 → 100644
浏览文件 @ 0e254652
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/libraries'):
libraries_path_prefix = SDK_ROOT + '/libraries'
else:
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)
bsp/airm2m/air105/applications/SConscript 0 → 100644
浏览文件 @ 0e254652
import rtconfig
from building import *
cwd = GetCurrentDir()
CPPPATH = [cwd, str(Dir('#'))]
src = Split("""
main.c
""")
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/airm2m/air105/applications/main.c 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
#include "drv_gpio.h"
/* defined the LED2 pin: PD14 */
#define LED0_PIN GPIOD_14
/* defined the LED3 pin: PD15 */
#define LED1_PIN GPIOD_15
/* defined the LED4 pin: PC3 */
#define LED2_PIN GPIOC_03
int main(void)
{
uint32_t Speed = 200;
/* set LED2 pin mode to output */
rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
/* set LED3 pin mode to output */
rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
/* set LED4 pin mode to output */
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
while (1)
{
rt_pin_write(LED0_PIN, PIN_LOW);
rt_thread_mdelay(Speed);
rt_pin_write(LED1_PIN, PIN_LOW);
rt_thread_mdelay(Speed);
rt_pin_write(LED2_PIN, PIN_LOW);
rt_thread_mdelay(Speed);
rt_pin_write(LED0_PIN, PIN_HIGH);
rt_thread_mdelay(Speed);
rt_pin_write(LED1_PIN, PIN_HIGH);
rt_thread_mdelay(Speed);
rt_pin_write(LED2_PIN, PIN_HIGH);
rt_thread_mdelay(Speed);
}
}
bsp/airm2m/air105/board/Kconfig 0 → 100644
浏览文件 @ 0e254652
menu "Hardware Drivers Config"
config SOC_AIR105
bool
select ARCH_ARM_CORTEX_M4
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select BSP_USING_WDT
default y
menu "Onboard Peripheral Drivers"
config BSP_USING_SHELL_TO_USART
bool "Enable SHELL TO USART (uart0)"
select BSP_USING_UART
select BSP_USING_UART0
default y
config BSP_USING_SPI_FLASH
bool "Enable SPI FLASH (W25Q64 spi1)"
select BSP_USING_SPI
select RT_USING_SFUD
select RT_SFUD_USING_SFDP
default n
config BSP_USING_ETH
bool "Enable Ethernet Driver"
select PKG_USING_WIZNET
select BSP_USING_SPI
default n
if BSP_USING_ETH
config EXTERNAL_PHY_ADDRESS
hex
default 0x00
config WIZ_SPI_BUS
string "WIZ SPI bus name"
default "spi2"
config WIZ_SPI_CS
int "WIZ SPI bus cs pin"
default 19
endif
endmenu
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
menuconfig BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
if BSP_USING_UART
menuconfig BSP_USING_UART0
bool "Enable UART0 (Debugger)"
default n
if BSP_USING_UART0
config BSP_UART0_RX_BUFSIZE
int "Set UART0 RX buffer size"
range 64 65535
depends on RT_USING_SERIAL_V2
default 256
config BSP_UART0_TX_BUFSIZE
int "Set UART0 TX buffer size"
range 0 65535
depends on RT_USING_SERIAL_V2
default 0
endif
menuconfig BSP_USING_UART1
bool "Enable UART1"
default n
if BSP_USING_UART1
config BSP_UART1_RX_BUFSIZE
int "Set UART1 RX buffer size"
range 64 65535
depends on RT_USING_SERIAL_V2
default 256
config BSP_UART1_TX_BUFSIZE
int "Set UART1 TX buffer size"
range 0 65535
depends on RT_USING_SERIAL_V2
default 0
endif
menuconfig BSP_USING_UART2
bool "Enable UART2"
default n
if BSP_USING_UART2
config BSP_UART2_RX_BUFSIZE
int "Set UART2 RX buffer size"
range 64 65535
depends on RT_USING_SERIAL_V2
default 256
config BSP_UART2_TX_BUFSIZE
int "Set UART2 TX buffer size"
range 0 65535
depends on RT_USING_SERIAL_V2
default 256
endif
menuconfig BSP_USING_UART3
bool "Enable UART3"
default n
if BSP_USING_UART3
config BSP_UART3_RX_BUFSIZE
int "Set UART3 RX buffer size"
range 64 65535
depends on RT_USING_SERIAL_V2
default 256
config BSP_UART3_TX_BUFSIZE
int "Set UART3 TX buffer size"
range 0 65535
depends on RT_USING_SERIAL_V2
default 256
endif
endif
config BSP_USING_I2C
bool "Enable HW I2C"
select RT_USING_I2C
default n
if BSP_USING_I2C
config I2C_BUS_NAME
string "HW I2C bus name"
default "i2c"
endif
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
default n
select RT_USING_SPI
if BSP_USING_SPI
config BSP_USING_HSPI0
bool "Enable HSPI0 BUS"
default n
config BSP_USING_SPI0
bool "Enable SPI0 BUS"
default n
config BSP_USING_SPI1
bool "Enable SPI1 BUS"
default n
config BSP_USING_SPI2
bool "Enable SPI2 BUS"
default n
config BSP_USING_SPI0S
bool "Enable SPI0S BUS"
default n
endif
config BSP_USING_ONCHIP_RTC
bool "Enable HW onchip rtc"
select RT_USING_ONCHIP_RTC
default n
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
select RT_USING_DEVICE_IPC
select RT_USING_SYSTEM_WORKQUEUE
default n
endmenu
endmenu
bsp/airm2m/air105/board/SConscript 0 → 100644
浏览文件 @ 0e254652
import os
import rtconfig
from building import *
Import('SDK_LIB')
cwd = GetCurrentDir()
CPPDEFINES = ['__USE_XTL__']
# add general drivers
src = Split('''
board.c
''')
if GetDepend(['BSP_USING_ETH']):
src += Glob('ports/w5500_device.c')
if GetDepend(['BSP_USING_SPI_FLASH']):
src += Glob('ports/spi_flash_init.c')
if GetDepend(['BSP_USING_WDT']):
src += Glob('wdt_feed.c')
path = [cwd]
startup_path_prefix = SDK_LIB
if rtconfig.CROSS_TOOL == 'gcc':
src += [startup_path_prefix + '/HAL_Driver/Startup/gcc/startup_gcc.s']
elif rtconfig.CROSS_TOOL == 'keil':
src += [startup_path_prefix + '/HAL_Driver/Startup/arm/startup_gcc.s']
elif rtconfig.CROSS_TOOL == 'iar':
src += [startup_path_prefix + '/HAL_Driver/Startup/iar/startup_gcc.s']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')
bsp/airm2m/air105/board/board.c 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include "board.h"
uint32_t SystemCoreClock;
extern const uint32_t __isr_start_address;
const uint32_t __attribute__((section (".app_info")))
g_CAppInfo[256] =
{
__APP_START_MAGIC__,
sizeof(g_CAppInfo),
0,
0,
};
void SystemInit(void)
{
#ifdef __USE_XTL__
SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_EXT | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
#else
SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_INC | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
#endif
SCB->VTOR = (uint32_t)(&__isr_start_address);
SYSCTRL->CG_CTRL1 = SYSCTRL_APBPeriph_ALL;
SYSCTRL->SOFT_RST1 = SYSCTRL_APBPeriph_ALL;
SYSCTRL->PHER_CTRL &= ~(1 << 20);
SYSCTRL->SOFT_RST2 &= ~SYSCTRL_USB_RESET;
SYSCTRL->LOCK_R |= SYSCTRL_USB_RESET;
__enable_irq();
}
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
SystemCoreClock = HSE_VALUE * (((SYSCTRL->FREQ_SEL & SYSCTRL_FREQ_SEL_XTAL_Mask) >> SYSCTRL_FREQ_SEL_XTAL_Pos) + 1);
}
void rt_hw_board_init(void)
{
GPIO_Config(GPIOC_03, 0, 0);
GPIO_Config(GPIOD_14, 0, 0);
GPIO_Config(GPIOD_15, 0, 0);
__NVIC_SetPriorityGrouping(7 - __NVIC_PRIO_BITS);
SystemCoreClockUpdate();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
rt_hw_systick_init();
DMA_GlobalInit();
Uart_GlobalInit();
DMA_TakeStream(DMA1_STREAM_1);//for qspi
CoreTick_Init();
#ifdef RT_USING_PIN
rt_hw_pin_init();
#endif
/* USART driver initialization is open by default */
#ifdef RT_USING_SERIAL
rt_hw_usart_init();
#endif
/* Set the shell console output device */
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
/* Board underlying hardware initialization */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
bsp/airm2m/air105/board/board.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include "app_inc.h"
#include <rtthread.h>
#include "rtconfig.h"
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END (void*)(0x20000000 + 0xA0000)
void rt_hw_board_init(void);
int rt_vbus_do_init(void);
#endif
bsp/airm2m/air105/board/linker_scripts/link.icf 0 → 100644
浏览文件 @ 0e254652
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x01000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0102FFFF;
define symbol __ICFEDIT_region_RAM1_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM1_end__ = 0x2009FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x0400;
define symbol __ICFEDIT_size_heap__ = 0x000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM1_region { readwrite, last block CSTACK };
bsp/airm2m/air105/board/linker_scripts/link.lds 0 → 100644
浏览文件 @ 0e254652
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K
FLASH (rx) : ORIGIN = 0x1010000, LENGTH = 3008K
}
ENTRY(Reset_Handler)
_system_stack_size = 0x4000;
SECTIONS
{
.app_info :
{
. = ALIGN(512);
KEEP(*(.app_info))
. = ALIGN(512);
} >FLASH
.text :
{
. = ALIGN(4);
__isr_start_address = .;
_stext = .;
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*startup_gcc.o(.text .text.*)
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
PROVIDE(__ctors_start__ = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE(__ctors_end__ = .);
. = ALIGN(4);
_etext = .;
} > FLASH
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
} > FLASH
__exidx_end = .;
/* .data section which is used for initialized data */
.data : AT (_sidata)
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_sdata = . ;
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >RAM
.stack :
{
. = ALIGN(4);
_sstack = .;
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >RAM
__bss_start = .;
.bss :
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_ebss = . ;
*(.bss.init)
} > RAM
__bss_end = .;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}
bsp/airm2m/air105/board/linker_scripts/link.sct 0 → 100644
浏览文件 @ 0e254652
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x01010000 0x002F0000 { ; load region size_region
ER_IROM1 0x01010000 0x002F0000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x000A0000 { ; RW data
.ANY (+RW +ZI)
}
}
bsp/airm2m/air105/board/ports/spi_flash_init.c 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include <rtthread.h>
#include "spi_flash.h"
#include "spi_flash_sfud.h"
#include "drv_spi.h"
#if defined(BSP_USING_SPI_FLASH)
static int rt_hw_spi_flash_init(void)
{
__HAL_RCC_GPIOA_CLK_ENABLE();
rt_hw_spi_device_attach("spi1", "spi10", GPIOA, GPIO_PIN_4);
if (RT_NULL == rt_sfud_flash_probe("W25Q64", "spi10"))
{
return -RT_ERROR;
};
return RT_EOK;
}
INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
#endif
bsp/airm2m/air105/board/ports/w5500_device.c 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include "drv_spi.h"
#include "board.h"
int w5500_spi_device_init(void)
{
return rt_hw_spi_device_attach(WIZ_SPI_BUS,WIZ_SPI_DEVICE, WIZ_SPI_CS);
}
INIT_DEVICE_EXPORT(w5500_spi_device_init);
bsp/airm2m/air105/board/wdt_feed.c 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include <rtthread.h>
#include <rtdevice.h>
static char device_name[] = "wdt";
static rt_device_t wdg_dev;
static struct rt_work wdt_feed;
static void wdt_feed_func(struct rt_work *work, void *work_data)
{
rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_KEEPALIVE, RT_NULL);
rt_work_submit(&wdt_feed, 1200);
}
static int wdt_feed_init(void)
{
rt_err_t ret = RT_EOK;
rt_uint32_t timeout = 2;
wdg_dev = rt_device_find(device_name);
if (!wdg_dev)
{
rt_kprintf("find %s failed!\n", device_name);
return RT_ERROR;
}
ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_SET_TIMEOUT, &timeout);
if (ret != RT_EOK)
{
rt_kprintf("set %s timeout failed!\n", device_name);
return RT_ERROR;
}
ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_START, RT_NULL);
if (ret != RT_EOK)
{
rt_kprintf("start %s failed!\n", device_name);
return -RT_ERROR;
}
rt_work_init(&wdt_feed, wdt_feed_func, RT_NULL);
rt_work_submit(&wdt_feed, 1200);
return RT_EOK;
}
INIT_COMPONENT_EXPORT(wdt_feed_init);
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105.h 0 → 100644
浏览文件 @ 0e254652
此差异已折叠。
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_adc.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_ADC_H__
#define __AIR105_ADC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Include ------------------------------------------------------------------*/
#include "air105.h"
#define IS_ADC_PERIPH(PERIPH) ((PERIPH) == ADC0)
#define ADC_CR1_CHANNEL_MASK ((uint32_t)0x07)
#define ADC_CR1_SAMPLE_RATE_Pos 3
#define ADC_CR1_SAMPLE_RATE_MASK (0x3 << ADC_CR1_SAMPLE_RATE_Pos)
#define ADC_CR1_SAMP_ENABLE BIT(6)
#define ADC_CR1_POWER_DOWN BIT(8)
#define ADC_CR1_IRQ_ENABLE BIT(5)
#define ADC_SR_DONE_FLAG BIT(0)
#define ADC_SR_FIFO_OV_FLAG BIT(1)
#define ADC_FIFO_OV_INT_ENABLE BIT(2)
#define ADC_FIFO_RESET BIT(1)
#define ADC_FIFO_ENABLE BIT(0)
#define ADC_CR2_BUFF_ENABLE BIT(14)
#define ADC_DIV_RESISTOR_EN_BIT BIT(13)
typedef enum
{
ADC_Overflow = 0,
ADC_NoOverflow = 1,
}ADC_OverflowTypeDef;
/* ADC Channel select */
typedef enum
{
ADC_CHANNEL_CHARGE_VBAT =0,
ADC_CHANNEL_1,
ADC_CHANNEL_2,
ADC_CHANNEL_3,
ADC_CHANNEL_4,
ADC_CHANNEL_5,
ADC_CHANNEL_6,
}ADC_ChxTypeDef;
#define IS_ADC_CHANNEL(CHANNEL_NUM) (((CHANNEL_NUM) == ADC_CHANNEL_CHARGE_VBAT) || \
((CHANNEL_NUM) == ADC_CHANNEL_1) || \
((CHANNEL_NUM) == ADC_CHANNEL_2) || \
((CHANNEL_NUM) == ADC_CHANNEL_3) || \
((CHANNEL_NUM) == ADC_CHANNEL_4) || \
((CHANNEL_NUM) == ADC_CHANNEL_5) || \
((CHANNEL_NUM) == ADC_CHANNEL_6))
/* ADC Samp Select */
typedef enum
{
ADC_SpeedPrescaler_None = 0,
ADC_SpeedPrescaler_2,
ADC_SpeedPrescaler_4,
ADC_SpeedPrescaler_8,
}ADC_SampTypeDef;
#define IS_ADC_SAMP(SAMP) (((SAMP) == ADC_SpeedPrescaler_None) || \
((SAMP) == ADC_SpeedPrescaler_2) || \
((SAMP) == ADC_SpeedPrescaler_4) || \
((SAMP) == ADC_SpeedPrescaler_8))
typedef struct _ADC_InitTypeDef
{
ADC_ChxTypeDef ADC_Channel; /* ADC Channel select */
ADC_SampTypeDef ADC_SampSpeed; /* ADC sampspeed select */
FunctionalState ADC_IRQ_EN; /* ADC IRQ/Polling Select */
FunctionalState ADC_FIFO_EN; /* ADC FIFO Enable Select */
} ADC_InitTypeDef;
/* Exported constants -------------------------------------------------------*/
/* Exported macro -----------------------------------------------------------*/
/* Exported functions -------------------------------------------------------*/
void ADC_Init(ADC_InitTypeDef *ADC_InitStruct);
void ADC_StartCmd(FunctionalState NewState);
void ADC_FIFODeepth(uint32_t FIFO_Deepth);
void ADC_FIFOReset(void);
void ADC_ITCmd(FunctionalState NewState);
void ADC_FIFOOverflowITcmd(FunctionalState NewState);
void ADC_BuffCmd(FunctionalState NewState);
void ADC_DivResistorCmd(FunctionalState NewState);
int32_t ADC_GetFIFOCount(void);
int32_t ADC_GetResult(void);
int32_t ADC_GetFIFOResult(uint16_t *ADCdata, uint32_t len);
uint32_t ADC_CalVoltage(uint32_t u32ADC_Value, uint32_t u32ADC_Ref_Value);
ADC_ChxTypeDef ADC_GetChannel(void);
FunctionalState ADC_IsDivResistorEnable(void);
ADC_OverflowTypeDef ADC_IsFIFOOverflow(void);
void ADC_ChannelSwitch(ADC_ChxTypeDef Channelx);
/* Exported variables -------------------------------------------------------*/
/* Exported types -----------------------------------------------------------*/
#ifdef __cplusplus
}
#endif
#endif /* __AIR105_ADC_H__ */
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_bpk.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_BPK_H
#define __AIR105_BPK_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "air105.h"
/** @defgroup BPK_Exported_Types
* @{
*/
#define BPK_KEY_REGION_0 ((uint32_t)0x0001)
#define BPK_KEY_REGION_1 ((uint32_t)0x0002)
#define BPK_KEY_REGION_ALL ((uint32_t)0x0003)
#define IS_BPK_KEY_REGION(REGION) ((((REGION) & ~BPK_KEY_REGION_ALL) == 0x00) && ((REGION) != 0x00))
#define IS_BPK_LOCK(LOCK) ((((LOCK) & ~BPK_LR_LOCK_ALL) == 0x00) && ((LOCK) != (uint32_t)0x00))
FlagStatus BPK_IsReady(void);
ErrorStatus BPK_WriteKey(uint32_t *Key,uint32_t Key_Len, uint32_t Key_Offset);
ErrorStatus BPK_ReadKey(uint32_t *Key,uint32_t Key_Len, uint32_t Key_Offset);
void BPK_KeyWriteLock(uint16_t BPK_KEY_Region, FunctionalState NewState);
void BPK_KeyReadLock(uint16_t BPK_KEY_Region, FunctionalState NewState);
void BPK_KeyClear(uint16_t BPK_KEY_Region);
void BPK_SetScramber(uint32_t Scram);
void BPK_Lock(uint32_t BPK_LOCK, FunctionalState NewState);
void BPK_LockSelf(void);
FlagStatus BPK_GetLockStatus(uint32_t BPK_LOCK);
#ifdef __cplusplus
}
#endif
#endif
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_cache.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_CACHE_H
#define __AIR105_CACHE_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "air105.h"
#define CACHE_REFRESH ((uint32_t)0x80000000)
#define CACHE_REFRESH_ALLTAG ((uint32_t)0x40000000)
#define CACHE_KEY_GEN_START ((uint32_t)0x80000000)
#define CACHE_IS_BUSY ((uint32_t)0x20000000)
#define CACHE_SIZE ((uint32_t)0x8000)
#define CACHE_PARTICLE_SIZE (0x20)
#define CACHE_ADDRESS_START ((uint32_t)0x01000000)
#define CACHE_ADDRESS_MAX ((uint32_t)0x00FFFFFF)
#define IS_CACHE_ADDR_VALID(addr) (((addr) & CACHE_ADDRESS_START) == CACHE_ADDRESS_START)
#define CACHE_AES_BYPASS (0xA5)
#define CACHE_KEY_GEN (0xA5)
#define CACHE_WRAP_ENABLE (0xA5)
#define CACHE_ZONE_ENCRYPT ((uint32_t)0xA5000000)
#define CACHE_CODE_BUS_OFFSET_POS (0)
#define CACHE_CODE_BUS_OFFSET_WIDTH (5)
#define CACHE_CODE_BUS_OFFSET_MASK ((uint32_t)0x001F)
#define CACHE_CODE_BUS_SET_POS (5)
#define CACHE_CODE_BUS_SET_WIDTH (8)
#define CACHE_CODE_BUS_SET_MASK ((uint32_t)0x00FF)
#define CACHE_CODE_BUS_TAG_POS (13)
#define CACHE_CODE_BUS_TAG_WIDTH (11)
#define CACHE_CODE_BUS_TAG_MASK ((uint32_t)0x07FF)
#define CHCHE_ALGORITHM_SET_POS (28)
#define CACHE_BUILD_INDEX_OFFSET(x) (((x) & CACHE_CODE_BUS_OFFSET_MASK) << CACHE_CODE_BUS_OFFSET_POS)
#define CACHE_BUILD_INDEX_SET(x) (((x) & CACHE_CODE_BUS_SET_MASK) << CACHE_CODE_BUS_SET_POS)
#define CACHE_BUILD_INDEX_TAG(x) (((x) & CACHE_CODE_BUS_TAG_MASK) << CACHE_CODE_BUS_TAG_POS)
#define CACHE_ADDRESS_BUILD(base,index_set,tag_way,offset) ((base) | CACHE_BUILD_INDEX_SET(index_set) | CACHE_BUILD_INDEX_TAG(tag_way) | CACHE_BUILD_INDEX_OFFSET(offset))
#define CACHE_TAG_NUM(x) ((x >> CACHE_CODE_BUS_TAG_POS) & CACHE_CODE_BUS_TAG_MASK)
#define CACHE_SET_NUM(x) ((x >> CACHE_CODE_BUS_SET_POS) & CACHE_CODE_BUS_SET_MASK)
#define CACHE_OFF_NUM(x) ((x >> CACHE_CODE_BUS_OFFSET_POS) & CACHE_CODE_BUS_OFFSET_MASK)
typedef enum
{
CACHE_Encrypt_Mode_All = 0x0,
CACHE_Encrypt_Mode_Zone,
}CACHE_EncryptModeTypeDef;
#define IS_CACHE_ENCRYPT_MODE(MODE) (((MODE) == CACHE_Encrypt_Mode_All) || \
((MODE) == CACHE_Encrypt_Mode_Zone))
typedef struct
{
uint32_t I[4];
uint32_t K[4];
uint32_t AES_CS;
uint32_t CONFIG;
uint32_t aes_enable;
uint32_t Address;
uint32_t size;
uint32_t algorithm;
uint32_t encrypt_mode;
uint32_t encrypt_saddr;
uint32_t encrypt_eaddr;
}CACHE_InitTypeDef;
void CACHE_Init(CACHE_TypeDef *Cache, CACHE_InitTypeDef *CACHE_InitStruct);
void CACHE_Clean(CACHE_TypeDef *Cache, CACHE_InitTypeDef *CACHE_InitStruct);
void CACHE_CleanAll(CACHE_TypeDef *Cache);
#ifdef __cplusplus
}
#endif
#endif
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_conf.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __AIR105_CONF_H
#define __AIR105_CONF_H
/* Includes ------------------------------------------------------------------*/
/* Uncomment the line below to enable peripheral header file inclusion */
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
#include "string.h"
#include "air105_cache.h"
#include "air105_dcmi.h"
#include "air105_dma.h"
#include "air105_gpio.h"
#include "air105_i2c.h"
#include "air105_qspi.h"
#include "air105_sysctrl.h"
#include "air105_timer.h"
#include "air105_uart.h"
#include "air105_wdt.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
#endif
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_crc.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_CRC_H
#define __AIR105_CRC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "air105.h"
/* Exported types ------------------------------------------------------------*/
typedef enum
{
CRC_16 = 0x01,
CRC_16_Modbus = 0x02,
CRC_CCITT_0xffff = 0x03,
CRC_CCITT_XModem = 0x04,
CRC_32 = 0x05
}CRC_Param_TypeDef;
typedef enum
{
CRC_Poly_16_1021 = 0x01,
CRC_Poly_16_8005 = 0x02,
CRC_Poly_32_04C11DB7 = 0x03
}CRC_Poly_TypeDef;
typedef enum
{
CRC_PolyMode_Normal = 0x01,
CRC_PolyMode_Reversed = 0x02,
}CRC_PolyMode_TypeDef;
typedef struct
{
CRC_Poly_TypeDef CRC_Poly;
CRC_PolyMode_TypeDef CRC_PolyMode;
uint32_t CRC_Init_Value;
uint32_t CRC_Xor_Value;
}CRC_ConfigTypeDef;
uint32_t CRC_CalcBlockCRC(uint32_t CRC_type, uint8_t *pData, uint32_t len);
uint32_t CRC_Calc(CRC_ConfigTypeDef *CRC_Config, uint8_t *pData, uint32_t len);
#ifdef __cplusplus
}
#endif
#endif
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dac.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_DAC_H__
#define __AIR105_DAC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Include ------------------------------------------------------------------*/
#include "air105.h"
#define DAC_CR1_IS_RUNNING ((uint32_t)0x20000000)
#define DAC_CR1_POWER_DOWN ((uint32_t)0x00000010)
#define DAC_CR1_FIFO_RESET ((uint32_t)0x00000008)
#define DAC_CR1_DMA_ENABLE ((uint32_t)0x00000004)
#define IS_DAC_DATA(DATA) ((DATA) <= 0x3FF)
#define DAC_CURR_SEL_MASK ((uint32_t)0x00000020)
#define DAC_CURR_SEL_20K ((uint32_t)0x00000000)
#define DAC_CURR_SEL_2K ((uint32_t)0x00000020)
#define IS_DAC_CURR_SEL(CURR) (((CURR) == DAC_CURR_SEL_20K) || \
((CURR) == DAC_CURR_SEL_2K))
#define IS_DAC_FIFO_THR(THR) ((THR) <= 0xF)
typedef struct _DAC_InitTypeDef
{
uint32_t DAC_CurrSel; /* DAC mode select */
uint32_t DAC_TimerExp; /* DAC timer expectation */
uint32_t DAC_FIFOThr; /* DAC FIFO Threshold */
} DAC_InitTypeDef;
#define DAC_FIFO_DEPTH (16)
#define DAC_IT_STATUS_SHIFT (30)
#define DAC_IT_FIFO_THR ((uint32_t)0x0002)
#define DAC_IT_FIFO_OVERFLOW ((uint32_t)0x0001)
#define IS_DAC_IT(IT) (((IT) == DAC_IT_FIFO_THR) || \
((IT) == DAC_IT_FIFO_OVERFLOW))
#define DAC_FLAG_RUNNING (DAC_CR1_IS_RUNNING)
#define DAC_FLAG_OVERFLOW ((uint32_t)0x40000000)
#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_RUNNING) || \
((FLAG) == DAC_FLAG_OVERFLOW))
/* Exported functions -------------------------------------------------------*/
void DAC_Init(DAC_InitTypeDef *DAC_InitStruct);
void DAC_StructInit(DAC_InitTypeDef *DAC_InitStruct);
void DAC_FIFOReset(void);
void DAC_Cmd(FunctionalState NewState);
void DAC_DMACmd(FunctionalState NewState);
void DAC_SetData(uint16_t Data);
FlagStatus DAC_GetFlagStatus(uint32_t DAC_Flag);
void DAC_ClearFlag(uint32_t DAC_Flag);
void DAC_ITConfig(uint32_t DAC_IT, FunctionalState NewState);
ITStatus DAC_GetITStatus(uint32_t DAC_IT);
void DAC_ClearITPendingBit(uint32_t DAC_IT);
#ifdef __cplusplus
}
#endif
#endif /* __AIR105_DAC_H__ */
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dcmi.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_DCMI_H
#define __AIR105_DCMI_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "air105.h"
/* Exported types ------------------------------------------------------------*/
/**
* @brief DCMI Init structure definition
*/
typedef struct
{
uint16_t DCMI_CaptureMode; /*!< Specifies the Capture Mode: Continuous or Snapshot.
This parameter can be a value of @ref DCMI_Capture_Mode */
uint16_t DCMI_SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
This parameter can be a value of @ref DCMI_Synchronization_Mode */
uint16_t DCMI_PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
This parameter can be a value of @ref DCMI_PIXCK_Polarity */
uint16_t DCMI_VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
This parameter can be a value of @ref DCMI_VSYNC_Polarity */
uint16_t DCMI_HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
This parameter can be a value of @ref DCMI_HSYNC_Polarity */
uint16_t DCMI_CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
This parameter can be a value of @ref DCMI_Capture_Rate */
uint16_t DCMI_ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
This parameter can be a value of @ref DCMI_Extended_Data_Mode */
uint32_t DCMI_ByteSelectMode; /*!< Specifies the Capture Select Byte Mode: Select All Bytes, 1 of 2, 1 of 4 or 2 of 4
This parameter can be a value of @ref DCMI_ByteSelect_Mode */
uint32_t DCMI_LineSelectMode; /*!< Specifies the Capture Select Line Mode: Select All Lines, Odd Line or Even Line
This parameter can be a value of @ref DCMI_ByteLine_Mode */
uint32_t DCMI_ClockDiv; /*!< Specifies the DCMI Slave Clock Div: 2~16 from HCLK
This parameter can be a value of @ref DCMI_Clock_Div */
} DCMI_InitTypeDef;
/**
* @brief DCMI CROP Init structure definition
*/
typedef struct
{
uint16_t DCMI_VerticalStartLine; /*!< Specifies the Vertical start line count from which the image capture
will start. This parameter can be a value between 0x00 and 0x1FFF */
uint16_t DCMI_HorizontalOffsetCount; /*!< Specifies the number of pixel clocks to count before starting a capture.
This parameter can be a value between 0x00 and 0x3FFF */
uint16_t DCMI_VerticalLineCount; /*!< Specifies the number of lines to be captured from the starting point.
This parameter can be a value between 0x00 and 0x3FFF */
uint16_t DCMI_CaptureCount; /*!< Specifies the number of pixel clocks to be captured from the starting
point on the same line.
This parameter can be a value between 0x00 and 0x3FFF */
} DCMI_CROPInitTypeDef;
/**
* @brief DCMI Embedded Synchronisation CODE Init structure definition
*/
typedef struct
{
uint8_t DCMI_FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
uint8_t DCMI_LineStartCode; /*!< Specifies the code of the line start delimiter. */
uint8_t DCMI_LineEndCode; /*!< Specifies the code of the line end delimiter. */
uint8_t DCMI_FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
} DCMI_CodesInitTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup DCMI_Exported_Constants
* @{
*/
/** @defgroup DCMI_Capture_Mode
* @{
*/
#define DCMI_CaptureMode_Continuous ((uint16_t)0x0000) /*!< The received data are transferred continuously
into the destination memory through the DMA */
#define DCMI_CaptureMode_SnapShot ((uint16_t)0x0002) /*!< Once activated, the interface waits for the start of
frame and then transfers a single frame through the DMA */
#define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_CaptureMode_Continuous) || \
((MODE) == DCMI_CaptureMode_SnapShot))
/**
* @}
*/
/** @defgroup DCMI_Synchronization_Mode
* @{
*/
#define DCMI_SynchroMode_Hardware ((uint16_t)0x0000) /*!< Hardware synchronization data capture (frame/line start/stop)
is synchronized with the HSYNC/VSYNC signals */
#define DCMI_SynchroMode_Embedded ((uint16_t)0x0010) /*!< Embedded synchronization data capture is synchronized with
synchronization codes embedded in the data flow */
#define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SynchroMode_Hardware) || \
((MODE) == DCMI_SynchroMode_Embedded))
/**
* @}
*/
/** @defgroup DCMI_PIXCK_Polarity
* @{
*/
#define DCMI_PCKPolarity_Falling ((uint16_t)0x0000) /*!< Pixel clock active on Falling edge */
#define DCMI_PCKPolarity_Rising ((uint16_t)0x0020) /*!< Pixel clock active on Rising edge */
#define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPolarity_Falling) || \
((POLARITY) == DCMI_PCKPolarity_Rising))
/**
* @}
*/
/** @defgroup DCMI_VSYNC_Polarity
* @{
*/
#define DCMI_VSPolarity_Low ((uint16_t)0x0000) /*!< Vertical synchronization active Low */
#define DCMI_VSPolarity_High ((uint16_t)0x0080) /*!< Vertical synchronization active High */
#define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPolarity_Low) || \
((POLARITY) == DCMI_VSPolarity_High))
/**
* @}
*/
/** @defgroup DCMI_HSYNC_Polarity
* @{
*/
#define DCMI_HSPolarity_Low ((uint16_t)0x0000) /*!< Horizontal synchronization active Low */
#define DCMI_HSPolarity_High ((uint16_t)0x0040) /*!< Horizontal synchronization active High */
#define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPolarity_Low) || \
((POLARITY) == DCMI_HSPolarity_High))
/**
* @}
*/
/** @defgroup DCMI_Capture_Rate
* @{
*/
#define DCMI_CaptureRate_All_Frame ((uint16_t)0x0000) /*!< All frames are captured */
#define DCMI_CaptureRate_1of2_Frame ((uint16_t)0x0100) /*!< Every alternate frame captured */
#define DCMI_CaptureRate_1of4_Frame ((uint16_t)0x0200) /*!< One frame in 4 frames captured */
#define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CaptureRate_All_Frame) || \
((RATE) == DCMI_CaptureRate_1of2_Frame) ||\
((RATE) == DCMI_CaptureRate_1of4_Frame))
/** @defgroup DCMI_Clock_Div
* @{
*/
#define DCMI_Clock_Div2 ((uint32_t)0x00000000)
#define DCMI_Clock_Div4 ((uint32_t)0x20000000)
#define DCMI_Clock_Div6 ((uint32_t)0x40000000)
#define DCMI_Clock_Div8 ((uint32_t)0x60000000)
#define DCMI_Clock_Div10 ((uint32_t)0x80000000)
#define DCMI_Clock_Div12 ((uint32_t)0xA0000000)
#define DCMI_Clock_Div14 ((uint32_t)0xC0000000)
#define DCMI_Clock_Div16 ((uint32_t)0xE0000000)
#define IS_DCMI_CLOCK_DIV(DIV) (((DIV) == DCMI_Clock_Div2) ||\
((DIV) == DCMI_Clock_Div4) ||\
((DIV) == DCMI_Clock_Div6) ||\
((DIV) == DCMI_Clock_Div8) ||\
((DIV) == DCMI_Clock_Div10) ||\
((DIV) == DCMI_Clock_Div12) ||\
((DIV) == DCMI_Clock_Div14) ||\
((DIV) == DCMI_Clock_Div16))
#define DCMI_Clock_Div_MSK ((uint32_t)0xE0000000)
/**
* @}
*/
/** @defgroup DCMI_Extended_Data_Mode
* @{
*/
#define DCMI_ExtendedDataMode_8b ((uint16_t)0x0000) /*!< Interface captures 8-bit data on every pixel clock */
#define DCMI_ExtendedDataMode_10b ((uint16_t)0x0400) /*!< Interface captures 10-bit data on every pixel clock */
#define DCMI_ExtendedDataMode_12b ((uint16_t)0x0800) /*!< Interface captures 12-bit data on every pixel clock */
#define DCMI_ExtendedDataMode_14b ((uint16_t)0x0C00) /*!< Interface captures 14-bit data on every pixel clock */
#define IS_DCMI_EXTENDED_DATA(DATA) (((DATA) == DCMI_ExtendedDataMode_8b) || \
((DATA) == DCMI_ExtendedDataMode_10b) ||\
((DATA) == DCMI_ExtendedDataMode_12b) ||\
((DATA) == DCMI_ExtendedDataMode_14b))
/** @defgroup DCMI_ByteSelectMode
* @{
*/
#define DCMI_ByteSelect_Mode_AllByte ((uint32_t)0x00000000)
#define DCMI_ByteSelect_Mode_1of2_OddStart ((uint32_t)0x00010000)
#define DCMI_ByteSelect_Mode_1of4_OddStart ((uint32_t)0x00020000)
#define DCMI_ByteSelect_Mode_2of4_OddStart ((uint32_t)0x00030000)
#define DCMI_ByteSelect_Mode_1of2_EvenStart ((uint32_t)0x00050000)
#define DCMI_ByteSelect_Mode_1of4_EvenStart ((uint32_t)0x00060000)
#define DCMI_ByteSelect_Mode_2of4_EvenStart ((uint32_t)0x00070000)
#define IS_DCMI_BYTESELECT_MODE(MODE) (((MODE) == DCMI_ByteSelect_Mode_AllByte) ||\
((MODE) == DCMI_ByteSelect_Mode_1of2_OddStart) ||\
((MODE) == DCMI_ByteSelect_Mode_1of4_OddStart) ||\
((MODE) == DCMI_ByteSelect_Mode_2of4_OddStart) ||\
((MODE) == DCMI_ByteSelect_Mode_1of2_EvenStart) ||\
((MODE) == DCMI_ByteSelect_Mode_1of4_EvenStart) ||\
((MODE) == DCMI_ByteSelect_Mode_2of4_EvenStart))
/** @defgroup DCMI_ByteSelectMode
* @{
*/
#define DCMI_LineSelect_Mode_AllLine ((uint32_t)0x00000000)
#define DCMI_LineSelect_Mode_OddLine ((uint32_t)0x00080000)
#define DCMI_LineSelect_Mode_EvenLine ((uint32_t)0x00180000)
#define IS_DCMI_LINESELECT_MODE(MODE) (((MODE) == DCMI_LineSelect_Mode_AllLine) ||\
((MODE) == DCMI_LineSelect_Mode_OddLine) ||\
((MODE) == DCMI_LineSelect_Mode_EvenLine))
/**
* @}
*/
/** @defgroup DCMI_DMA_Request_FIFO_Size
* @{
*/
#define DCMI_DMARequestFIFOSize_1Word ((uint32_t)0x20000000) /*!< DCMI FIFO DMARequest*/
#define DCMI_DMARequestFIFOSize_2Word ((uint32_t)0x40000000) /*!< DCMI FIFO DMARequest*/
#define DCMI_DMARequestFIFOSize_4Word ((uint32_t)0x80000000) /*!< DCMI FIFO DMARequest*/
#define DCMI_DMARequestFIFOSize_MSK ((uint32_t)0xE0000000)
#define IS_DCMI_DMAREQUESTFIFO_SIZE(SIZE) (((SIZE) == DCMI_DMARequestFIFOSize_1Word) ||\
((SIZE) == DCMI_DMARequestFIFOSize_2Word) ||\
((SIZE) == DCMI_DMARequestFIFOSize_4Word))
/**
* @}
*/
/** @defgroup DCMI_interrupt_sources
* @{
*/
#define DCMI_IT_FRAME ((uint16_t)0x0001)
#define DCMI_IT_OVF ((uint16_t)0x0002)
#define DCMI_IT_ERR ((uint16_t)0x0004)
#define DCMI_IT_VSYNC ((uint16_t)0x0008)
#define DCMI_IT_LINE ((uint16_t)0x0010)
#define IS_DCMI_CONFIG_IT(IT) ((((IT) & (uint16_t)0xFFE0) == 0x0000) && ((IT) != 0x0000))
#define IS_DCMI_GET_IT(IT) (((IT) == DCMI_IT_FRAME) || \
((IT) == DCMI_IT_OVF) || \
((IT) == DCMI_IT_ERR) || \
((IT) == DCMI_IT_VSYNC) || \
((IT) == DCMI_IT_LINE))
/**
* @}
*/
/** @defgroup DCMI_Flags
* @{
*/
/**
* @brief DCMI SR register
*/
#define DCMI_FLAG_HSYNC ((uint16_t)0x2001)
#define DCMI_FLAG_VSYNC ((uint16_t)0x2002)
#define DCMI_FLAG_FNE ((uint16_t)0x2004)
/**
* @brief DCMI RISR register
*/
#define DCMI_FLAG_FRAMERI ((uint16_t)0x0001)
#define DCMI_FLAG_OVFRI ((uint16_t)0x0002)
#define DCMI_FLAG_ERRRI ((uint16_t)0x0004)
#define DCMI_FLAG_VSYNCRI ((uint16_t)0x0008)
#define DCMI_FLAG_LINERI ((uint16_t)0x0010)
/**
* @brief DCMI MISR register
*/
#define DCMI_FLAG_FRAMEMI ((uint16_t)0x1001)
#define DCMI_FLAG_OVFMI ((uint16_t)0x1002)
#define DCMI_FLAG_ERRMI ((uint16_t)0x1004)
#define DCMI_FLAG_VSYNCMI ((uint16_t)0x1008)
#define DCMI_FLAG_LINEMI ((uint16_t)0x1010)
#define IS_DCMI_GET_FLAG(FLAG) (((FLAG) == DCMI_FLAG_HSYNC) || \
((FLAG) == DCMI_FLAG_VSYNC) || \
((FLAG) == DCMI_FLAG_FNE) || \
((FLAG) == DCMI_FLAG_FRAMERI) || \
((FLAG) == DCMI_FLAG_OVFRI) || \
((FLAG) == DCMI_FLAG_ERRRI) || \
((FLAG) == DCMI_FLAG_VSYNCRI) || \
((FLAG) == DCMI_FLAG_LINERI) || \
((FLAG) == DCMI_FLAG_FRAMEMI) || \
((FLAG) == DCMI_FLAG_OVFMI) || \
((FLAG) == DCMI_FLAG_ERRMI) || \
((FLAG) == DCMI_FLAG_VSYNCMI) || \
((FLAG) == DCMI_FLAG_LINEMI))
#define IS_DCMI_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFE0) == 0x0000) && ((FLAG) != 0x0000))
/**
* @brief set dcmi input from out signal
*/
#define DCMI_FROM_OUT (0x1<<13)
/* Function used to set the DCMI configuration to the default reset state ****/
void DCMI_DeInit(void);
/* Initialization and Configuration functions *********************************/
void DCMI_Init(DCMI_InitTypeDef* DCMI_InitStruct);
void DCMI_StructInit(DCMI_InitTypeDef* DCMI_InitStruct);
void DCMI_CROPConfig(DCMI_CROPInitTypeDef* DCMI_CROPInitStruct);
void DCMI_CROPCmd(FunctionalState NewState);
void DCMI_JPEGCmd(FunctionalState NewState);
void DCMI_SetDMARequsetFIFOSize(uint32_t NewFIFOSize);
void DCMI_SetExtInput(void);
/* Image capture functions ****************************************************/
void DCMI_Cmd(FunctionalState NewState);
void DCMI_CaptureCmd(FunctionalState NewState);
uint32_t DCMI_ReadData(void);
uint32_t DCMI_GetFIFODataWordNum(void);
/* Interrupts and flags management functions **********************************/
void DCMI_ITConfig(uint16_t DCMI_IT, FunctionalState NewState);
FlagStatus DCMI_GetFlagStatus(uint16_t DCMI_FLAG);
void DCMI_ClearFlag(uint16_t DCMI_FLAG);
ITStatus DCMI_GetITStatus(uint16_t DCMI_IT);
void DCMI_ClearITPendingBit(uint16_t DCMI_IT);
#ifdef __cplusplus
}
#endif
#endif /*__AIR105_DCMI_H */
bsp/airm2m/air105/libraries/HAL_Driver/Inc/air105_dma.h 0 → 100644
浏览文件 @ 0e254652
/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_DMA_H
#define __AIR105_DMA_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "air105.h"
typedef struct
{
uint32_t DMA_Peripheral;
uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */
uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */
uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination.
This parameter can be a value of @ref DMA_data_transfer_direction */
uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not.
This parameter can be a value of @ref DMA_incremented_mode */
uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not.
This parameter can be a value of @ref DMA_incremented_mode */
uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data item width.
This parameter can be a value of @ref DMA_data_size */
uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data item width.
This parameter can be a value of @ref DMA_data_size */
uint32_t DMA_PeripheralBurstSize; /*!< Specifies the Peripheral Number of data items during per burst transaction.
read or write from the Peripheral every time a burst transaction request
This parameter can be a value of @ref DMA_burst_size */
uint32_t DMA_MemoryBurstSize; /*!< Specifies the Memory Number of data items during per burst transaction.
read or write from the Memory every time a burst transaction request
This parameter can be a value of @ref DMA_burst_size */
uint32_t DMA_PeripheralHandShake; /*!< Specifies the HandShake to control the DMA transacation.
This parameter can be a value of @ref DMA_peripheral_handshake */
uint32_t DMA_BlockSize; /*!< Specifies the Total Number of data items during the transaction. */
uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx.
This parameter can be a value of @ref DMA_priority_level */
}DMA_InitTypeDef;
/**
* DMA多块传输内存表
*
*/
typedef struct _lli
{
uint32_t SAR;
uint32_t DAR;
uint32_t LLP;
uint32_t CTL_L;
uint32_t CTL_H;
uint32_t DSTAT;
}LLI;
/**多块传输模式
* @}
*/
#define Multi_Block_MODE01 (uint8_t)0x00 /*Single-block or last transfer of multi-block*/
#define Multi_Block_MODE02 (uint8_t)0x01 /*Auto-reload multi-block transfer with contiguous SAR*/
#define Multi_Block_MODE03 (uint8_t)0x02 /*Auto-reload multi-block transfer with contiguous DAR*/
#define Multi_Block_MODE04 (uint8_t)0x03 /*Auto-reload multi-block transfer*/
#define Multi_Block_MODE05 (uint8_t)0x04 /*Single-block or last transfer of multi-block*/
#define Multi_Block_MODE06 (uint8_t)0x05 /*Linked list multi-block transfer with contiguous SAR*/
#define Multi_Block_MODE07 (uint8_t)0x06 /*Linked list multi-block transfer with auto-reload SAR*/
#define Multi_Block_MODE08 (uint8_t)0x07 /*Linked list multi-block transfer with contiguous DAR*/
#define Multi_Block_MODE09 (uint8_t)0x08 /*Linked list multi-block transfer with auto-reload DAR*/
#define Multi_Block_MODE10 (uint8_t)0x09 /*Linked list multi-block transfer*/
/** @defgroup DMA_data_transfer_direction
* @{
*/
#define DMA_DIR_Memory_To_Memory ((uint32_t)0x0000)
#define DMA_DIR_Memory_To_Peripheral ((uint32_t)0x0001)
#define DMA_DIR_Peripheral_To_Memory ((uint32_t)0x0002)
/**
* @}
*/
/** @defgroup DMA_incremented_mode
* @{
*/
#define DMA_Inc_Increment ((uint32_t)0x00000000)
#define DMA_Inc_Decrement ((uint32_t)0x00000001)
#define DMA_Inc_Nochange ((uint32_t)0x00000002)
#define IS_DMA_INC_STATE(STATE) (((STATE) == DMA_Inc_Increment) || \
((STATE) == DMA_Inc_Decrement) || \
((STATE) == DMA_Inc_Nochange))
/**
* @}
*/
/** @defgroup DMA_data_size
* @{
*/
#define DMA_DataSize_Byte ((uint32_t)0x0000)
#define DMA_DataSize_HalfWord ((uint32_t)0x0001)
#define DMA_DataSize_Word ((uint32_t)0x0002)
#define IS_DMA_DATA_SIZE(SIZE) (((SIZE) == DMA_DataSize_Byte) || \
((SIZE) == DMA_DataSize_HalfWord) || \
((SIZE) == DMA_DataSize_Word))
/**
* @}
*/
/** @defgroup DMA_burst_size
* @{
*/
#define DMA_BurstSize_1 ((uint32_t)0x00)
#define DMA_BurstSize_4 ((uint32_t)0x01)
#define DMA_BurstSize_8 ((uint32_t)0x02)
#define DMA_BurstSize_16 ((uint32_t)0x03)
#define DMA_BurstSize_32 ((uint32_t)0x04)
/**
* @}
*/
/** @defgroup DMA_peripheral_handshake
* @{
*/
#define DMA_PeripheralHandShake_Hardware ((uint32_t)0x0000)
#define DMA_PeripheralHandShake_Software ((uint32_t)0x0001)
/**
* @}
*/
/** @defgroup DMA_Priority
* @{
*/
#define DMA_Priority_0 ((uint32_t)0x00000000)
#define DMA_Priority_1 ((uint32_t)0x00000020)
#define DMA_Priority_2 ((uint32_t)0x00000040)
#define DMA_Priority_3 ((uint32_t)0x00000060)
#define DMA_Priority_4 ((uint32_t)0x00000080)
#define DMA_Priority_5 ((uint32_t)0x000000A0)
#define DMA_Priority_6 ((uint32_t)0x000000C0)
/**
* @}
*/
/** @defgroup DMA_IT
* @{
*/
#define DMA_IT_BlockTransferComplete ((uint32_t)0x01)
#define DMA_IT_DestinationTransactionComplete ((uint32_t)0x02)
#define DMA_IT_Error ((uint32_t)0x04)
#define DMA_IT_SourceTransactionComplete ((uint32_t)0x08)
#define DMA_IT_DMATransferComplete ((uint32_t)0x10)
/**
* @}
*/
void DMA_Init(DMA_TypeDef* DMA_Channelx, DMA_InitTypeDef* DMA_InitStruct);
void DMA_ChannelCmd(DMA_TypeDef* DMA_Channelx, FunctionalState NewState);
void DMA_Cmd(FunctionalState NewState);
void DMA_ChannelConfig(DMA_TypeDef* DMA_Channelx, uint32_t DMA_Peripheral, uint32_t DMA_DIR);
void DMA_SetSRCAddress(DMA_TypeDef* DMA_Channelx, uint32_t Address);
void DMA_SetDSRAddress(DMA_TypeDef* DMA_Channelx, uint32_t Address);
void DMA_ITConfig(DMA_TypeDef* DMA_Channelx, uint32_t DMA_IT, FunctionalState NewState);
FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG);
void DMA_ClearFlag(uint32_t DMA_FLAG);
FunctionalState DMA_IsChannelEnabled(DMA_TypeDef* DMA_Channelx);
ITStatus DMA_GetITStatus(DMA_TypeDef* DMA_Channelx,uint32_t DMA_IT);
FlagStatus DMA_GetRawStatus(DMA_TypeDef* DMA_Channelx,uint32_t DMA_IT);
void DMA_ClearITPendingBit(DMA_TypeDef* DMA_Channelx,uint32_t DMA_IT);
void DMA_MultiBlockInit(DMA_TypeDef* DMA_Channelx, DMA_InitTypeDef* DMA_InitStruct ,\
LLI *first_lli,uint8_t Multi_Block_Mode);
void DMA_InitLLI(DMA_TypeDef* DMA_Channelx,LLI *lli,LLI *next_lli,
void *src_addr,void *dest_addr,uint16_t btsize);
uint32_t DMA_GetTransferNum(DMA_TypeDef* DMA_Channelx, uint32_t first_adr);
#ifdef __cplusplus
}
#endif
#endif
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
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/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_EXTI_H
#define __AIR105_EXTI_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes -----------------------------------------------------------------*/
#include "air105.h"
/**
* @brief EXTI Trigger enumeration
*/
typedef enum
{
EXTI_Trigger_Off = (uint32_t)0x00,
EXTI_Trigger_Rising = (uint32_t)0x01,
EXTI_Trigger_Falling = (uint32_t)0x02,
EXTI_Trigger_Rising_Falling = (uint32_t)0x03
}EXTI_TriggerTypeDef;
#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Off) || \
((TRIGGER) == EXTI_Trigger_Rising) || \
((TRIGGER) == EXTI_Trigger_Falling) || \
((TRIGGER) == EXTI_Trigger_Rising_Falling))
/**
* @}
*/
/** @defgroup EXTI_Lines
* @{
*/
#define EXTI_Line0 ((uint32_t)0x0000) /*!< External interrupt line 0 */
#define EXTI_Line1 ((uint32_t)0x0001) /*!< External interrupt line 1 */
#define EXTI_Line2 ((uint32_t)0x0002) /*!< External interrupt line 2 */
#define EXTI_Line3 ((uint32_t)0x0003) /*!< External interrupt line 3 */
#define EXTI_Line4 ((uint32_t)0x0004) /*!< External interrupt line 4 */
#define EXTI_Line5 ((uint32_t)0x0005) /*!< External interrupt line 5 */
#define IS_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5))
/**
* @}
*/
/** @defgroup EXTI_PinSource
* @{
*/
#define EXTI_PinSource0 ((uint32_t)0x0001) /*!< Pin 0 selected */
#define EXTI_PinSource1 ((uint32_t)0x0002) /*!< Pin 1 selected */
#define EXTI_PinSource2 ((uint32_t)0x0004) /*!< Pin 2 selected */
#define EXTI_PinSource3 ((uint32_t)0x0008) /*!< Pin 3 selected */
#define EXTI_PinSource4 ((uint32_t)0x0010) /*!< Pin 4 selected */
#define EXTI_PinSource5 ((uint32_t)0x0020) /*!< Pin 5 selected */
#define EXTI_PinSource6 ((uint32_t)0x0040) /*!< Pin 6 selected */
#define EXTI_PinSource7 ((uint32_t)0x0080) /*!< Pin 7 selected */
#define EXTI_PinSource8 ((uint32_t)0x0100) /*!< Pin 8 selected */
#define EXTI_PinSource9 ((uint32_t)0x0200) /*!< Pin 9 selected */
#define EXTI_PinSource10 ((uint32_t)0x0400) /*!< Pin 10 selected */
#define EXTI_PinSource11 ((uint32_t)0x0800) /*!< Pin 11 selected */
#define EXTI_PinSource12 ((uint32_t)0x1000) /*!< Pin 12 selected */
#define EXTI_PinSource13 ((uint32_t)0x2000) /*!< Pin 13 selected */
#define EXTI_PinSource14 ((uint32_t)0x4000) /*!< Pin 14 selected */
#define EXTI_PinSource15 ((uint32_t)0x8000) /*!< Pin 15 selected */
#define EXTI_PinSourceAll ((uint32_t)0xffff) /*!< Pin All selected */
#define IS_EXTI_PIN_SOURCE(PIN) (((((PIN) & ~(uint32_t)0xFFFF)) == 0x00) && ((PIN) != (uint32_t)0x00))
/**
* @}
*/
/** @defgroup EXTI_Exported_Functions
* @{
*/
void EXTI_DeInit(void);
void EXTI_LineConfig(uint32_t EXTI_Line, uint32_t EXTI_PinSource, EXTI_TriggerTypeDef EXTI_Trigger);
uint32_t EXTI_GetITStatus(void);
uint32_t EXTI_GetITLineStatus(uint32_t EXTI_Line);
void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif // __AIR105_EXTI_H
/************************** (C) COPYRIGHT Megahunt *****END OF FILE****/
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/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __AIR105_IT_H
#define __AIR105_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "air105.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif
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/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __APP_INC_H__
#define __APP_INC_H__
#include "bl_inc.h"
#include "core_hwtimer.h"
#include "core_spi.h"
#include "core_adc.h"
#include "core_dac.h"
#include "core_wdt.h"
#include "core_usb_ll_driver.h"
#include "core_keyboard.h"
#include "core_dcmi.h"
#include "core_rng.h"
#endif
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