1. 10 6月, 2016 2 次提交
    • D
      Merge branch 'drm-fixes-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-fixes · fa6bcad7
      Dave Airlie 提交于
      Mostly memory leak and firmware leak fixes for amdgpu.  A bit bigger than
      usual since this is several weeks worth of fixes.
      
      * 'drm-fixes-4.7' of git://people.freedesktop.org/~agd5f/linux: (28 commits)
        drm/amd/powerplay: delete useless code as pptable changed in vbios.
        drm/amd/powerplay: fix bug visit array out of bounds
        drm/amdgpu: fix smu ucode memleak (v2)
        drm/amdgpu: add release firmware for cgs
        drm/amdgpu: fix tonga smu_fini mem leak
        drm/amdgpu: fix fiji smu fini mem leak
        drm/amdgpu: fix cik sdma ucode memleak
        drm/amdgpu: fix sdma24 ucode mem leak
        drm/amdgpu: fix sdma3 ucode mem leak
        drm/amdgpu: fix uvd fini mem leak
        drm/amdgpu: fix gfx 7 ucode mem leak
        drm/amdgpu: fix gfx8 ucode mem leak
        drm/amdgpu: fix missing free wb for cond_exec
        drm/amdgpu: fix memleak in pptable_init
        drm/amdgpu: fix mem leak in atombios
        drm/amdgpu: fix mem leak in pplib/hwmgr
        drm/amdgpu: fix mem leak in smumgr
        drm/amdgpu: add pipeline sync while vmid switch in same ctx
        drm/amdgpu: vBIOS post only call when mem_size zero
        drm/amdgpu: modify sdma start sequence
        ...
      fa6bcad7
    • D
      Merge branch 'msm-fixes-4.7-rc3' of git://people.freedesktop.org/~robclark/linux into drm-fixes · 166108aa
      Dave Airlie 提交于
      * 'msm-fixes-4.7-rc3' of git://people.freedesktop.org/~robclark/linux:
        drm/msm: fix potential submit error path issue
        drm/msm: fix some crashes in submit fail path
        drm/msm: deal with exhausted vmap space better
      166108aa
  2. 09 6月, 2016 31 次提交
  3. 07 6月, 2016 4 次提交
    • B
      drm/nouveau/disp/sor/gm107: training pattern registers are like gm200 · 4691409b
      Ben Skeggs 提交于
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      Cc: stable@vger.kernel.org
      4691409b
    • B
      drm/nouveau/disp/sor/gf119: both links use the same training register · a8953c52
      Ben Skeggs 提交于
      It appears that, for whatever reason, both link A and B use the same
      register to control the training pattern.  It's a little odd, as the
      GPUs before this (Tesla/Fermi1) have per-link registers, as do newer
      GPUs (Maxwell).
      
      Fixes the third DP output on NVS 510 (GK107).
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      Cc: stable@vger.kernel.org
      a8953c52
    • M
      drm/vc4: Make pageflip completion handling more robust. · 56d1fe09
      Mario Kleiner 提交于
      Protect both the setup of the pageflip event and the
      latching of the new requested displaylist head pointer
      by the event lock, so we can't get into a situation
      where vc4_atomic_flush latches the new display list via
      HVS_WRITE, then immediately gets preempted before queueing
      the pageflip event, then the page-flip completes in hw and
      the vc4_crtc_handle_page_flip() runs and no-ops due to
      lack of a pending pageflip event, then vc4_atomic_flush
      continues and only then queues the pageflip event - after
      the page flip handling already no-oped. This would cause
      flip completion handling only at the next vblank - one
      frame too late.
      
      In vc4_crtc_handle_page_flip() check the actual DL head
      pointer in SCALER_DISPLACTX against the requested pointer
      for page flip to make sure that the flip actually really
      completed in the current vblank and doesn't get deferred
      to the next one because the DL head pointer was written
      a bit too late into SCALER_DISPLISTX, after start of
      vblank, and missed the boat. This avoids handling a
      pageflip completion too early - one frame too early.
      
      According to Eric, DL head pointer updates which were
      written into the HVS DISPLISTX reg get committed to hardware
      at the last pixel of active scanout. Our vblank interrupt
      handler, as triggered by PV_INT_VFP_START irq, gets to run
      earliest at the first pixel of HBLANK at the end of the
      last scanline of active scanout, ie. vblank irq handling
      runs at least 1 pixel duration after a potential pageflip
      completion happened in hardware.
      
      This ordering of events in the hardware, together with the
      lock protection and SCALER_DISPLACTX sampling of this patch,
      guarantees that pageflip completion handling only runs at
      exactly the vblank irq of actual pageflip completion in all
      cases.
      
      Background info from Eric about the relative timing of
      HVS, PV's and trigger points for interrupts, DL updates:
      
      https://lists.freedesktop.org/archives/dri-devel/2016-May/107510.html
      
      Tested on RPi 2B with hardware timing measurement equipment
      and shown to no longer complete flips too early or too late.
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Reviewed-by: NEric Anholt <eric@anholt.net>
      56d1fe09
    • H
      drm/vc4: Fix ioctl permissions for render nodes. · b10c22e5
      Herve Jourdain 提交于
      Contrary to other flags to DRM_IOCTL_DEF_DRV(), which restrict usage,
      the flag for render node is an enabler (the IOCTL can't be used from
      render node if it's not present).  So DRM_RENDER_ALLOW needs to be
      added to all the flags that were previously 0.
      Signed-off-by: NHerve Jourdain <herve.jourdain@neuf.fr>
      Reviewed-by: NEric Anholt <eric@anholt.net>
      Fixes: 0cd3e274 ("drm/vc4: Add missing render node support")
      b10c22e5
  4. 06 6月, 2016 3 次提交