- 29 6月, 2017 3 次提交
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由 Dong Aisheng 提交于
Use standard port->iotype to distinguish endian difference. Note as we read/write register by checking iotype dynamically, we need to initialize the iotype correctly for earlycon as well to avoid a break. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> (supporter:TTY LAYER) Cc: Stefan Agner <stefan@agner.ch> Cc: Mingkai Hu <Mingkai.Hu@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> ChangeLog: v3->v4: * Removed unneeded semicolon catched by 0day Robot. v2->v3: * Instead of using global var, use standard port->iotype to distinguish endian difference. v1->v2: * No changes Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Dong Aisheng 提交于
Due to the original lpuart32_read/write takes no port specific information arguments, it's hard to distinguish port difference within the API. Although it works before, but not suitable anymore when adding more new chips support. So let's convert it to accept a new struct uart_port argument to make it be able to retrieve more port specific information. This is a preparation for the later adding new chips support more easily. No functions changes. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Mingkai Hu <Mingkai.Hu@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Dong Aisheng 提交于
This is used to dynamically check the SoC specific lpuart properies. Currently only the iotype is added, it functions the same as before. With this, new chips with different iotype will be more easily added. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Mingkai Hu <Mingkai.Hu@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 31 3月, 2017 1 次提交
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由 Stefan Agner 提交于
The console write code is not entirely race free (e.g. the operations to disabling the UART interrupts are not atomic) hence locking is required. This has been become apparent with the PREEMPT RT patchset applied: With the fully preemptible kernel configuration the system often ended up in a freeze already at startup. Disable interrupts and lock using read_lock_irqsave. Try to lock in the sysrq/oops case, but don't bother if locking fails. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 12 1月, 2017 1 次提交
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由 Nikita Yushchenko 提交于
Problem found via lockdep: - lpuart_set_termios() calls del_timer_sync(&sport->lpuart_timer) while holding sport->port.lock - sport->lpuart_timer routine is lpuart_timer_func() that calls lpuart_copy_rx_to_tty() that acquires same lock. To fix, move Rx DMA stopping out of lock, as it already is in other places in the same file. While at it, also make Rx DMA start/stop code to look the same is in other places in the same file. Signed-off-by: NNikita Yushchenko <nikita.yoush@cogentembedded.com> Tested-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 28 10月, 2016 1 次提交
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由 Greg Kroah-Hartman 提交于
commit 2a41bc2a ("tty: serial: fsl_lpuart: add polled console functions") caused a build warning about an unused variable, so fix it. Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Cc: Nicolae Rosia <nicolae_rosia@mentor.com> Cc: Stefan Golinschi <stefan.golinschi@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 27 10月, 2016 2 次提交
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由 Aaron Brice 提交于
In the case where head == 0 on the circular buffer, there should be one DMA buffer, not two. The second zero-length buffer would break the lpuart driver, transfer would never complete. Signed-off-by: NAaron Brice <aaron.brice@datasoft.com> Acked-by: NStefan Agner <stefan@agner.ch> Tested-by: NStefan Agner <stefan@agner.ch> Tested-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Nicolae Rosia 提交于
This adds polling functions as used by kgdb. Signed-off-by: NNicolae Rosia <nicolae_rosia@mentor.com> Signed-off-by: NStefan Golinschi <stefan.golinschi@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 15 9月, 2016 1 次提交
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由 Wei Yongjun 提交于
The function lpuart_start_rx_dma() is called from several places, in some of which, such as lpuart_startup(), a lock be held here, so we should use GFP_ATOMIC when a lock is held. Fixes: 5887ad43 ("tty: serial: fsl_lpuart: Use cyclic DMA for Rx") Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 02 9月, 2016 1 次提交
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由 Julia Lawall 提交于
Check for uart_ops structures that are only stored in the ops field of a uart_port structure. This field is declared const, so uart_ops structures that have this property can be declared as const also. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct uart_ops i@p = { ... }; @ok@ identifier r.i; struct uart_port e; position p; @@ e.ops = &i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct uart_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct uart_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 31 8月, 2016 8 次提交
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由 Bhuvanchandra DV 提交于
Enable Vybrid's build-in support for RS-485 auto RTS for controlling line direction of RS-485 transceiver driver. Enable RS485 feature by either using ioctrl 'TIOCSRS485' or enable it in the device tree by setting 'linux,rs485-enabled-at-boot-time' property. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Bhuvanchandra DV 提交于
When DMA mode is enabled one need to make sure the DMA channels are idle before entering suspend mode especially when UART ports which are set as wakeup source and console port with no_console_suspend is set. This patch takes care of gracefully releasing DMA channels for the above two cases and start the DMA at resume. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Bhuvanchandra DV 提交于
Drop PIO to DMA switching and use scatter/gather DMA for Tx path to improve performance. Some part of the code is borrowed from imx serial driver. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Bhuvanchandra DV 提交于
The initial approach of DMA implementatin for RX is inefficient due to switching from PIO to DMA, this leads to overruns especially on instances with the smaller FIFO. To address these issues this patch uses a cyclic DMA for receiver path. Some part of the code is borrowed from atmel serial driver. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Bhuvanchandra DV 提交于
By default the driver always configure the mode as 8s1 even when 8m1 mode is selected. Fix this by adding support to control the space/mark bit. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
Commit 8e4934c6 ("tty: serial: fsl_lpuart: clear receive flag on FIFO flush") implemented clearing of the receive flag by reading the status register only. It turned out that even though we flush the FIFO afterwards, a explicit read of the data register is still required. This leads to a FIFO underrun. To avoid this, follow the advice in the overrun "Operation section": Unconditionally clear RXUF after using RXFLUSH. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
Add suspend/resume support. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
Currently the tx_empty callback only considers the Transmit Complete Flag (TC). The reference manual is not quite clear if the TC flag covers the TX FIFO too. Debug prints on real hardware have shown that from time to time the TC flag is asserted (indicating Transmitter idle) while there are still data in the TX FIFO. Hence, in this case the serial core will call the shutdown callback even though there are data remaining in the TX FIFO buffers. Avoid early shutdowns by considering the TX FIFO empty flag too. Also avoid theoretical race conditions between DMA and the driver by checking whether the TX DMA is in progress too. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 26 6月, 2016 1 次提交
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由 Jiri Slaby 提交于
platform_get_irq can fail, so we should handle negative value when returned. [v2] platform_get_irq can actually return zero on some platforms. So do not remove checks for irq == 0 there. Signed-off-by: NJiri Slaby <jslaby@suse.cz> Cc: Russell King <linux@arm.linux.org.uk> Cc: "Uwe Kleine-König" <kernel@pengutronix.de> Cc: Russell King <linux@armlinux.org.uk> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-tegra@vger.kernel.org Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 18 10月, 2015 1 次提交
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由 Stefan Agner 提交于
Add support for DT and command line based earlycon support for lpuart and lpuart32 used on Freescale Vybrid and and QorIQ LS1021A processors. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 27 3月, 2015 3 次提交
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由 Stefan Agner 提交于
When the receiver was enabled during startup, a character could have been in the FIFO when the UART get initially used. The driver configures the (receive) watermark level, and flushes the FIFO. However, the receive flag (RDRF) could still be set at that stage (as mentioned in the register description of UARTx_RWFIFO). This leads to an interrupt which won't be handled properly in interrupt mode: The receive interrupt function lpuart_rxint checks the FIFO count, which is 0 at that point (due to the flush during initialization). The problem does not manifest when using DMA to receive characters. Fix this situation by explicitly read the status register, which leads to clearing of the RDRF flag. Due to the flush just after the status flag read, a explicit data read is not to required. Signed-off-by: NStefan Agner <stefan@agner.ch> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
Specify transmit FIFO size which might be different depending on LPUART instance. This makes sure uart_wait_until_sent in serial core getting called, which in turn waits and checks if the FIFO is really empty on shutdown by using the tx_empty callback. Without the call of this callback, the last several characters might not yet be transmitted when closing the serial port. This can be reproduced by simply using echo and redirect the output to a ttyLP device. Signed-off-by: NStefan Agner <stefan@agner.ch> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Fabian Frederick 提交于
of_device_id is always used as const. (See driver.of_match_table and open firmware functions) Signed-off-by: NFabian Frederick <fabf@skynet.be> Acked-by: NPeter Korsgaard <peter@korsgaard.com> Acked-by: NTimur Tabi <timur@tabi.org> Acked-by: NPatrice Chotard <patrice.chotard@st.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 03 2月, 2015 6 次提交
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由 Stefan Agner 提交于
On uart buffer flush, serial core resets the circular buffer. If a DMA transfer is in progress at that time, the callback lpuart_dma_tx_complete will move buffer's tail unconditionally, hence tail moves beyond head. Use the flush_buffer hook to terminate the DMA imeaditely and avoid lpuart_dma_tx_complete being called in this situation. This bug often showed up while shutdown and lead to duplicate serial console output. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Yuan Yao 提交于
For power management support, we should disable TX and TX interrupt so that kernel can prepare for deep sleep. Retain RX and RX interrupt for wakeup the kernel when receive the input character. Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
To end a DMA transfer which did not consume a whole buffer (e.g. one character only), a RX timer is used. When lots of data are received the DMA transfer will complete and setup another DMA transfer, which in turn might complete again. In this cases, it is not necessary to abort the DMA transfers using the RX timer. This change pushes the RX timer timeout into the future each time a DMA transfer completed. Aborting the DMA was not very harmful, since the next received character lead to setup of another RX DMA. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
Move the DMA channel request to probe to avoid requesting the DMA channel on each opening of the ttyLPx device. This also fixes a potential issue that TX channel is not freed when only RX channel allocation fails. The DMA channels are now handled independently, so one could use UART with DMA only in TX direction for instance. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
When the UART is in DMA receive mode (RDMAS set) and one character just arrived while another interrupt is handled (e.g. TX), the RDRF (receiver data register full flag) is set due to the water level of 1. But since the DMA will take care of this character, there is no need to handle it by calling lpuart_prepare_rx. Handling it leads to adding the RX timeout timer twice: [ 74.336698] Kernel BUG at 80053070 [verbose debug info unavailable] [ 74.342999] Internal error: Oops - BUG: 0 [#1] ARM0:00.00 khungtaskd [ 74.347817] Modules linked in: 0 S 0.0 0.0 0:00.00 writeback [ 74.350926] CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00001-g39d78e2 #1788 [ 74.358617] Hardware name: Freescale Vybrid VF610 (Device Tree)t [ 74.364563] task: 807a7678 ti: 8079c000 task.ti: 8079c000 kblockd [ 74.370002] PC is at add_timer+0x24/0x28.0 0.0 0:00.09 kworker/u2:1 [ 74.373960] LR is at lpuart_int+0x15c/0x3d8 [ 74.378171] pc : [<80053070>] lr : [<802e0d88>] psr: a0010193 [ 74.378171] sp : 8079de10 ip : 8079de20 fp : 8079de1c [ 74.389694] r10: 807d44c0 r9 : 8688c300 r8 : 00000013 [ 74.394943] r7 : 20010193 r6 : 00000000 r5 : 000000a0 r4 : 86997210 [ 74.401498] r3 : ffffa7da r2 : 80817868 r1 : 86997210 r0 : 86997344 [ 74.408052] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 74.415489] Control: 10c5387d Table: 8611c059 DAC: 00000015 [ 74.421265] Process swapper (pid: 0, stack limit = 0x8079c230) ... Solve this by only execute the receiver path (lpuart_prepare_rx) if the DMA receive mode (RDMAS) is not set. Also, make sure the flag is cleared on initialization, in case it has been left set. This can be best reproduced using UART as a serial console, then running top while dd'ing data into the terminal. Signed-off-by: NStefan Agner <stefan@agner.ch> Cc: stable <stable@vger.kernel.org> # 3.14 Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
If the serial port gets closed while a RX transfer is in progress, the timer might fire after the serial port shutdown finished. This leads in a NULL pointer dereference: [ 7.508324] Unable to handle kernel NULL pointer dereference at virtual address 00000000 [ 7.516590] pgd = 86348000 [ 7.519445] [00000000] *pgd=86179831, *pte=00000000, *ppte=00000000 [ 7.526145] Internal error: Oops: 17 [#1] ARM [ 7.530611] Modules linked in: [ 7.533876] CPU: 0 PID: 123 Comm: systemd Not tainted 3.19.0-rc3-00004-g5b11ea7 #1778 [ 7.541827] Hardware name: Freescale Vybrid VF610 (Device Tree) [ 7.547862] task: 861c3400 ti: 86ac8000 task.ti: 86ac8000 [ 7.553392] PC is at lpuart_timer_func+0x24/0xf8 [ 7.558127] LR is at lpuart_timer_func+0x20/0xf8 [ 7.562857] pc : [<802df99c>] lr : [<802df998>] psr: 600b0113 [ 7.562857] sp : 86ac9b90 ip : 86ac9b90 fp : 86ac9bbc [ 7.574467] r10: 80817180 r9 : 80817b98 r8 : 80817998 [ 7.579803] r7 : 807acee0 r6 : 86989000 r5 : 00000100 r4 : 86997210 [ 7.586444] r3 : 86ac8000 r2 : 86ac9bc0 r1 : 86997210 r0 : 00000000 [ 7.593085] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 7.600341] Control: 10c5387d Table: 86348059 DAC: 00000015 [ 7.606203] Process systemd (pid: 123, stack limit = 0x86ac8230) Setup the timer on UART startup which allows to delete the timer unconditionally on shutdown. This also saves the initialization on each transfer. Signed-off-by: NStefan Agner <stefan@agner.ch> Cc: stable <stable@vger.kernel.org> # 3.14 Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 08 11月, 2014 2 次提交
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由 Fabio Estevam 提交于
There is no real value in displaying "serial: Freescale lpuart driver" in every boot. The uart_register_driver() can fail and even so the "serial: Freescale lpuart driver" will be displayed, which is not really helpful. This is particularly annoying when booting multi_v7_defconfig kernel on a SoC that is not a Vybrid/Layerscape and even though this message gets displayed. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NJingchang Lu <jingchang.lu@freescale.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Fabio Estevam 提交于
'res' will be automatically checked inside devm_ioremap_resource(), so there is no need to explicitly perform a NULL check. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NJingchang Lu <jingchang.lu@freescale.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 07 11月, 2014 1 次提交
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由 Jingchang Lu 提交于
This adds 32-bit register lpuart32 power management support, this also updates the 8-bit register lpuart resume function. Signed-off-by: NJingchang Lu <jingchang.lu@freescale.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 20 10月, 2014 1 次提交
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由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 18 7月, 2014 1 次提交
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由 Jingchang Lu 提交于
This add the 32-bit register version LPUART support with big-endian byte order. Signed-off-by: NJingchang Lu <jingchang.lu@freescale.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 11 7月, 2014 2 次提交
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由 Stefan Agner 提交于
The DMA burst size must match the transmit FIFO depth in order to make sure all character are transmitted. This patch calculates DMA burst size by using FIFO depth rather than use the hardcoded 16 bytes. This is required since some UARTs (e.g. UART2 on Vybrid) have a FIFO depth of 8 bytes. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stefan Agner 提交于
The DMA RX timeout calculation is done based on FIFO buffer size and port timeout when setting up DMA. However, both variables are not necessarily initialized at DMA initialization time, which can lead to a division by zero. Move the timeout calculation to set_termios where both variables are initialized. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 7月, 2014 1 次提交
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由 Alexander Shiyan 提交于
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 20 6月, 2014 1 次提交
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由 Peter Hurley 提交于
If IGNBRK is set without either BRKINT or PARMRK set, some uart drivers send a 0x00 byte for BREAK without the TTYBREAK flag to the line discipline, when it should send either nothing or the TTYBREAK flag set. This happens because the read_status_mask masks out the BI condition, which uart_insert_char() then interprets as a normal 0x00 byte. SUS v3 is clear regarding the meaning of IGNBRK; Section 11.2.2, General Terminal Interface - Input Modes, states: "If IGNBRK is set, a break condition detected on input shall be ignored; that is, not put on the input queue and therefore not read by any process." Fix read_status_mask to include the BI bit if IGNBRK is set; the lsr status retains the BI bit if a BREAK is recv'd, which is subsequently ignored in uart_insert_char() when masked with the ignore_status_mask. Affected drivers: 8250 - all serial_txx9 mfd amba-pl010 amba-pl011 atmel_serial bfin_uart dz ip22zilog max310x mxs-auart netx-serial pnx8xxx_uart pxa sb1250-duart sccnxp serial_ks8695 sirfsoc_uart st-asc vr41xx_siu zs sunzilog fsl_lpuart sunsab ucc_uart bcm63xx_uart sunsu efm32-uart pmac_zilog mpsc msm_serial m32r_sio Unaffected drivers: omap-serial rp2 sa1100 imx icom Annotated for fixes: altera_uart mcf Drivers without break detection: 21285 xilinx-uartps altera_jtaguart apbuart arc-uart clps711x max3100 uartlite msm_serial_hs nwpserial lantiq vt8500_serial Unknown: samsung mpc52xx_uart bfin_sport_uart cpm_uart/core Fixes: Bugzilla #71651, '8250_core.c incorrectly handles IGNBRK flag' Reported-by: NIvan <athlon_@mail.ru> Signed-off-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 19 2月, 2014 1 次提交
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由 Yuan Yao 提交于
Add dma support for lpuart. This function depend on DMA driver. You can turn on it by write both the dmas and dma-name properties in dts node. Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 27 7月, 2013 1 次提交
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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