1. 23 9月, 2009 3 次提交
  2. 20 6月, 2009 2 次提交
  3. 11 6月, 2009 1 次提交
  4. 21 5月, 2009 1 次提交
  5. 07 5月, 2009 1 次提交
  6. 27 1月, 2009 1 次提交
  7. 07 1月, 2009 1 次提交
    • D
      spi_gpio driver · d29389de
      David Brownell 提交于
      Generalize the old at91rm9200 "bootstrap" bitbanging SPI master driver as
      "spi_gpio", so it works with arbitrary GPIOs and can be configured through
      platform_data.  Such SPI masters support:
      
       - any number of bus instances (bus_num is the platform_device.id)
       - any number of chipselects (one GPIO per spi_device)
       - all four SPI_MODE values, and SPI_CS_HIGH
       - i/o word sizes from 1 to 32 bits;
       - devices configured as with any other spi_master controller
      
      When configured using platform_data, this provides relatively low clock
      rates.  On platforms that support inlined GPIO calls, significantly
      improved transfer speeds are also possible with a semi-custom driver.
      (It's still painful when accessing flash memory, but less so.)
      
      Sanity checked by using this version to replace both native controllers on
      a board with six different SPI slaves, relying on three different
      SPI_MODE_* values and both SPI_CS_HIGH settings for correct operation.
      
      [akpm@linux-foundation.org: cleanups]
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Acked-by: NMagnus Damm <damm@igel.co.jp>
      Tested-by: NMagnus Damm <damm@igel.co.jp>
      Cc: Torgil Svensson <torgil.svensson@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      d29389de
  8. 06 8月, 2008 1 次提交
  9. 25 7月, 2008 1 次提交
  10. 13 5月, 2008 1 次提交
  11. 28 4月, 2008 1 次提交
  12. 07 2月, 2008 2 次提交
  13. 26 1月, 2008 1 次提交
    • E
      [ARM] pxa: make pxa2xx_spi driver use ssp_request()/ssp_free() · 2f1a74e5
      eric miao 提交于
      1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common
         information of the designated SSP port.
      
      2. remove those IRQ/memory request code, ssp_request() has done that for
         the driver
      
      3. the SPI platform device is thus made psuedo, no resource (memory/IRQ)
         has to be defined, all will be retreived by ssp_request()
      
      4. introduce ssp_get_clk_div() to handle controller difference in clock
         divisor setting
      
      5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to
         handle the different SSP clock frequency between different processors
      Signed-off-by: Neric miao <eric.miao@marvell.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      2f1a74e5
  14. 23 11月, 2007 1 次提交
  15. 17 10月, 2007 1 次提交
  16. 18 7月, 2007 6 次提交
  17. 11 5月, 2007 1 次提交
  18. 10 5月, 2007 1 次提交
  19. 09 5月, 2007 2 次提交
    • J
      au1550 SPI controller driver · 63bd2359
      Jan Nikitenko 提交于
      Here is a driver for the Alchemy au1550 PSC (Programmable Serial
      Controller) in SPI master mode.
      
      It supports dma transfers using the Alchemy descriptor based dma controller
      for 4-8 bits per word SPI transfers.  For 9-24 bits per word transfers, pio
      irq based mode is used to avoid setup of dma channels from scratch on each
      number of bits per word change.
      
      Tested with au1550; this may also work on other MIPS Alchemy cpus, like
      au1200/au1210/au1250.  Used extensively with SD card connected via SPI;
      this handles 8.1MHz SPI clock transfers using dma without any problem (the
      highest SPI clock freq possible with au1550 running on 324MHz).
      
      The driver supports sharing of SPI bus by multiple devices.  All features
      of Alchemy SPI mode are supported (all SPI modes, msb/lsb first, bits per
      word in 4-24 range).
      
      As the SPI clock of the controller depends on main input clock that shall
      be configured externally, platform data structure for au1550 SPI controller
      driver contains mainclk_hz attribute to define the input clock rate.  From
      this value, dividers of the controller for SPI clock are set up for
      required frequency.
      Signed-off-by: NJan Nikitenko <jan.nikitenko@gmail.com>
      
      Whitespace and section fixups.  Remove partial workaround for platform
      setup bug in dma_mask setup; it couldn't work with multiple controllers.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      63bd2359
    • A
      /dev/spidevB.C interface · 814a8d50
      Andrea Paterniani 提交于
      Add a filesystem API for <linux/spi/spi.h> stack.  The initial version of
      this interface is purely synchronous.
      
      dbrownell@users.sourceforge.net:
      
       Cleaned up, bugfixed; much simplified; added preliminary documentation.
      
       Works with mdev given CONFIG_SYSFS_DEPRECATED; and presumably udev.
      
       Updated SPI_IOC_MESSAGE ioctl to full spi_message semantics, supporting
       groups of one or more transfers (each of which may be full duplex if
       desired).
      
       This is marked as EXPERIMENTAL with an explicit disclaimer that the API
       (notably the ioctls) is subject to change.
      Signed-off-by: NAndrea Paterniani <a.paterniani@swapp-eng.it>
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      814a8d50
  20. 08 5月, 2007 1 次提交
  21. 15 2月, 2007 1 次提交
  22. 13 2月, 2007 4 次提交
  23. 30 11月, 2006 1 次提交
  24. 22 5月, 2006 3 次提交
  25. 17 5月, 2006 1 次提交