- 15 10月, 2012 2 次提交
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由 Shawn Guo 提交于
It moves platform device code from plat-mxc into mach-imx. Along with that, header devices-common.h gets moved from plat-mxc/include/mach/ into mach-imx/devices/. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Shawn Guo 提交于
The board files in mach-imx are the only users of iomux drivers and headers. Move them into mach-imx from plat-mxc. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 14 10月, 2012 1 次提交
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由 Russell King 提交于
As suggested by Andrew Morton: This is a pet peeve of mine. Any time there's a long list of items (header file inclusions, kconfig entries, array initalisers, etc) and someone wants to add a new item, they *always* go and stick it at the end of the list. Guys, don't do this. Either put the new item into a randomly-chosen position or, probably better, alphanumerically sort the list. lets sort all our select statements alphanumerically. This commit was created by the following perl: while (<>) { while (/\\\s*$/) { $_ .= <>; } undef %selects if /^\s*config\s+/; if (/^\s+select\s+(\w+).*/) { if (defined($selects{$1})) { if ($selects{$1} eq $_) { print STDERR "Warning: removing duplicated $1 entry\n"; } else { print STDERR "Error: $1 differently selected\n". "\tOld: $selects{$1}\n". "\tNew: $_\n"; exit 1; } } $selects{$1} = $_; next; } if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or /^endif/ or /^endchoice/)) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } undef %selects; } print; } if (%selects) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } } It found two duplicates: Warning: removing duplicated S5P_SETUP_MIPIPHY entry Warning: removing duplicated HARDIRQS_SW_RESEND entry and they are identical duplicates, hence the shrinkage in the diffstat of two lines. We have four testers reporting success of this change (Tony, Stephen, Linus and Sekhar.) Acked-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 7月, 2012 1 次提交
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由 Sascha Hauer 提交于
Move the driver to drivers/pwm/ and convert it to use the framework. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> [eric@eukrea.com: set chip.dev to prevent probe failure] [eric@eukrea.com: fix pwmchip_add return code test] Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 06 3月, 2012 2 次提交
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由 Shawn Guo 提交于
As audmux becomes a platform driver and its callers are all ASoC machine drivers, there is no reason to keep it in arch folder, so move it to sound/soc/imx. One bonus point would be those ASoC machine drivers stop including mach/audmux.h, since it's been moved to sound/soc/imx/imx-audmux.h. This should be a move to the right direction in terms of single kernel image goal. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Shawn Guo 提交于
It merges audmux-v1 and audmux-v2 under arch/arm/plat-mxc into one. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 19 12月, 2011 1 次提交
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由 Dave Martin 提交于
Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms have a L2x0 or PL310 cache controller to the individual machines. To enable this, a new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow machines to indicate that they may have such a cache controller independently of each other. Boards/SoCs which cannot reliably operate without the L2 cache controller support will need to select CACHE_L2X0 directly from their own Kconfigs instead. This applies to some TrustZone-enabled boards where Linux runs in the Normal World, for example. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com> (for cns3xxx) Acked-by: NTony Lindgren <tony@atomide.com> (for omap) Acked-by: NShawn Guo <shawn.guo@linaro.org> (for imx) Acked-by: NKukjin Kim <kgene.kim@samsung.com> (for exynos) Acked-by: NSascha Hauer <s.hauer@pengutronix.de> (for imx) Acked-by: NOlof Johansson <olof@lixom.net> (for tegra)
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- 16 11月, 2011 1 次提交
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由 Sascha Hauer 提交于
This patch moves the contents of arch/arm/mach-mx5 to arch/arm/mach-imx and adjusts the Makefile/Kconfig entries in a way that it's possible to compile i.MX5 together with i.MX3/6. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Tested-by: NShawn Guo <shawn.guo@linaro.org> Tested-by: NDirk Behme <dirk.behme@de.bosch.com>
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- 11 11月, 2011 1 次提交
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由 Shawn Guo 提交于
The AUTO_ZRELADDR selection for ARCH_IMX_V4_V5 and ARCH_MX5 should really be mutually exclusive to ZBOOT_ROM just like what ARCH_IMX_V6_V7 does. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 31 10月, 2011 2 次提交
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由 Sascha Hauer 提交于
The patch merges the build of imx3 and imx6. The Kconfig symbol ARCH_IMX_V6_V7 is introduced to replace ARCH_MX3 and ARCH_MX6. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
It adds the core definitions and low-level debug uart support for imx6q. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 13 10月, 2011 1 次提交
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由 Paul Bolle 提交于
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 24 8月, 2011 2 次提交
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由 Sascha Hauer 提交于
For this we need CONFIG_AUTO_ZRELADDR and CONFIG_ARM_PATCH_PHYS_VIRT. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
For this we need CONFIG_AUTO_ZRELADDR and CONFIG_ARM_PATCH_PHYS_VIRT. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 19 5月, 2011 4 次提交
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由 Uwe Kleine-König 提交于
Fixing a few "please, no space before tabs" and "empty line at end of file" warnings on the way. LAKML-Reference: 1299271882-2130-6-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to compile a single (working) kernel for these. LAKML-Reference: 1302464943-20721-4-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
The symbols in this choice should only be used to select between the available machines that can be built into a single kernel. As these sets (will) differ e.g. depending on ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR letting them select other symbols makes the logic more complex and needs to duplicate some things. So let the machines select the corresponding symbols (indirectly via SOC_XYZ). LAKML-Reference: 1302464943-20721-2-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
Since support for mxc91231 was introduced 2009 it only saw patches that were part of (mxc or arm) global cleanups. The only supported machine only had 4 devices (2x UART, sdhc, watchdog). Cc: Dmitriy Taychenachev <dimichxp@gmail.com> LAKML-Reference: 1302211482-17926-1-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 08 3月, 2011 1 次提交
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由 Uwe Kleine-König 提交于
This fixes: arch/arm/kernel/built-in.o: In function `__irq_svc': io.c:(.text+0x2e0): undefined reference to `avic_base' arch/arm/kernel/built-in.o: In function `__irq_usr': io.c:(.text+0x4c8): undefined reference to `avic_base' arch/arm/mach-mxc91231/built-in.o: In function `mxc91231_init_irq': magx-zn5.c:(.init.text+0x18): undefined reference to `mxc_init_irq' and was broken by c7259df3 (ARM i.MX irq: Compile avic irq code only on SoCs that need it) Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 24 11月, 2010 2 次提交
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由 Sascha Hauer 提交于
There's no point showing this option to the user. The correct value will be selected anyway. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
This patch adds a Kconfig option for the avic irq controller and lets the SoCs that need it select this option. Also, as we have two irq controllers for i.MX, irq.c is not appropriate anymore, so rename it to avic.c Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 20 11月, 2010 1 次提交
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 20 10月, 2010 1 次提交
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由 Dinh Nguyen 提交于
Add IRAM(Internal RAM) allocation functions using GENERIC_ALLOCATOR. The allocation size is 4KB multiples to guarantee alignment. The idea for these functions is for i.MX platforms to use them to dynamically allocate IRAM usage. Applies on 2.6.36-rc7 Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Reviewed-by: NAmit Kucheria <amit.kucheria@canonical.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 27 9月, 2010 1 次提交
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由 Sascha Hauer 提交于
The Enhanced Periodic Interrupt Timer (EPIT) is found on newer i.MX SoCs and can be used as an alternative system timer. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 21 8月, 2010 1 次提交
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由 Jason Wang 提交于
The core of i.MX5 series is cortex-A8, its cache line size is 64 bytes instead of 32 bytes. Refer to the OMAP3's selection, we choose 64 bytes for i.MX5, this can increase a little bit performance when perform cache operations. Signed-off-by: NJason Wang <jason77.wang@gmail.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 26 7月, 2010 2 次提交
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由 Jason Wang 提交于
The debug board is little different for all mxc 3-stack(PDK) platforms, it is possible here to add a common implementation to support this board. Signed-off-by: NJason Wang <jason77.wang@gmail.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Eric Bénard 提交于
* add clocks for audmux and ssi 1 & 2 * add irq for ssi 1 & 2 * add devices platform for ssi1 & 2 * update audmux-v2 for i.MX25 * add base addresses for audmux & ssi 1 & 2 * add iomux configuration for GPIO for AUD5 port Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 30 6月, 2010 3 次提交
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由 Uwe Kleine-König 提交于
Instead of having a platform device defined in a devices.c and register it in the machine file allocate it dynamically. This reduces the size of needed memory as the new function is discarded after init and only the existing devices are created. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
MACH_... is reserved for machine support, so use SOC as prefix, not MACH. This introduces new symbols SOC_IMX1, SOC_IMX21 and SOC_IMX27. They are selected by the old symbols for now. There is no substitute for MACH_MX2 as most usages of MX2 only means MX21 + MX27 but not MX25. Later the choice about CPU and CPU family should go away and the individual machines should select the right SOC symbol. This is a precondition to support more than one SOC in a single kernel image. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 24 6月, 2010 1 次提交
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由 Uwe Kleine-König 提交于
Finally all imx code should end up there, start with mach-mx2. While touching all files rename some files to use a hyphen instead of an underscore. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 24 2月, 2010 4 次提交
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由 Baruch Siach 提交于
ARCH_MXC_IOMUX_V3 is not specific to the i.MX25 PDK platform. Thus, ARCH_MXC_IOMUX_V3 should be selected by ARCH_MX25. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
MXC_IRQ_PRIOR, MXC_PWM and ARCH_HAS_RNGA are all defined in an "if ARCH_MXC" ... "endif" block, so they depend on ARCH_MXC anyhow. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 18 2月, 2010 1 次提交
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由 Baruch Siach 提交于
The commit also introduces the HAVE_FB_IMX config that is to be selected from the MX25 platform config. Once this commit gets merged, the two other i.MX archs, ARCH_MX1 and ARCH_MX2, should follow this one. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 10 2月, 2010 1 次提交
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由 Amit Kucheria 提交于
Babbage is a reference board from Freescale for their i.MX51 SoC. Add board definition, Kconfig and Makefiles to enable Freescale i.MX51 processor and Babbage board. Boot tested on a Babbage2.5 board Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>
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- 09 2月, 2010 1 次提交
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由 Amit Kucheria 提交于
Freescale i.MX51 processor uses a new interrupt controller. Add driver for TrustZone Interrupt Controller Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>
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- 14 11月, 2009 2 次提交
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Daniel Mack 提交于
The ARC USB OTG Core has support for accessing ULPI tranceivers through so called ULPI viewports. Export a set of function for use with the USB OTG framework. Signed-off-by: NDaniel Mack <daniel@caiaq.de> Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: linux-usb@vger.kernel.org Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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