- 30 8月, 2017 40 次提交
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由 Julia Lawall 提交于
The sdhci_pltfm_data structure is only passed as the second argument of sdhci_pltfm_init, which is const, so the sdhci_pltfm_data structure can be const as well. Done with the help of Coccinelle. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shawn Lin 提交于
Per the SD physical layer simplified specification V4.10, section 4.6.2, CSD version 1.0 SD card should use taac, nsac and r2w_factor for calculating the data access time. But the taac and nsac for SDHC(CSD version 2.0) are always fixed and the software should use the recommended value for timeout. When parsing the CSD, we sanely set them to zero for SDHC(CSD version 2.0), all the calculation for timeout_ns and timeout_clk is zero as well. So what we actually want to limit here is either SDHC case or unreasonable timeout reported by the cards. In principle we should at least be able to remove the bogus check for the mmc_card_blockaddr. Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Zhoujie Wu 提交于
One issue was found on a removable high speed sd card with runtime pm enabled. When SD card is unplugged, it keep printing "Switching to 3.3V signalling voltage failed". And found below sequence triggers the error. mmc_rescan -> mmc_sd_detect -> mmc_power_off -- mmc->ios.vdd is updated to 0. -> mmc_claim_host -> sdhci_runtime_resume_host -> sdhci_start_signal_voltage_switch -> mmc_regulator_set_vqmmc -> mmc_ocrbitnum_to_vdd When mmc_ocrbitnum_to_vdd is called, the mmc->ios.vdd is 0, so it always return -EINVAL. The signal switch will always fail and print out warning. Ignore restoring the I/O state when runtime resume if MMC_POWER_OFF. Signed-off-by: NZhoujie Wu <zjwu@marvell.com> Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Icenowy Zheng 提交于
The A83T MMC support code introduces the timings mode switch, however such a switch doesn't exist on new SoCs with only new timings mode. Only execute the switch if the SoC really have the timings mode switch, to fix the regression shown on new timings mode only SoCs (A64, H5, etc). Signed-off-by: NIcenowy Zheng <icenowy@aosc.io> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chen-Yu Tsai 提交于
Some SoCs do not support clk delays for MMC in the clock control unit. These include the old controllers in A10/A10s/A13/R8, and the new eMMC controller in A64. The config structure for these controllers do not specify clk_delays, but the check for this was replaced in change "mmc: sunxi: Support controllers that can use both old and new timings". This patch adds back the check for clk_delays, and also adds comments for both checks in sunxi_mmc_clk_set_phase(). Signed-off-by: NChen-Yu Tsai <wens@csie.org> Tested-by: NIcenowy Zheng <icenowy@aosc.io> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chen-Yu Tsai 提交于
The third MMC controller (MMC2) on the Allwinner A83T SoC is slightly different. It supports a wider 8-bit bus, has a dedicated controllable reset pin for eMMC, and a "new timing mode" which is supposed to deliver better signals and thus better performance. Add a compatible for this one to use the new timing mode not found in the other controllers. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chen-Yu Tsai 提交于
The MMC controller can support DDR52 transfers under the new timing mode. According to the BSP kernel, the module clock has to be double the card clock, regardless of the bus width. The default timings in the hardware can be used. This also reworks the code setting the internal divider, getting rid of a extra conditional. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chen-Yu Tsai 提交于
On the SoCs that introduced the new timing mode for MMC controllers, both the old (where the clock delays are set in the CCU) and new (where the clock delays are set in the MMC controller) timing modes are available, and we have to support them both. However there are two bits that control which mode is active. One is in the CCU, the other is in the MMC controller. The settings on both sides must be the same, or nothing will work. The sunxi-ng clock driver provides an API to query and set the active timing mode. At probe time, we try to set the active mode to the "new timing mode". If it succeeds, we can then use the MMC controller in the new mode. If not, we fall back to the old mode. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chen-Yu Tsai 提交于
The MMC2 clock supports a new timing mode. When the new mode is active, the output clock rate is halved. This patch sets the feature flag for the new timing mode, and adds a pre-divider based on the mode bit. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chen-Yu Tsai 提交于
All of our MMC clocks are of the MP clock type. A few MMC clocks on some SoCs, such as MMC2 on the A83T, support new/old timing mode switching. >From a clock rate point of view, when the new timing mode is active. the output clock rate is halved. This patch adds a special wrapper class of clocks, MP_MMC, around the generic MP type clocks. The rate related callbacks in ccu_mp_mmc_ops for this class look at the timing mode bit and apply the /2 post-divider when needed, before passing it through to the generic class ops, ccu_mp_ops. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chen-Yu Tsai 提交于
Starting with the A83T SoC, Allwinner introduced a new timing mode for its MMC clocks. The new mode changes how the MMC controller sample and output clocks are delayed to match chip and board specifics. There are two controls for this, one on the CCU side controlling how the clocks behave, and one in the MMC controller controlling what inputs to take and how to route them. In the old mode, the MMC clock had 2 child clocks providing the output and sample clocks, which could be delayed by a number of clock cycles measured from the MMC clock's parent. With the new mode, the 2 delay clocks are no longer active. Instead, the delays and associated controls are moved into the MMC controller. The output of the MMC clock is also halved. The difference in how things are wired between the modes means that the clock controls and the MMC controls must match. To achieve this in a clear, explicit way, we introduce two functions for the MMC driver to use: one queries the hardware for the current mode set, and the other allows the MMC driver to request a mode. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Simon Horman 提交于
Provide a whitelist for Gen3 SoC ES versions for both the SYS DMAC and internal DMAC variants of the SDHI driver. This is to allow drivers to only initialise for Gen3 SoC ES versions for which they are the appropriate DMAC implementation. Currently internal DMAC is the appropriate implementation for all supported Gen3 SoC ES versions. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shawn Lin 提交于
Per the spec of JESD84-B51, section 7.3, replace tacc with taac to fix the obvious typo. Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Masahiro Yamada 提交于
Detected by sparse. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Masahiro Yamada 提交于
Sparse reports "warning: cast to restricted __be32". Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NStefan Wahren <stefan.wahren@i2se.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Julia Lawall 提交于
The mmc_host_ops structure is only stored in the ops field of an mmc_host structure, which is declared as const. Thus the mmc_host_ops structure itself can be const. Done with the help of Coccinelle. // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct mmc_host_ops i@p = { ... }; @ok1@ struct mmc_host *mmc; identifier r.i; position p; @@ mmc->ops = &i@p @bad@ position p != {r.p,ok1.p}; identifier r.i; struct mmc_host_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct mmc_host_ops i = { ... }; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andy Shevchenko 提交于
Fix up a power state in case PCI device has an ACPI companion. Do it only for Intel Merrifield for now. This is almost copy'n'paste of part of sdhci_acpi_probe() and might be split out to a helper function in the future. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andy Shevchenko 提交于
ACPI_COMPANION() macro reduces a code to get a companion device out of struct device. Use it instead of an old method. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Zhoujie Wu 提交于
Emmc DDR52 mode uses fixed delay, return earlier if timing is MMC_TIMING_MMC_DDR52 in execute tuning function. Signed-off-by: NZhoujie Wu <zjwu@marvell.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Philipp Zabel 提交于
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-mmc@vger.kernel.org Cc: linux-tegra@vger.kernel.org Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Philipp Zabel 提交于
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-mmc@vger.kernel.org Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Philipp Zabel 提交于
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-mmc@vger.kernel.org Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Philipp Zabel 提交于
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-mmc@vger.kernel.org Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Rob Herring 提交于
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: NRob Herring <robh@kernel.org> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Cc: Jan Glauber <jglauber@cavium.com> Cc: David Daney <david.daney@cavium.com> Cc: "Steven J. Hill" <Steven.Hill@cavium.com> Cc: linux-mmc@vger.kernel.org Acked-by: NDavid Daney <david.daney@cavium.com> Tested-by: NSteven J. Hill <Steven.Hill@cavium.com> Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ian Molton 提交于
I cannot see why this is needed. kmap() should be safe in this case. Signed-off-by: NIan Molton <ian@mnementh.co.uk> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Arvind Yadav 提交于
pci_device_id are not supposed to change at runtime. All functions working with pci_device_id provided by <linux/pci.h> work with const pci_device_id. So mark the non-const structs as const. File size before: text data bss dec hex filename 6952 880 0 7832 1e98 drivers/mmc/host/via-sdmmc.o File size After adding 'const': text data bss dec hex filename 7032 800 0 7832 1e98 drivers/mmc/host/via-sdmmc.o Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shawn Lin 提交于
sdhci uses CONFIG_MMC_DEBUG for showing ADMA descriptor when occurring ADMA error. And it's also used to dump the registers whenever calling sdhci_add_host. On one hand, I don't see any burden to always print the state ADMA descriptor as it's rare and will help folks better understand what was happening when seeing ADMA error. On the other, folks may be interested in checking some registers at probe time. So we remove the sdhci_dumpregs from __sdhci_add_host and print some really useful registers in sdhci_setup_host. Suggested-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shawn Lin 提交于
wbsd only use this to print some unsupported command. However the pr_warn should be enough for dynamic log control and CONFIG_MMC_DEBUG seems bogus here. Remove it. Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shawn Lin 提交于
We have removed all code depending on CONFIG_MMC_DEBUG from mmc core now. So it's safe to make CONFIG_MMC_DEBUG just for host drivers only and we expect to kill this option in the future. Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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