1. 07 12月, 2011 2 次提交
  2. 28 11月, 2011 6 次提交
  3. 25 11月, 2011 30 次提交
  4. 24 11月, 2011 2 次提交
    • C
      drivers/serial/ucc_uart.c: Add missing call to init UCC UART port timeout · 8e18862d
      Chuck Meade 提交于
      The UCC UART driver is missing a call to uart_update_timeout().
      Without this call, attempting to close the port after outputting large
      amounts of data (i.e. using tty and uart buffering) results in long
      timeouts before the port will actually be shut down.
      
      For example, cat a large file to a UCC UART port.  With the current
      driver, the port will stay open for 30 seconds after the last byte
      of data is output.  But with this patch, the port is closed as
      expected, just after the data has been output (tx fifos empty).
      Signed-off-by: NChuck Meade <chuck@ThePTRGroup.com>
      Acked-by: NTimur Tabi <timur@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      8e18862d
    • T
      powerpc/fsl_msi: add support for the fsl, msi property in PCI nodes · 895d603f
      Timur Tabi 提交于
      On Freescale parts with multiple MSI controllers, the controllers are
      combined into one "pool" of interrupts.  Whenever a device requests an MSI
      interrupt, the next available interrupt from the pool is selected,
      regardless of which MSI controller the interrupt is from.  This works
      because each PCI bus has an ATMU to all of CCSR, so any PCI device can
      access any MSI interrupt register.
      
      The fsl,msi property is used to specify that a given PCI bus should only
      use a specific MSI device.  This is necessary, for example, with the
      Freescale hypervisor, because the MSI devices are assigned to specific
      partitions.
      
      Ideally, we'd like to be able to assign MSI devices to PCI busses within
      the MSI or PCI layers.  However, there does not appear to be a mechanism
      to do that.  Whenever the MSI layer wants to allocate an MSI interrupt to
      a PCI device, it just calls arch_setup_msi_irqs().  It would be nice if we
      could register an MSI device with a specific PCI bus.
      
      So instead we remember the phandles of each MSI device, and we use that to
      limit our search for an available interrupt.  Whenever we are asked to
      allocate a new interrupt for a PCI device, we check the fsl,msi property
      of the PCI bus for that device.  If it exists, then as we are looping over
      all MSI devices, we skip the ones that don't have a matching phandle.
      Signed-off-by: NTimur Tabi <timur@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      895d603f