- 25 8月, 2016 6 次提交
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由 Felipe Balbi 提交于
In case our TRB ring is full, we can avoid trying to kick transfers which won't start and just add requests to the queue. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Instead, we can always rely on dwc3_calc_trbs_left() directly. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
ENDXFER polling is available on version 3.10a and later of the DWC_usb3 (USB 3.0) controller. With this feature, the software can poll the CMDACT bit in the DEPCMD register after issuing an ENDXFER command. This feature is enabled by writing GUCTL2[14]. This feature is NOT available on the DWC_usb31 (USB 3.1) IP. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
No functional changes, just a slight cosmetic change. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
We don't use LST bit anymore, so this condition will never trigger. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Upon transfer completion after a full ring, let's add more TRBs to our ring in order to complete our request successfully. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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- 22 8月, 2016 6 次提交
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由 Felipe Balbi 提交于
If the ring is full and we are processing a big sglist, then let's interrupt so we can, later, add more TRBs to the ring. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
We know that we have to iterate over the list of started requests. Instead of looping forever, we can rely on list_for_each_entry(). Likewise, instead of a do {} while loop over all, maybe available, scatterlist entries, we can detect if $this request uses scatterlist and rely on for_each_sg(). This makes the code easier to follow while making sure that we will *always* break out of the loop. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Many of the comments in that function are really outdated and don't match what the driver is doing. Moreover, recent patches combined programming model for all non-control endpoints, this gives us an opportunity to get rid of our special cases in __dwc3_gadget_ep_queue(). Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
We always need to decrement our index by at least one. Simplify the implementation by using a temporary local variable and making sure that we will always decrement one extra if tmp == 0. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Instead of waiting until giveback before incrementing the dequeue pointer, we can increment it from dwc3_cleanup_done_reqs(), that way we avoid an extra loop over all TRBs during giveback. While at that, also avoid using req->first_trb_index as that's completely unnecessary. A follow-up patch will clean up further uses of that and remove the field altogether. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
The only endpoint which actually requires LST bit and XferComplete is ep0/1. Let's save some time by completely removing LST bit support and XferComplete. This simplifies and consolidates endpoint handling for all other 3 transfer types while also avoiding extra interrupts. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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- 11 8月, 2016 2 次提交
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由 Felipe Balbi 提交于
stop consuming TRBs when we reach one with HWO bit already set. This will prevent us from prematurely retiring a TRB. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Janusz Dziedzic 提交于
According to Synopsys Databook 2.60a, section 8.3.4, it's stated that: The LST bit should be set to 0 (isochronous transfers normally continue until the endpoint is removed entirely, at which time an End Transfer command is used to stop the transfer). This patch makes sure that detail is observed and fixes a regression with Android Audio playback caused by recent changes to DWC3 gadget. Signed-off-by: NJanusz Dziedzic <januszx.dziedzic@linux.intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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- 10 8月, 2016 3 次提交
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由 Felipe Balbi 提交于
If we stop earlier due to short packet, we will not be able to giveback all TRBs. Cc: <stable@vger.kernel.org> Cc: Brian E Rogers <brian.e.rogers@intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
DWC3 has one interesting peculiarity with chained transfers. If we setup N chained transfers and we get a short packet before processing all N TRBs, DWC3 will (conditionally) issue a XferComplete or XferInProgress event and retire all TRBs from the one which got a short packet to the last without clearing their HWO bits. This means SW must clear HWO bit manually, which this patch is doing. Cc: <stable@vger.kernel.org> Cc: Brian E Rogers <brian.e.rogers@intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
When using SG lists, we would end up setting request->actual to: num_mapped_sgs * (request->length - count) Let's fix that up by incrementing request->actual only once. Cc: <stable@vger.kernel.org> Reported-by: NBrian E Rogers <brian.e.rogers@intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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- 21 6月, 2016 8 次提交
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由 Baolin Wang 提交于
It had changed to be suspend event for BIT6 in DEVT register from version 2.30a and above. Thus this patch introduces one suspend event handler to handle the suspend event. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Roger Quadros 提交于
Implementations might use different IRQs for host, gadget so use named interrupt resources to allow device tree to specify the interrupts. Following are the interrupt names Peripheral Interrupt - peripheral HOST Interrupt - host Maintain backward compatibility for a single named interrupt ("dwc3_usb3") for all interrupts as well as unnamed interrupt at index 0 for all interrupts. As platform_get_irq() variants are used, tackle the -EPROBE_DEFER case as well. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Baolin Wang 提交于
It will be crash to stop gadget when the dwc3 device had been into suspend state, thus we need to check if the dwc3 device had been into suspend state when UDC try to stop gadget. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Because of recent changes to transfer handling on DWC3, we will not get XferComplete unless we completely fill up our TRB ring. This means that we might get a Reset or Disconnect without getting a XferComplete first. In order to correctly release our allocated Transfer Resource, we must issue ENDTRANSFER command whenever dep->resource_index is valid. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
it's clear now that when is_on=true, we must loop until DWC3_DSTS_DEVCTRLHLT clears; while when is_on=false we must loop until DWC3_DSTS_DEVCTRLHLT gets set. Instead of adding actual if() statements, we can rely on XOR operation to evaluate to true only when the above conditions apply. Then, we can move the break condition back to the while() statement together with our timeout check and the resulting code is very compact and simpler to read. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
instead of looping forever and forcing a return if timeout reaches zero, we can just use timeout and loop's break condition directly. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
testing shows that udelay() is unnecessary as controller reaches Halted state almost instantenously as can be seen by our timeout variable never actually decrementing. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
'modify' is what the current action is called. Let's rename it so it matches databook. While at that, also make sure to add support 'init' action too. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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- 20 6月, 2016 15 次提交
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由 Felipe Balbi 提交于
If we don't, we will overwrite valid TRBs. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Now we can try to issue Update Transfer every time gadget driver queues a new request. This will make sure we keep controller's queue busy for as long as possible. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
We don't need this IRQ anymore for interrupt or bulk endpoints. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Let's only set LST bit when we run out of space in our TRB ring. For all other cases, we keep LST bit unset which will prevent constant allocation and deallocation of endpoint transfer resources. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
Instead of relying on empty list of queued requests, let's rely on the fact that we have a TRB being processed right now. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
We will be using this information to change how we figure out when we need LST bit. For now, just update our counters. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
According to SNPS databook, we need to pass transfer resource on update transfer command, let's do it. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
when passing strings to trace, we don't need the trailing newline character. Trace already appends a newline character automatically. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
Correct the use of the DWC3_DSTS_XXX_SPEED and DWC3_DCFG_XXX_SPEED macros. The wrong set of macros were being used in a few places. This is only a cosmetic change as the values for both sets are identical. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
From sparse: warning: cast truncates bits from constant value (100 becomes 0) The DWC3_TRB_NUM constant is too big for u8. Do the calculation a slightly different way that should still be optimized out for the case where DWC3_TRB_NUM == 256. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
If the trb->enqueue == trb->dequeue, then it could be full or empty. This could also happen at TRB index 0, so modify the check to handle that condition. At index 0, the previous TRB is the one just before the link TRB. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
The TRBs left calculation didn't account for the link TRB taking up one spot. If the trb_dequeue < trb_enqueue, then the result includes the link TRB slot so it must be adjusted. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
The current calculation takes dep->trb_dequeue - dep->trb_enqueue to find the TRB space left. If you enqueue 1, that results in: (u8) 0 - (u8) 1 = 0xff = 255 TRBs left. This is correct if DWC3_TRB_NUM == 256. If DWC3_TRB_NUM is less than 256 (but still a power of 2) you need to mod the result by DWC3_TRB_NUM. For example the same calculation with DWC3_TRB_NUM = 8, results in: 255 % 6 = 7 TRBs left. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
If trbs_left == 0, we don't have any space left in the TRB ring so don't prepare anything. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 John Youn 提交于
Clears out all the TRBs in the ring to clean up any stale data that might be in them from the previous time the endpoint was enabled. Also removed the existing clear of the LINK trb since the entire ring is cleard just before. Signed-off-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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