- 17 3月, 2011 31 次提交
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由 David S. Miller 提交于
Most of the warnings emitted (we fail arch/sparc file builds with -Werror) were legitimate but harmless, however one case (n2_pcr_write) was a genuine bug. Based almost entirely upon a patch by Sam Ravnborg. Reported-by: NDennis Gilmore <dennis@ausil.us> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
entry.S access percpu + global data defined in sun4m_irq.c - so move the types to irq.h. This makes sparse happy and allow us to utilize asm-offsets later. Also updated a few comments in the sun4m_irq.c file. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
build_device_irq() is used to encapsulate the plaform specific details when we build an irq. For now the default is a simple 1:1 but sun4d differs. This patch refactors functionality - but does not change the existing functionality. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
sparc_irq_config is used to hold the platform specific irq setup. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
Add a few includes back required to build with floppy enabled Fix declaration of trapbase_cpu* so it is now consistent Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 John Stultz 提交于
This converts the sparc clocksources to use clocksource_register_hz/khz Signed-off-by: NJohn Stultz <johnstul@us.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
A recent patch to the x86 randomization code caused me to take a quick look at what we do on sparc64, and in doing so I noticed that we sometimes calculate a non-page-aligned randomization value and stick it into mmap_base. I also noticed that since I copied the logic over from PowerPC, the powerpc code has tweaked the randomization ranges in ways that would benefit us as well. For one thing, we should allow up to at least 8MB of randomization otherwise huge-page regions when HPAGE_SIZE is 4MB never randomize at all. And on the 64-bit side we were using up to 4GB. Tone it down to 1GB as 4GB can result in a lot of address space wastage. Finally, make sure all computations are unsigned. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
- drop filename in file header - drop unused includes - add KERN_* to printk - fix spaces => tabs - add spaces after reserved words - drop all externs, they are now in header files Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
This looked like a bug to me. Add a comment so next reader is hopefully less confused. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
The preprocessor symbol was not defined and the code was therefore not in use. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
- drop filename in file header - drop unused includes - add description of sun4d interrupts (from davem) - add KERN_* to printk - fix spaces => tabs - add spaces after reserved words - fix indent of a whole code block in smp4d_boot_one_cpu() Note: two printk() was updated from debug to KERN_INFO in this code block - drop all externs, they are now in header files This is partly based on a patch from: David Miller <davem@davemloft.net> Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
- drop filename in file header - drop unused includes - add description of sun4m interrupts (from davem) - add KERN_* to printk - fix spaces => tabs - add spaces after reserved words - drop all externs, they are now in header files This is partly based on a patch from: David Miller <davem@davemloft.net> Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
- drop filename in header - drop unused includes - add description of sun4c interrupts (from davem) - add spaces after reserved words This is partly based on a patch from: David Miller <davem@davemloft.net> Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
In preparation for cleaning up a number of files add declarations for irq and smp related data/functions to the relevant headers. This showed that the extern declaration of cputypval differed in the two files where it was used. As cputypval is defined like this: cputypval: .asciz "sun4c" the correct representation is a char array. Fix users to use the new declaration. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
The two methods included in tick14.c was nop because the static variable linux_lvl14 was always NULL. So remove the file and callers. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Daniel Hellstrom 提交于
Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Daniel Hellstrom 提交于
The way a LEON is powered down is implemented differently depending on CHIP type. The AMBA Plug&Play system ID tells revision of GRLIB and CHIP. This is for example needed by the GR-LEON4-ITX board and the UT699. Previously the power down support for LEON was limited to SMP, now both SMP and UP systems use the instruction. Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Daniel Hellstrom 提交于
This is only for LEON as u-boot for SPARC only supports LEON. Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
The generic irq support uses the term 'irq' for the allocated irq number. Fix it so sparc64 use the same term for an irq as the generic irq support does. For a naive reader this is less confusing. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
The generic irq support uses the term 'irq' for the allocated irq number. Fix it so sparc64 use the same term for an irq as the generic irq support does. For a naive reader this is less confusing. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
Drop all uses of deprecated genirq features. The irq_set_affinity() call got a third paramter 'force' which is unused. For now genirq does not use this paramter and it is ignored by sparc. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Josip Rodin <joy@entuzijast.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
{get,set}_irq_data uses the member "handler_data" in irq_data which fits the naem of the datatype. The change has no functional impact Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
In preparation of moving to use irq_data.handler_data rename all pointers to irq_handler_data "handler_data". This will also prevent name clash when we introduce the new irq methods. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
The generic irq support uses "irq" to identify the virtual irq number. To avoid confusion rename the argument to handler_irq() to pil to match the name of the parameter in the PCR register. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sam Ravnborg 提交于
GENERIC_HARDIRQS_NO_DEPRECATED require us to access data via irq_data. No functional changes as data has same layout due to use of union Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kristoffer Glembo 提交于
Order of kfree and free_pages were swapped in the error handling. Signed-off-by: NKristoffer Glembo <kristoffer@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kristoffer Glembo 提交于
Signed-off-by: NKristoffer Glembo <kristoffer@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kristoffer Glembo 提交于
Signed-off-by: NKristoffer Glembo <kristoffer@gaisler.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kristoffer Glembo 提交于
This patch sets the dma_ops structure for LEON. It reuses the pci32_dma_ops. Signed-off-by: NKristoffer Glembo <kristoffer@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kristoffer Glembo 提交于
Signed-off-by: NKristoffer Glembo <kristoffer@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kristoffer Glembo 提交于
Signed-off-by: NKristoffer Glembo <kristoffer@gaisler.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 3月, 2011 3 次提交
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由 Stephen Rothwell 提交于
[AV: on architectures where default conflicts with existing flags, that is] Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Boris Ostrovsky 提交于
Support for Always Running APIC timer (ARAT) was introduced in commit db954b58. This feature allows us to avoid switching timers from LAPIC to something else (e.g. HPET) and go into timer broadcasts when entering deep C-states. AMD processors don't provide a CPUID bit for that feature but they also keep APIC timers running in deep C-states (except for cases when the processor is affected by erratum 400). Therefore we should set ARAT feature bit on AMD CPUs. Tested-by: NBorislav Petkov <borislav.petkov@amd.com> Acked-by: NAndreas Herrmann <andreas.herrmann3@amd.com> Acked-by: NMark Langsdorf <mark.langsdorf@amd.com> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NBoris Ostrovsky <boris.ostrovsky@amd.com> LKML-Reference: <1300205624-4813-1-git-send-email-ostr@amd64.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Andreas Herrmann 提交于
Commit 7f74f8f2 (x86 quirk: Fix polarity for IRQ0 pin2 override on SB800 systems) introduced a regression. It removed some SB600 specific code to determine the revision ID without adapting a corresponding revision ID check for SB600. See this mail thread: http://marc.info/?l=linux-kernel&m=129980296006380&w=2 This patch adapts the corresponding check to cover all SB600 revisions. Tested-by: NWang Lei <f3d27b@gmail.com> Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: stable@kernel.org # 38.x, 37.x, 32.x LKML-Reference: <20110315143137.GD29499@alberich.amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 15 3月, 2011 6 次提交
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由 Mathieu Desnoyers 提交于
Intel Archiecture Software Developer's Manual section 7.1.3 specifies that a core serializing instruction such as "cpuid" should be executed on _each_ core before the new instruction is made visible. Failure to do so can lead to unspecified behavior (Intel XMC erratas include General Protection Fault in the list), so we should avoid this at all cost. This problem can affect modified code executed by interrupt handlers after interrupt are re-enabled at the end of stop_machine, because no core serializing instruction is executed between the code modification and the moment interrupts are reenabled. Because stop_machine_text_poke performs the text modification from the first CPU decrementing stop_machine_first, modified code executed in thread context is also affected by this problem. To explain why, we have to split the CPUs in two categories: the CPU that initiates the text modification (calls text_poke_smp) and all the others. The scheduler, executed on all other CPUs after stop_machine, issues an "iret" core serializing instruction, and therefore handles core serialization for all these CPUs. However, the text modification initiator can continue its execution on the same thread and access the modified text without any scheduler call. Given that the CPU that initiates the code modification is not guaranteed to be the one actually performing the code modification, it falls into the XMC errata. Q: Isn't this executed from an IPI handler, which will return with IRET (a serializing instruction) anyway? A: No, now stop_machine uses per-cpu workqueue, so that handler will be executed from worker threads. There is no iret anymore. Signed-off-by: NMathieu Desnoyers <mathieu.desnoyers@efficios.com> LKML-Reference: <20110303160137.GB1590@Krystal> Reviewed-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: <stable@kernel.org> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andi Kleen <andi@firstfloor.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Michal Simek 提交于
Reset vector can be setup by bootloader and kernel doens't need to touch it. If you require to setup reset vector, please use CONFIG_MANUAL_RESET_VECTOR throught menuconfig. It is not possible to setup address 0x0 as reset address because make no sense to set it up at all. Signed-off-by: NMichal Simek <monstr@monstr.eu> Signed-off-by: NJohn Williams <john.williams@petalogix.com>
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由 Michal Simek 提交于
If soft reset falls through with no hardware assisted reset, the best we can do is jump to the reset vector and see what the bootloader left for us. Signed-off-by: NMichal Simek <monstr@monstr.eu> Signed-off-by: NJohn Williams <john.williams@petalogix.com>
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由 Michal Simek 提交于
Microblaze vector table stores several vectors (reset, user exception, interrupt, debug exception and hardware exception). All these functions can be below address 0x10000. If they are, wrong vector table is genarated because jump is not setup from two instructions (imm upper 16bit and brai lower 16bit). Adding specific offset prevent problem if address is below 0x10000. For this case only brai instruction is used. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Xiao Guangrong 提交于
native_flush_tlb_others() is called from: flush_tlb_current_task() flush_tlb_mm() flush_tlb_page() All these functions disable preemption explicitly, so we can use smp_processor_id() instead of get_cpu() and put_cpu(). Signed-off-by: NXiao Guangrong <xiaoguangrong@cn.fujitsu.com> Cc: Cliff Wickman <cpw@sgi.com> LKML-Reference: <4D7EC791.4040003@cn.fujitsu.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Aneesh Kumar K.V 提交于
This patch add new syscalls to x86_64 Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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