- 01 4月, 2015 1 次提交
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由 David Daney 提交于
Some hardware blocks attached to the OCTEON bootbus run asynchronously to accesses from the CPUs. These include MMC/SD host, CF(when using DMA), and NAND controller. A bus error, or corrupt data may occur if a CPU is trying to access a bootbus connected device at the same time the bus is running asynchronous operations. To work around these problems we add this semaphore that must be acquired before initiating bootbus activity. Subsequent patches will add users for this. Signed-off-by: NDavid Daney <david.daney@cavium.com> [aleksey.makarov@auriga.com: combine the patches] Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9459/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 20 2月, 2015 2 次提交
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由 David Daney 提交于
Also update union octeon_cvmemctl with new OCTEON II fields. [aleksey.makarov@auriga.com: use __BITFIELD_FIELD] Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8940/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The wide multiplier is twice as wide, so we need to save twice as much state. Detect the multiplier type (CPU type) at start up and install model specific handlers. [aleksey.makarov@auriga.com: conflict resolution, support for old compilers] Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8933/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 24 12月, 2014 1 次提交
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由 Aaro Koskinen 提交于
Add crypto helper functions which are needed for kernel level usage. The code for these has been extracted from the EdgeRouter Pro GPL tarball. While at it, also delete duplicate definitions of the functions. Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 23 5月, 2014 1 次提交
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由 Paul Bolle 提交于
Three checks for CONFIG_CAVIUM_GDB were added in v2.6.29. But the Kconfig symbol CAVIUM_GDB was never added to the tree. Remove these checks. Also remove the last reference to octeon_get_boot_debug_flag(). There is no definition of that function anyway. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Tested-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>) Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6976/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 04 9月, 2013 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 01 2月, 2013 1 次提交
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由 Ralf Baechle 提交于
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 14 12月, 2012 1 次提交
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由 David Daney 提交于
The patch needs to eliminate the definition of OCTEON_IRQ_BOOTDMA so that the device tree code can map the interrupt, so in order to not temporarily break things, we do a single patch to both the interrupt registration code and the pata_octeon_cf driver. Also rolled in is a conversion to use hrtimers and corrections to the timing calculations. Acked-by: NJeff Garzik <jgarzik@redhat.com> Signed-off-by: NDavid Daney <david.daney@cavium.com>
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- 03 10月, 2012 1 次提交
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由 David Howells 提交于
Convert #include "..." to #include <path/...> in kernel system headers. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: NDave Jones <davej@redhat.com>
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- 01 9月, 2012 2 次提交
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由 David Daney 提交于
Also cleanup and fix octeon_init_cvmcount() Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Acked-by: NDavid S. Miller <davem@davemloft.net>
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由 David Daney 提交于
The cn68XX has a new interrupt controller named CIU2, add support for this, and use it if cn68XX detected at runtime. Signed-off-by: NDavid Daney <david.daney@cavium.com>
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- 23 7月, 2012 1 次提交
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由 David Daney 提交于
There are three parts to this: 1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2. The interrupts are specified by the device tree and these hard coded irq numbers block the used of the irq lines by the irq_domain code. 2) Remove platform device setup code from octeon-platform.c, it is now unused. 3) Convert i2c-octeon.c to use device tree. Part of this includes using the devm_* functions instead of the raw counterparts, thus simplifying error handling. No functionality is changed. Signed-off-by: NDavid Daney <david.daney@cavium.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3939/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 29 3月, 2011 1 次提交
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由 David Daney 提交于
This includes conversion to new style irq_chip functions, and correctly enabling/disabling per-CPU interrupts. The hardware interrupt bit to irq number mapping is now done with a flexible map, instead of by bit twiddling the irq number. [ tglx: Adjusted to new irq_cpu_on/offline callbacks and __irq_set_affinity_lock ] Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: ralf@linux-mips.org LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 30 10月, 2010 1 次提交
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由 David Daney 提交于
Starting with cn63xx Octeon I/O blocks are clocked at a different rate than the CPU. Add a new function octeon_get_io_clock_rate() that yields the I/O clock rate. Also rearrange octeon_get_clock_rate() to get the value from the saved sysinfo structure. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1671/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 05 8月, 2010 2 次提交
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由 David Daney 提交于
Power throttling make deterministic delay loops impossible. Re-implement delays using the cycle counter. This also allows us to get rid of the code that calculates loops per jiffy. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1317/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
* Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr. * Convert calls to cvmx_read64_uint32(), to simple pointer dereferences. * Set proper ebase. * Don't confuse coreid and cpu numbers. * Try to maintain consistent bootloader coremask. * Update the signature and boot_init_vector of supported bootloaders. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1491/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 27 2月, 2010 1 次提交
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由 David Daney 提交于
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: linux-i2c@vger.kernel.org To: ben-linux@fluff.org To: khali@linux-fr.org Cc: Rade Bozic <rade.bozic.ext@nsn.com> Patchwork: http://patchwork.linux-mips.org/patch/847/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 17 12月, 2009 1 次提交
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由 Ralf Baechle 提交于
Away with the daemons of ifdef; get ready for future COP2 users. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/708/
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- 17 6月, 2009 1 次提交
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由 David Daney 提交于
This patch adds support for PCI and PCIe to the base Cavium OCTEON processor support. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 1月, 2009 1 次提交
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由 David Daney 提交于
These are the rest of the new files needed to add OCTEON processor support to the Linux kernel. Other than Makefile and Kconfig which should be obvious, we have: csrc-octeon.c -- Clock source driver for OCTEON. dma-octeon.c -- Helper functions for mapping DMA memory. flash_setup.c -- Register on-board flash with the MTD subsystem. octeon-irq.c -- OCTEON interrupt controller managment. octeon-memcpy.S -- Optimized memcpy() implementation. serial.c -- Register 8250 platform driver and early console. setup.c -- Early architecture initialization. smp.c -- OCTEON SMP support. octeon_switch.S -- Scheduler context switch for OCTEON. c-octeon.c -- OCTEON cache controller support. cex-oct.S -- OCTEON cache exception handler. asm/mach-cavium-octeon/*.h -- Architecture include files. Signed-off-by: NTomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/cavium-octeon/Kconfig create mode 100644 arch/mips/cavium-octeon/Makefile create mode 100644 arch/mips/cavium-octeon/csrc-octeon.c create mode 100644 arch/mips/cavium-octeon/dma-octeon.c create mode 100644 arch/mips/cavium-octeon/flash_setup.c create mode 100644 arch/mips/cavium-octeon/octeon-irq.c create mode 100644 arch/mips/cavium-octeon/octeon-memcpy.S create mode 100644 arch/mips/cavium-octeon/serial.c create mode 100644 arch/mips/cavium-octeon/setup.c create mode 100644 arch/mips/cavium-octeon/smp.c create mode 100644 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/irq.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/war.h create mode 100644 arch/mips/include/asm/octeon/octeon.h create mode 100644 arch/mips/kernel/octeon_switch.S create mode 100644 arch/mips/mm/c-octeon.c create mode 100644 arch/mips/mm/cex-oct.S
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