1. 11 7月, 2015 1 次提交
  2. 26 6月, 2015 5 次提交
  3. 25 6月, 2015 5 次提交
  4. 23 6月, 2015 1 次提交
  5. 22 6月, 2015 5 次提交
  6. 20 6月, 2015 1 次提交
  7. 19 6月, 2015 3 次提交
  8. 18 6月, 2015 1 次提交
  9. 17 6月, 2015 1 次提交
  10. 15 6月, 2015 3 次提交
  11. 14 6月, 2015 1 次提交
  12. 13 6月, 2015 1 次提交
  13. 12 6月, 2015 1 次提交
  14. 11 6月, 2015 3 次提交
  15. 10 6月, 2015 2 次提交
  16. 06 6月, 2015 1 次提交
    • D
      PCI: xgene: Add APM X-Gene v1 PCIe MSI/MSIX termination driver · dcd19de3
      Duc Dang 提交于
      APM X-Gene v1 SoC supports its own implementation of MSI, which is not
      compliant to GIC V2M specification for MSI Termination.
      
      There is a single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports.
      This MSI block supports 2048 MSI termination ports coalesced into 16
      physical HW IRQ lines and shared across all 5 PCIe ports.
      
      As there are only 16 HW IRQs to serve 2048 MSI vectors, to support
      set_affinity correctly for each MSI vectors, the 16 HW IRQs are statically
      allocated to 8 X-Gene v1 cores (2 HW IRQs for each cores).  To steer MSI
      interrupt to target CPU, MSI vector is moved around these HW IRQs lines.
      With this approach, the total MSI vectors this driver supports is reduced
      to 256.
      
      [bhelgaas: squash doc, driver, maintainer update]
      Signed-off-by: NDuc Dang <dhdang@apm.com>
      Signed-off-by: NTanmay Inamdar <tinamdar@apm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com>
      dcd19de3
  17. 04 6月, 2015 2 次提交
  18. 03 6月, 2015 3 次提交