1. 17 1月, 2019 1 次提交
  2. 11 12月, 2018 1 次提交
    • M
      usb: dwc2: Fix disable all EP's on disconnect · 4fe4f9fe
      Minas Harutyunyan 提交于
      Disabling all EP's allow to reset EP's to initial state.
      Introduced new function dwc2_hsotg_ep_disable_lock() which
      before calling dwc2_hsotg_ep_disable() function acquire
      hsotg->lock and release on exiting.
      From dwc2_hsotg_ep_disable() function removed acquiring
      hsotg->lock.
      In dwc2_hsotg_core_init_disconnected() function when USB
      reset interrupt asserted disabling all ep’s by
      dwc2_hsotg_ep_disable() function.
      This updates eliminating sparse imbalance warnings.
      
      Reverted changes in dwc2_hostg_disconnect() function.
      Introduced new function dwc2_hsotg_ep_disable_lock().
      Changed dwc2_hsotg_ep_ops. Now disable point to
      dwc2_hsotg_ep_disable_lock() function.
      In functions dwc2_hsotg_udc_stop() and dwc2_hsotg_suspend()
      dwc2_hsotg_ep_disable() function replaced by
      dwc2_hsotg_ep_disable_lock() function.
      In dwc2_hsotg_ep_disable() function removed acquiring
      of hsotg->lock.
      
      Fixes: dccf1bad ("usb: dwc2: Disable all EP's on disconnect")
      Signed-off-by: NMinas Harutyunyan <hminas@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      4fe4f9fe
  3. 26 11月, 2018 2 次提交
  4. 02 10月, 2018 7 次提交
  5. 30 7月, 2018 3 次提交
  6. 17 7月, 2018 1 次提交
  7. 19 6月, 2018 2 次提交
  8. 18 6月, 2018 3 次提交
  9. 21 5月, 2018 2 次提交
  10. 15 5月, 2018 5 次提交
    • A
      usb: dwc2: Change reading of current frame number flow. · c7c24e7a
      Artur Petrosyan 提交于
      The current frame_number is read from core for both
      device and host modes. Reading of the current frame
      number needs to be performed ASAP due to IRQ latency's.
      This is why, it is moved to common interrupt handler.
      
      Accordingly updated dwc2_gadget_target_frame_elapsed()
      function which uses stored frame_number instead of
      reading frame number.
      
      In cases when target frame value is incremented
      the frame_number is required to read again.
      Signed-off-by: NArtur Petrosyan <arturp@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      c7c24e7a
    • A
      usb: dwc2: Fix crash in incomplete isoc intr handlers. · d5d5f079
      Artur Petrosyan 提交于
      Crash caused by going out of "eps_out" array range.
      Iteration on "eps_out" changed to less than "num_of_eps".
      Signed-off-by: NArtur Petrosyan <arturp@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      d5d5f079
    • G
      usb: dwc2: Add Interpacket Gap(IPG) feature support · b43ebc96
      Grigor Tovmasyan 提交于
      Added GHWCFG4_IPG_ISOC_SUPPORTED and DCFG_IPG_ISOC_SUPPORDED
      bits definitions to enable/disable IPG feature.
      
      Added ipg_isoc_en core parameter which will indicate IPG support
      enable/disable and initialize it.
      Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      b43ebc96
    • M
      usb: dwc2: Enable BNA interrupt for IN endpoints · 37981e00
      Minas Harutyunyan 提交于
      In DDMA mode required to enable BNA interrupt for
      both directions.
      Signed-off-by: NMinas Harutyunyan <hminas@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      37981e00
    • M
      usb: dwc2: Change ISOC DDMA flow · 729cac69
      Minas Harutyunyan 提交于
      Changed existing two descriptor-chain flow to one chain.
      
      In two-chain implementation BNA interrupt used for switching between
      two chains. BNA interrupt asserted because of returning to
      beginning of the chain based on L-bit of last descriptor.
      
      Because of that we lose packets. This issue resolved by using one
      desc-chain.
      
      Removed all staff related to two desc-chain flow from
      DDMA ISOC related functions.
      
      Removed request length checking from dwc2_gadget_fill_isoc_desc()
      function. Request length checking added to dwc2_hsotg_ep_queue()
      function. If request length greater than descriptor limits then
      request not added to queue. Additional checking done for High
      Bandwidth ISOC OUT's which not supported by driver. In
      dwc2_gadget_fill_isoc_desc() function also checked desc-chain
      status (full or not) to avoid of reusing not yet processed
      descriptors.
      
      In dwc2_gadget_start_isoc_ddma() function creation of desc-chain
      always started from descriptor 0. Before filling descriptors, they
      were initialized by HOST BUSY status.
      
      In dwc2_gadget_complete_isoc_request_ddma() added checking for
      desc-chain rollover. Also added checking completion status.
      Request completed successfully if DEV_DMA_STS is DEV_DMA_STS_SUCC,
      otherwise complete with actual=0. For systems with high IRQ latency
      added pointer compl_desc to next descriptor to be completed by
      XferCompl interrupt. This pointer replace descriptor index calculation
      based on DxEPDMA register. On descriptor completion interrupt
      processing all descriptors starting from compl_desc till descriptor
      which Buffer Status field not equal DMA_DONE status.
      
      Actually removed dwc2_gadget_start_next_isoc_ddma() function because
      now driver use only one desc-chain and instead that function added
      dwc2_gadget_handle_isoc_bna() function for handling BNA interrupts.
      
      Handling BNA interrupt done by flushing TxFIFOs for OUT EPs,
      completing request with actual=0 and resetting desc-chain number and
      target frame to initial values for restarting transfers.
      
      On handling NAK request completed with actual=0. Incremented target
      frame to allow fill desc chain and start transfers.
      In DDMA mode avoided of frame number incrementing, because tracking
      of frame number performed in dwc2_gadget_fill_isoc_desc() function.
      
      When core assert XferCompl along with BNA, we should ignore XferCompl
      in dwc2_hsotg_epint() function.
      
      On BNA interrupt replaced dwc2_gadget_start_next_isoc_ddma() by above
      mentioned BNA handler.
      
      In dwc2_hsotg_ep_enable() function added sanity check of bInterval
      for ISOC IN in DDMA mode, because HW doesn't supported EP's with
      bInterval more than 10 and check for mc for ISOC OUT transfers,
      because core doesn't support high bandwidth transfers.
      Signed-off-by: NMinas Harutyunyan <hminas@synopsys.com>
      Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
      729cac69
  11. 25 4月, 2018 1 次提交
  12. 13 3月, 2018 12 次提交