- 06 12月, 2012 1 次提交
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由 Alexander Shiyan 提交于
This patch add new driver for CLPS711X SPI master controller. Due to platform limitations driver supports only 8 bit transfer mode. Chip select control is handled via GPIO. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 02 12月, 2012 2 次提交
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由 Sachin Kamat 提交于
linux/err.h was included twice. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Shubhrajyoti D 提交于
Fix the below warning drivers/spi/spi-omap2-mcspi.c:336:34: warning: symbol 'tx' shadows an earlier one drivers/spi/spi-omap2-mcspi.c:327:12: originally declared here So delete the u8 tx as it is assigned and not used(resigned afterwards). Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 11月, 2012 1 次提交
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由 Phil Edworthy 提交于
The current HSPI driver used automatic CS control, leading to CS active for each byte transmitted. This patch changes the driver to manual CS control, and ensures CS is active thoughout a whole message. Additionally, it uses the cs_change field to determine if CS is disabled between transfers in the message. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 22 11月, 2012 1 次提交
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This will allow to use gpio for chip select with no modification in the driver binding When use the cs-gpios, the gpio number will be passed via the cs_gpio field and the number of chip select will automatically increased with max(hw cs, gpio cs). So if for example the controller has 2 CS lines, and the cs-gpios property looks like this: cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>; Then it should be configured so that num_chipselect = 4 with the following mapping: cs0 : &gpio1 0 0 cs1 : native cs2 : &gpio1 1 0 cs3 : &gpio1 2 0 Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: spi-devel-general@lists.sourceforge.net Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> [grant.likely: fixed up type of cs count so min() can do type checking] Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 14 11月, 2012 5 次提交
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由 Wei Yongjun 提交于
Remove duplicated include. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Guennadi Liakhovetski 提交于
Use a proper list iterator instead of an open-coded loop and remove a superfluous list head initialisation. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Guennadi Liakhovetski 提交于
This patch makes a loop look cleaner by replacing a "break" and a "continue" in its body by a single "if". Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Daniel Mack 提交于
0384e90b ("spi/mcspi: allow configuration of pin directions") did what it claimed to do the wrong way around. D0/D1 is configured as output by *clearing* the bits in the conf registers, hence also breaking the former default behaviour. Fix this before that change is merged to mainline. Signed-off-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Laxman Dewangan 提交于
NVIDIA's Tegra20 have the SPI (SFLASH) controller to interface with spi flash device which is used for system boot. Add the spi driver for this controller. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 10 11月, 2012 3 次提交
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由 Laxman Dewangan 提交于
Currently the master->setup() is called unconditionally. The assumption is that every driver need to implement this callback. This encourages drivers to populate empty functions to prevent crashing. This patch prevents the call of master->setup() if it is not populated. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Laxman Dewangan 提交于
Sequence compatible list for tegra20-slink driver to first look for Tegra30 and then Tegra20. Tegra30 have additional feature in HW which need to be utilize if it is provided from DT. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Laxman Dewangan 提交于
When spi client does the spi transfer and does not sets the bits_per_word for each transfer then set it as default of spi device in spi core before calling low level transfer. Removing the similar code from spi-tegra20-slink driver as it is not required. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 07 11月, 2012 1 次提交
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由 Abhilash Kesavan 提交于
The SPI driver makes a gpio_request during initialization. The requested gpios need to be populated as part of the s3c64xx_spi_driver_data so that they can be released during suspend and requested again during resume. Add the missing code to save the requested gpios as part of the driver data. This fixes a SPI driver suspend crash. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 06 11月, 2012 1 次提交
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由 Shubhrajyoti D 提交于
The commit d7b4394e[Cleanup the omap2_mcspi_txrx_dma function] changed the wait_for_completion order. Move the wait so that the rx doesnot wait for the tx to complete. Reported-and-tested-by: NSørensen, Stefan <Sorensen@polycom.com> Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 01 11月, 2012 2 次提交
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由 Maxime Ripard 提交于
Since we don't have a driver for it yet, use spidev instead. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Maxime Ripard 提交于
This will allow to probe spidev from device tree by adding the compatible string of each device to this array. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 31 10月, 2012 1 次提交
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由 Laxman Dewangan 提交于
Tegra20/Tegra30 supports the spi interface through its SLINK controller. Add spi driver for SLINK controller. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 10月, 2012 1 次提交
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由 Ulf Hansson 提交于
[Originally sent by Ulf as two changes, squashed down into one with a redone changelog, thanks to Russell King for analysis. -- broonie] This reverts commit 688723 (spi/pl022: enable runtime PM) and commit 2fb30d (spi/pl022: fix spi-pl022 pm enable at probe). Commit "spi/pl022: enable runtime PM" introduced runtime PM issues as it interacted badly with the work Russell King had done to move core runtime PM handling into the bus. Due to that commit, "spi/pl022: fix spi-pl022 pm enable at probe" was merged to fix part of those issues. Instead of adding another fix, let's clean up and revert everything back to when it was already fine. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Revert "spi/pl022: enable runtime PM" Conflicts: drivers/spi/spi-pl022.c
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- 17 10月, 2012 13 次提交
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由 Arnd Bergmann 提交于
There is a subtle difference between dma_transfer_direction and dma_data_direction: the former is used by the dmaengine framework, while the latter is used by the dma-mapping API. Although the purpose is comparable, the actual values are different and must not be mixed. In this case, the driver just wants to use dma_transfer_direction. Without this patch, building s3c6400_defconfig results in: drivers/spi/spi-s3c64xx.c: In function 's3c64xx_spi_dmacb': drivers/spi/spi-s3c64xx.c:239:21: warning: comparison between 'enum dma_data_direction' and 'enum dma_transfer_direction' [-Wenum-compare] As pointed out by Kukjin Kim, this also changes the use of constants from DMA_FROM_DEVICE/DMA_TO_DEVICE to DMA_DEV_TO_MEM/DMA_MEM_TO_DEV. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: spi-devel-general@lists.sourceforge.net
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由 Patrice Chotard 提交于
This commit allow to put pins in IDLE state in runtime_suspend and in SLEEP state in suspend, corresponding to defined semantics in <linux/pinctrl/pinctrl-state.h>. To do this, just add a boolean parameter runtime to pl022_resume_resources/pl022_suspend_resources which indicates if it's called from PM_RUNTIME callbacks or not. Signed-off-by: NPatrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Ulf Hansson 提交于
To be able to deactivate resourses in suspend, the resourses must first be surely active. This is done with a pm_runtime_get_sync. Once the resourses are restored to active state again in resume, the runtime pm usage count can be decreased with a pm_runtime_put. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Ulf Hansson 提交于
In probe pm_runtime_put_autosuspend has the same effect as doing pm_runtime_put. This due to upper layer in driver core is preventing the device from being runtime suspended by a pm_runtime_get*. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Ulf Hansson 提交于
This reverts commit 6887237c. Commit "spi/pl022: enable runtime PM" introduced runtime PM issues. Due to that commit, "spi/pl022: fix spi-pl022 pm enable at probe" was merged to fix part of those issues. Instead of adding another fix, let's clean up and revert everything back to when it was already fine. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Shimoda, Yoshihiro 提交于
Because the latest shdma driver changed, it caused build error in the spi-rspi driver. This patch fixed the build error. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Daniel Mack 提交于
Allow D0 to be an input and D1 to be an output, configurable via platform data and a new DT property. Based on a patch from Matus Ujhelyi <matus.ujhelyi@streamunlimited.com> Signed-off-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Florian Fainelli 提交于
Calling bcm63xx_spi_check_transfer() with a NULL argument does not do anything useful that the core spi code is not doing already, remove this superfluous call. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Florian Fainelli 提交于
The PM callbacks implemented by the spi-bcm63xx driver don't call spi_master_{resume,suspend}, fix that. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Florian Fainelli 提交于
As Grant Likely reported, this does not make any sense in a mainline kernel remove that driver version string. Reported-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Thomas Abraham 提交于
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare calls as required by common clock framework. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Marek Vasut 提交于
In case the SPI DMA times out, the DMA might still be in some kind of inconsistent state. Issue dmaengine_terminate_all() on the particular channel to kill off all operations before continuing. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Marek Vasut 提交于
In the current code implementing the MXS SPI driver, every transferred message had assigned status = 0, which is not correct. Properly assign status returned from the I/O functions. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 01 10月, 2012 2 次提交
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由 Srinivas Kandagatla 提交于
As follow-up to "dt: introduce of_get_child_by_name to get child node by name." patch, This patch removes some of the code duplication in the driver by replacing it with of_get_child_by_name instead. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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由 Stephen Warren 提交于
The current SPI driver has many issues. Examples are: * Segfaulting on most transfers due to expecting all transfers to have both RX and TX buffers. * Hanging on TX transfers since the whole driver flow is driven by RX DMA completion, but the HW is only told to enable RX for RX transfers. * Use of clk_disable_unprepare() from atomic context. * Once those and other minor issues are fixed, the driver still doesn't actually work. * The driver also implements a deprecated API to the SPI core. For this reason, simply remove the driver completely. This has two advantages: 1) This will remove the last use of Tegra's <mach/dma.h>, which will allow that file to be removed, which is required for single zImage work. 2) The downstream driver is significaly different from the current code. I believe a patch to re-add the downstream driver (with appropriate cleanup) will be much simpler to review if it's a new file rather than randomly interspered with essentially unrelated existing code. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 28 9月, 2012 3 次提交
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由 Knut Wohlrab 提交于
There are SPI devices which need a SPI clock with active low polarity and high inactive state. Add the setting of the inactive state ECSPIx_CONFIGREG:SCLK CTL according to the clock polarity ECSPIx_CONFIGREG:SCLK POL: DT without "spi-cpol" = 0 = clock active high polarity = inactive state low DT with "spi-cpol" = 1 = clock active low polarity = inactive state high Signed-off-by: NKnut Wohlrab <knut.wohlrab@de.bosch.com> Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Linus Walleij 提交于
This factors out the resource handling in runtime suspend/resume and also calls it from the ordinary suspend and resume hooks. The semantics require that ordinary PM op suspend is called with runtime PM in resumed mode, so that ordinary suspend can assume that it will e.g. decrease the clock reference counter to 0, runtime resume having previously increased it to 1. Cc: Vipul Kumar Samar <vipulkumar.samar@st.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Linus Walleij 提交于
This switches the PL022 SPI driver to use devm_* managed resources for IRQ, clocks, ioremap and GPIO. Prior to this, the GPIOs would even leak. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 25 9月, 2012 2 次提交
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由 Roland Stigge 提交于
Even with devicetree support, we needed platform data to provide some data, leading to mixed device tree and platform data. This patch makes it possible to provide all that information via device tree. Now, the data must be provided via platform data _or_ device tree completely. Only in case of DMA where a callback specification is necessary (dma_filter()), platform data is the only option. Signed-off-by: NRoland Stigge <stigge@antcom.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Sylwester Nawrocki 提交于
When s3c64xx-spi is instantiated from device tree an instance of struct s3c64xx_spi_csinfo is dynamically allocated in the driver. For non-dt platform it is passed from board code through spi_register_board_info(). On error path in s3c64xx_spi_setup() function there is an attempt to free this data struct s3c64xx_spi_csinfo object as it would have been allocated in the driver for both, dt and non-dt based platforms. This leads to following bug when gpio request fails: spi spi1.0: Failed to get /CS gpio [21]: -16 kernel BUG at mm/slub.c:3478! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 Not tainted (3.6.0-rc5-00092-g9b0b493-dirty #6111) PC is at kfree+0x148/0x158 LR is at s3c64xx_spi_setup+0xac/0x290 pc : [<c00a513c>] lr : [<c0227014>] psr: 40000013 sp : ee043e10 ip : c032883c fp : c0481f7c r10: ee0abd80 r9 : 00000063 r8 : 00000000 r7 : ee129e78 r6 : ee104a00 r5 : fffffff0 r4 : c047bc64 r3 : 40000400 r2 : c047bc64 r1 : c04def60 r0 : 0004047b Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 4000404a DAC: 00000015 Process swapper/0 (pid: 1, stack limit = 0xee0422f0) Stack: (0xee043e10 to 0xee044000) ... [<c00a513c>] (kfree+0x148/0x158) from [<c0227014>] (s3c64xx_spi_setup+0xac/0x290) [<c0227014>] (s3c64xx_spi_setup+0xac/0x290) from [<c02251a4>] (spi_setup+0x34/0x4c) [<c02251a4>] (spi_setup+0x34/0x4c) from [<c02258d0>] (spi_add_device+0x98/0x128) [<c02258d0>] (spi_add_device+0x98/0x128) from [<c02259d4>] (spi_new_device+0x74/0xa8) [<c02259d4>] (spi_new_device+0x74/0xa8) from [<c0225a2c>] (spi_match_master_to_boardinfo+0x24/0x44) [<c0225a2c>] (spi_match_master_to_boardinfo+0x24/0x44) from [<c0225b40>] (spi_register_master+0xf4/0x2a8) [<c0225b40>] (spi_register_master+0xf4/0x2a8) from [<c043fe0c>] (s3c64xx_spi_probe+0x34c/0x42c) [<c043fe0c>] (s3c64xx_spi_probe+0x34c/0x42c) from [<c01fc198>] (platform_drv_probe+0x18/0x1c) There should be no attempt to kfree controller_data when it was externally provided through the board code. Fix this by freeing controller_data only when dev->of_node is not null. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 23 9月, 2012 1 次提交
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由 Paul Walmsley 提交于
Remove unnecessary includes of plat/clock.h from the OMAP SPI controller drivers. These need to be removed to build multi-subarch ARM kernels which include these drivers. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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