- 21 2月, 2020 1 次提交
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由 Guo Ren 提交于
Some CPUs don't support icache.va instruction to maintain the whole smp cores' icache. Using icache.all + IPI casue a lot on performace and using defer mechanism could reduce the number of calling icache _flush_all functions. Signed-off-by: NGuo Ren <guoren@linux.alibaba.com>
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- 25 10月, 2018 1 次提交
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由 Guo Ren 提交于
This patch adds cache and tlb sync codes for abiv1 & abiv2. Signed-off-by: NGuo Ren <ren_guo@c-sky.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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