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  1. 10 1月, 2019 2 次提交
  3. 01 1月, 2019 5 次提交
  5. 20 12月, 2018 1 次提交
  7. 19 12月, 2018 2 次提交
    • C
      ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards · afdd273e
      由 Chen-Yu Tsai 提交于 
      This patch adds the Bluetooth node, and the underlying UART node if it's
missing, to the board device tree file for several boards. The LPO clock
is also added to the WiFi side's power sequencing node if it's missing,
to correctly represent the shared connections. There is also a PCM
connection for Bluetooth, but this is not covered in this patch.

These boards all have a WiFi+BT module from AMPAK, which contains one or
two Broadcom chips, depending on the model. The older AP6210 contains
two, while the newer AP6212 and AP6330 contain just one, as they use
two-in-one combo chips.

The Bluetooth side of the module is always connected to a UART on the
same pingroup as the SDIO pins for the WiFi side, in a 4 wire
configuration. Power to the VBAT and VDDIO pins are provided either by
the PMIC, using one or several of its regulator outputs, or other fixed
regulators on the board. The VBAT and VDDIO pins are shared with the
WiFi side, which would correspond to vmmc-supply and vqmmc-supply in the
mmc host node. A clock output from the SoC or the external X-Powers RTC
provides the LPO low power clock at 32.768 kHz.

All the boards covered in this patch are ones that do not require extra
changes to the SoC's dtsi file. For the remaining boards that I have
worked on, properties or device nodes for the LPO clock's source are
missing.

For the Cubietruck, the LPO clock is fed from CLK_OUT_A, which needs to
be muxed on pin PI12. This can be represented in multiple ways. This
patch puts the pinctrl property in the pin controller node. This is due
to limitations in Linux, where pinmux settings, even the same one, can
not be shared by multiple devices. Thus we cannot put it in both the
WiFi and Bluetooth device nodes. Putting it the CCU node is another
option, but Linux's CCU driver does not handle pinctrl. Also the pin
controller is guaranteed to be initialized after the CCU, when clocks
are available. And any other devices that use muxed pins are guaranteed
to be initialized after the pin controller. Thus having the CLK_OUT_A
pinmux reference be in the pin controller node is a good choice without
having to deal with implementation issues.
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
      afdd273e
    • M
      ARM: dts: suniv: Fix improper bindings include patch · b7b69fb8
      由 Maxime Ripard 提交于 
      The clock and reset bindings are going through different trees, and while
the patch doesn't contain any value defined in that header, it still
includes those files and result in a build breakage when building the DT
without the matching clock and reset patches applied.
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
      b7b69fb8
  9. 18 12月, 2018 1 次提交
  11. 16 12月, 2018 3 次提交
  13. 14 12月, 2018 4 次提交
  15. 13 12月, 2018 1 次提交
    • T
      ARM: dts: Fix wrong address for omap5 sata phy · b8222335
      由 Tony Lindgren 提交于 
      Looks like I missed converting the omap5 sata phy addresses to use offset
from the module base instead of full physical address.

While at it, we can also more it to be a direct child of the interconnect
target module, it is not really a child of the ocp2scp control device.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      b8222335
  17. 12 12月, 2018 1 次提交
  19. 11 12月, 2018 3 次提交
  21. 10 12月, 2018 17 次提交