Commit be020f86, "ARM: entry: abort-macro: specify registers to be
used for macros", while replacing register numbers with macro parameter
names, mismatched the name used for r1. For me, this resulted in user
space built for EABI with -march=armv4t -mtune=arm920t -mthumb-interwork
-mthumb broken on my OMAP1510 based Amstrad Delta (old ABI and no thumb
still worked for me though).

Fix this by using correct parameter name fsr instead of mismatched psr,
used by callers for another purpose.
Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fighting unfixed U-Boots and other beasts that may the cache in
a locked-down state when starting the kernel, we make sure to
disable all cache lock-down when initializing the l2x0 so we
are in a known state.

Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Adrian Bunk <adrian.bunk@movial.com>
Cc: Rob Herring <robherring2@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reported-by: NJan Rinze <janrinze@gmail.com>
Tested-by: NRobert Marklund <robert.marklund@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

I was intrigued by the fact that the clock stood still on
the Integrator, but it wasn't strange at all, because the
timer was set up all wrong and probably has been for a
while. With this patch the clock starts ticking again:
make the timer periodic (reload), |= on the divisor bit
and load the timer before starting it.

Cc: stable@kernel.org
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The link status code operates from a timer, and writes the index
register without first taking a lock.  A well-placed interrupt
between writing the index register and reading the data register
could change the index register on us, which will return wrong data.
Add the necessary lock.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When ARCH_HAS_HOLES_MEMORYMODEL is selected, pfn_valid calls
memblock_is_memory to test validity of a pfn:

> memblock_is_memory(pfn << PAGE_SHIFT);

On LPAE systems this cuts off the top bits, as the shift occurs before
the value is promoted to a phys_addr_t.

This patch replaces the shift with a call to __pfn_to_phys (which casts
pfn to phys_addr_t before shifting), preventing the loss of significant
bits.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc64: Only Panther cheetah+ chips have POPC.

* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm/radeon/kms: add s/r quirk for Compaq Presario V5245EU
  drm/radeon/kms: evergreen & ni reset SPI block on CP resume
  drm: Fix the number of connector and encoder to cleanup functions

If there are no builtin users of find_next_bit_le() and
find_next_zero_bit_le(), these functions are not present in the kernel
image, causing m68k allmodconfig to fail with:

  ERROR: "find_next_zero_bit_le" [fs/ufs/ufs.ko] undefined!
  ERROR: "find_next_bit_le" [fs/udf/udf.ko] undefined!
  ...

This started to happen after commit 171d809d ("m68k: merge mmu and
non-mmu bitops.h"), as m68k had its own inline versions before.

commit 63e424c8 ("arch: remove CONFIG_GENERIC_FIND_{NEXT_BIT,
BIT_LE, LAST_BIT}") added find_last_bit.o to obj-y (so it's always
included), but find_next_bit.o to lib-y (so it gets removed by the
linker if there are no builtin users).
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Cc: Greg Ungerer <gerg@uclinux.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fixes resume on Compaq Presario V5245EU.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=41642Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function

Signed-off-by: Jerome Glisse <jglisse@redhat.com
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: pm: avoid writing the auxillary control register for ARMv7
  ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness
  ARM: pm: arm920/926: fix number of registers saved
  ARM: pm: CPU specific code should not overwrite r1 (v:p offset)
  ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMU
  ARM: 7065/1: kexec: ensure new kernel is entered in ARM state
  ARM: 7003/1: vexpress: Add clock definition for the SP805.
  ARM: 7051/1: cpuimx* boards: fix mach-types errors
  ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDER
  ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
  ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.
  ARM: 6967/1: ep93xx: ts72xx: fix board model detection
  ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boards
  ARM: cache: detect VIPT aliasing I-cache on ARMv6
  ARM: twd: register clockevents device before enabling PPI
  ARM: realview: ensure visibility of writes during reset
  ARM: perf: make name of arm_pmu_type consistent
  ARM: perf: fix prototype of release_pmu
  ARM: fix perf build with uclibc toolchains

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
  ARM: mach-footbridge: add missing header file <video/vga.h>
  ARM: mach-orion5x: add missing header file <linux/vga.h>
  arm: fix compile failure in orion5x/dns323-setup.c
  at91: at91sam9261.c: fix typo in t2_clk alias for atmel_tcb.0
  ARM: S5P: fix bug in spdif_clk_get_rate
  ARM: EXYNOS4: Add restart hook for proper reboot
  ARM: EXYNOS4: Increase reset delay for USB HOST PHY
  ARM: S5P: add required chained_irq_enter/exit to gpio-int code
  ARM: EXYNOS4: add required chained_irq_enter/exit to eint code
  ARM: SAMSUNG: Add chained enrty/exit call to timer interrupt handler
  ARM: S3C64XX: Fix build break in PM debug
  ARM: S5PV210: Fix build warning
  ARM: EXYNOS4: Fix the IRQ definitions for MIPI CSIS device
  ARM: EXYNOS4: remove duplicated inclusion
  ARM: EXYNOS4: Fix wrong devname to support clkdev
  ARM: EXYNOS4: Use the correct regulator names on universal_c210
  ARM: SAMSUNG: Fix Section mismatch in samsung_bl_set()
  ARM: S5P64X0: Replace irq_gc_ack() with irq_gc_ack_set_bit()

These were missed in commit f5b94099 "All Arch: remove linkage
for sys_nfsservctl system call" due to them having no sys_ prefix
(presumably).

Cc: NeilBrown <neilb@suse.de>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-parisc@vger.kernel.org
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Acked-by: NJames Bottomley <James.Bottomley@hansenpartnership.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (42 commits)
  netpoll: fix incorrect access to skb data in __netpoll_rx
  cassini: init before use in cas_interruptN.
  can: ti_hecc: Fix uninitialized spinlock in probe
  can: ti_hecc: Fix unintialized variable
  net: sh_eth: fix the compile error
  net/phy: fix DP83865 phy interrupt handler
  sendmmsg/sendmsg: fix unsafe user pointer access
  ibmveth: Fix leak when recycling skb and hypervisor returns error
  arp: fix rcu lockdep splat in arp_process()
  bridge: fix a possible use after free
  bridge: Pseudo-header required for the checksum of ICMPv6
  mcast: Fix source address selection for multicast listener report
  MAINTAINERS: Update GIT trees for network development
  ath9k: Fix PS wrappers in ath9k_set_coverage_class
  carl9170: Fix mismatch in carl9170_op_set_key mutex lock-unlock
  wl12xx: add max_sched_scan_ssids value to the hw description
  wl12xx: Fix validation of pm_runtime_get_sync return value
  wl12xx: Remove obsolete testmode NVS push command
  bcma: add uevent to the bus, to autoload drivers
  ath9k_hw: Fix STA (AR9485) bringup issue due to incorrect MAC address
  ...

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc32,sun4d: Change IPI IRQ level to prevent collision between IPI and timer interrupt
  sparc: Remove another reference to nfsservctl

Merge branch 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x

* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x:
  ARM: mach-shmobile: sh7372 CMT3 and CMT4 clock support
  ARM: mach-shmobile: sh7372 MSIOF clock support
  ARM: mach-shmobile: clock-sh7372: fixup USB-DMAC1 settings
  ARM: mach-shmobile: clock-sh73a0: tidyup CKSCR main clock selecter
  ARM: mach-shmobile: Remove 3DG/SGX from sh7372 INTCS
  ARM: mach-shmobile: mackerel: Add USB-DMA ID
  mmc: sdhi, mmcif: zboot: Correct clock disable logic
  ARM: mach-shmobile: ag5evm: SDHI requires waiting for idle
  ARM: static should be at beginning of declaration
  ARM: mach-shmobile: Use CMT2 for timer on sh7372
  ARM: mach-shmobile: sh7372: Add USB-DMAC support

* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x:
  sh: fix the compile error in setup-sh7757.c
  serial: sh-sci: report CTS as active for get_mctrl
  sh: Add unaligned memory access for PC relative intructions
  sh: Fix unaligned memory access for branches without delay slots
  sh: Fix up fallout from cpuidle changes.
  serial: sh-sci: console Runtime PM support
  sh: Fix conflicting definitions of ptrace_triggered
  serial: sh-sci: fix DMA build by including dma-mapping.h
  serial: sh-sci: Fix up default regtype probing.
  sh: intc: enable both edges GPIO interrupts on sh7372
  shwdt: fix usage of mod_timer
  clocksource: sh_cmt: wait for CMCNT on init V2

As Paul has not much time for it I take over maintaining the
framebuffer subsystem.
Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

On Sun4d systems running in SMP mode, IRQ 14 is used for timer interrupts
and has a specialized interrupt handler. IPI is currently set to use IRQ 14
as well, which causes it to trigger the timer interrupt handler, and not the
IPI interrupt handler.

The IPI interrupt is therefore changed to IRQ 13, which is the highest
normally handled interrupt. This IRQ is also used for SBUS interrupts,
however there is nothing in the IPI/SBUS interrupt handlers that indicate
that they will not handle sharing the interrupt.
(IRQ 13 is indicated as audio interrupt, which is unlikely to be found in a
sun4d system)
Signed-off-by: NKjetil Oftedal <oftedal@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

It is left out the code to decrease the number of connector and encoder
to the cleanup functions.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Add clock control support for sh7372 CMT hardware blocks.

No upstream sh7372 boards are making use of CMT3 + CMT4,
but the sh7372 hardware happens to come out of reset with
all CMT MSTP clocks _enabled_, so to save power we need
to implement a fix in software to shut down unused clocks.

This patch relies on the recently merged

 794d78fe drivers: sh: late disabling of clocks V2

to make sure the unused clocks get disabled as expected.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add clock control support for sh7372 MSIOF hardware blocks.

No upstream sh7372 boards are making use of MSIOF0->2,
but the sh7372 hardware happens to come out of reset with
all MSIOF MSTP clocks _enabled_, so to save power we need
to implement a fix in software to shut down unused clocks.

This patch relies on the recently merged

 794d78fe drivers: sh: late disabling of clocks V2

to make sure the unused clocks get disabled as expected.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

USB-DMAC1 needs SMSTPCR4/MSTP407 controls, not MSTP214
this patch tested on mackerel board
Reported-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

MAINCKSEL is [29:28], not [27:24]
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch removes support for the SGX interrupt source in
the sh7372 INTCS controller.

The SGX hardware block included in sh7372 is already hooked
up to the ARM Cortex-A8 core using the INTCA controller,
so SGX users are encouraged to make use of that interrupt
source instead.

Removing support for the SGX interrupt source in INTCS
simplifies the sh7372 power management code by allowing
us to assume that only INTCA needs to be powered on to
operate the SGX hardware.

If the INTCS interrupt source would be kept then the kernel
would be forced to deal with additional dependencies that does
not follow the regular power domain hiearachy. With this
patch in place we can safely power down INTCS while the
SGX is operating.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Fix the following build errors:

  CC      arch/sh/kernel/cpu/sh4a/setup-sh7757.o
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: implicit declaration of function ‘DMA_BIT_MASK’
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: initializer element is not constant
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: (near initialization for ‘usb_ehci_device.dev.coherent_dma_mask’)
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:705: error: initializer element is not constant
arch/sh/kernel/cpu/sh4a/setup-sh7757.c:705: error: (near initialization for ‘usb_ohci_device.dev.coherent_dma_mask’)
make[3]: *** [arch/sh/kernel/cpu/sh4a/setup-sh7757.o] Error 1
Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

sh-sci.c sets hardware up and then let the HW do all flow controls.
There is no software code, nor needs to get/set real CTS signal.

But, when turning CRTSCTS on through termios, uart_set_termios() in
serial_core.c checks CTS, and stops TX if it is inactive at the moment.

Because sci_get_mctrl() returns a fixed value DTR|RTS|DSR but CTS,
the sequence
  open -> set CRTSCTS -> write
hit the case and stop working, no more outputs.

This patch makes sci_get_mctrl() report CTS in addition.
Signed-off-by: NTakashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds unaligned memory access support for the following instructions:
  mov.w @(disp,PC),Rn
  mov.l @(disp,PC),Rn

These instructions are often used on SH2A toolchains.
Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch just clears the return code for those cases where an
unaligned memory access occurs on branch instructions without a
delay slot.
Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

* 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  ARM: mach-shmobile: sh7372 LCDC1 suspend fix V2 (incremental)
  OMAP: omap_device: only override _noirq methods, not normal suspend/resume
  PM / Runtime: Correct documentation of pm_runtime_irq_safe()
  ARM: mach-shmobile: sh7372 LCDC1 suspend fix
  sh-sci / PM: Use power.irq_safe
  PM: Use spinlock instead of mutex in clock management functions

For ARMv7 kernels running in the non-secure world, writing to the
auxillary control register causes an abort, so we must avoid directly
writing the auxillary control register.  If the ACR has already been
reinitialized by SoC code, don't try to restore it.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add a dsb after the isb to ensure that the previous writes to the
CP15 registers take effect before we enable the MMU.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

ARM920 and ARM926 save four registers, not three.  Fix the size of
the suspend region required.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

r1 stores the v:p offset from the CPU invariant resume code, and is
expected to be preserved by the CPU specific code.  Overwriting it is
not a good idea.

We've managed to get away with it on sa1100 platforms because most
happen to have PHYS_OFFSET == PAGE_OFFSET, but that may not be the
case depending on kernel configuration.  So fix this latent bug.

This fixes xsc3 as well which was saving and restoring this register
independently.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

cpu_v7_reset disables the MMU and then branches to the provided address.
On Thumb-2 kernels, we should take care to clear the Thumb Exception
enable bit in the System Control Register, otherwise this may wreak
havok in the code to which we are branching (for example, an ARM kernel
image via kexec).
Reviewed-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Commit 540b5738 ("ARM: 6999/1: head, zImage: Always Enter the kernel in
ARM state") mandates that the kernel should be entered in ARM state.

If a Thumb-2 kernel kexecs a new kernel image, we need to ensure that
we change state when branching to the new code. This patch replaces a
mov pc, lr with a bx lr on Thumb-2 kernels so that we transition to ARM
state if need be.
Reviewed-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>