1. 16 10月, 2015 2 次提交
  2. 14 10月, 2015 1 次提交
  3. 21 8月, 2015 1 次提交
  4. 31 7月, 2015 1 次提交
  5. 30 7月, 2015 3 次提交
  6. 23 7月, 2015 6 次提交
  7. 17 7月, 2015 2 次提交
  8. 07 5月, 2015 3 次提交
  9. 28 1月, 2015 1 次提交
    • Y
      PCI: Fail MSI-X mappings if there's no space assigned to MSI-X BAR · 6a878e50
      Yijing Wang 提交于
      Unlike MSI, which is configured via registers in the MSI capability in
      Configuration Space, MSI-X is configured via tables in Memory Space.
      These MSI-X tables are mapped by a device BAR, and if no Memory Space
      has been assigned to the BAR, MSI-X cannot be used.
      
      Fail MSI-X setup if no space has been assigned for the BAR.
      
      Previously, we ioremapped the MSI-X table even if the resource hadn't been
      assigned.  In this case, the resource address is undefined (and is often
      zero), which may lead to warnings or oopses in this path:
      
        pci_enable_msix
          msix_capability_init
            msix_map_region
              ioremap_nocache
      
      The PCI core sets resource flags to zero when it can't assign space for the
      resource (see reset_resource()).  There are also some cases where it sets
      the IORESOURCE_UNSET flag, e.g., pci_reassigndev_resource_alignment(),
      pci_assign_resource(), etc.  So we must check for both cases.
      
      [bhelgaas: changelog]
      Reported-by: NZhang Jukuo <zhangjukuo@huawei.com>
      Tested-by: NZhang Jukuo <zhangjukuo@huawei.com>
      Signed-off-by: NYijing Wang <wangyijing@huawei.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      6a878e50
  10. 24 11月, 2014 2 次提交
  11. 23 11月, 2014 9 次提交
  12. 12 11月, 2014 3 次提交
  13. 07 11月, 2014 1 次提交
    • Y
      PCI/MSI: Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits · 38737d82
      Yijing Wang 提交于
      MSI-X vector Mask Bits are in MSI-X Tables in PCI memory space.  Xen PV
      guests can't write to those tables.  MSI vector Mask Bits are in PCI
      configuration space.  Xen PV guests can write to config space, but those
      writes are ignored.
      
      Commit 0e4ccb15 ("PCI: Add x86_msi.msi_mask_irq() and
      msix_mask_irq()") added a way to override default_mask_msi_irqs() and
      default_mask_msix_irqs() so they can be no-ops in Xen guests, but this is
      more complicated than necessary.
      
      Add "pci_msi_ignore_mask" in the core PCI MSI code.  If set,
      default_mask_msi_irqs() and default_mask_msix_irqs() return without doing
      anything.  This is less flexible, but much simpler.
      
      [bhelgaas: changelog]
      Signed-off-by: NYijing Wang <wangyijing@huawei.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NDavid Vrabel <david.vrabel@citrix.com>
      CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      CC: xen-devel@lists.xenproject.org
      38737d82
  14. 02 10月, 2014 5 次提交