- 20 8月, 2012 1 次提交
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由 Alex Deucher 提交于
There are systems that use ATRM, but not ATPX. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=41265 V2: fix #ifdefs as per Greg's comments V3: fix it harder Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 13 8月, 2012 3 次提交
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由 Marek Olšák 提交于
Returns a snapshot of the GPU clock counter. Needed for certain OpenGL extensions. v2: agd5f - address Jerome's comments - add function documentation Signed-off-by: NMarek Olšák <maraeo@gmail.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jerome Glisse 提交于
Virtual address need to be fenced to know when we can safely remove it. This patch also properly clear the pagetable. Previously it was serouisly broken. Kernel 3.5/3.4 need a similar patch but adapted for difference in mutex locking. v2: For to update pagetable when unbinding bo (don't bailout if bo_va->valid is true). v3: Add kernel 3.5/3.4 comment. v4: Fix compilation warnings. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Better safe than sorry. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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- 18 7月, 2012 4 次提交
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由 Alex Deucher 提交于
Add support for using memory buffers rather than scratch registers. Some rings may not be able to write to scratch registers. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Alex Deucher 提交于
Just store the index in the ring structure. Idea taken from one of Jerome's wip rptr patches. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Christian König 提交于
Const IBs are executed on the CE not the CP, so we can't fence them in the normal way. So submit them directly before the IB instead, just as the documentation says. v2: keep the extra documentation Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Otherwise we can encounter out of memory situations under extreme load. v2: add documentation for the new function Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 7月, 2012 7 次提交
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由 Christian König 提交于
Try to save whatever is on the rings when we encounter an lockup. v2: Fix spelling error. Free saved ring data if reset fails. Add documentation for the new functions. v3: Some more spelling fixes v4: It doesn't make sense to save anything if all fences are signaled Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Before emitting any indirect buffer, emit the offset of the next valid ring content if any. This allow code that want to resume ring to resume ring right after ib that caused GPU lockup. v2: use scratch registers instead of storing it into memory v3: skip over the surface sync for ni and si as well v4: use SET_CONFIG_REG instead of PACKET0 Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Just restore the page table instead. Addressing three problem with this change: 1. Calling vm_manager_suspend in the suspend path is problematic cause it wants to wait for the VM use to end, which in case of a lockup never happens. 2. In case of a locked up memory controller unbinding the VM seems to make it even more unstable, creating an unrecoverable lockup in the end. 3. If we want to backup/restore the leftover ring content we must not unbind VMs in between. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Just reinitialize the shader content on resume instead. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
The IB pool is in gart memory, so it is completely superfluous to unpin / repin it on suspend / resume. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jerome Glisse 提交于
GPU reset need to be exclusive, one happening at a time. For this add a rw semaphore so that any path that trigger GPU activities have to take the semaphore as a reader thus allowing concurency. The GPU reset path take the semaphore as a writer ensuring that no concurrent reset take place. v2: init rw semaphore Signed-off-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Instead of returning the error handle it directly and while at it fix the comments about the ring lock. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 6月, 2012 9 次提交
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由 Christian König 提交于
Try to remove or replace the cs_mutex with a vm_mutex where it is still needed. v2: fix locking order v3: rebased on drm-next Signed-off-by: NChristian König <deathsimple@vodafone.de>
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由 Christian Koenig 提交于
So we can skip the locking. Also renames sw_int to ring_int, cause that better matches its purpose. Signed-off-by: NChristian Koenig <christian.koenig@amd.com>
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由 Christian Koenig 提交于
1. It is really dangerous to have more than one spinlock protecting the same information. 2. radeon_irq_set sometimes wasn't called with lock protection, so it can happen that more than one CPU would tamper with the irq regs at the same time. 3. The pm.gui_idle variable was assuming that the 3D engine wasn't becoming idle between testing the register and setting the variable. So just remove it and test the register directly. v2: Also handle the hpd irq code the same way. v3: Rename hpd parameter for clarification. Signed-off-by: NChristian Koenig <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian Koenig 提交于
The spinlock was actually there to protect the rptr, but rptr was read outside of the locked area. Also we don't really need a spinlock here, an atomic should to quite fine since we only need to prevent it from being reentrant. v2: Keep the spinlock.... v3: Back to an atomic again after finding & fixing the real bug. Signed-off-by: NChristian Koenig <christian.koenig@amd.com>
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由 Christian Koenig 提交于
Signed-off-by: NChristian Koenig <christian.koenig@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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由 Christian König 提交于
It is a rw_semaphore now and only write locked while changing the clock. Also the lock is renamed to better reflect what it is protecting. v2: Keep the ttm_vm_ops on IGPs Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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由 Christian König 提交于
Move inter ring syncing with semaphores into the existing ring allocations, with that we need to lock the ring mutex only once. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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由 Christian König 提交于
v2: BUG_ON not matching rings. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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由 Christian König 提交于
It is completely unnecessary to create fences before they are emitted, so remove it and a bunch of checks if fences are emitted or not. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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- 05 6月, 2012 1 次提交
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由 Alex Deucher 提交于
- Properly set up the RBs - Properly set up the SPI - Properly set up gb_addr_config This should fix rendering issues on certain cards. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 02 6月, 2012 1 次提交
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由 Alex Deucher 提交于
Tiling group size is always 256bits on r6xx/r7xx/r8xx/9xx. Also fix and simplify render backend map. This now properly sets up the backend map on r6xx-9xx which should improve 3D performance. Vadim benchmarked also: Some benchmarks on juniper (5750), fullscreen 1920x1080, first result - kernel 3.4.0+ (fb21affa), second - with these patches: Lightsmark: 91 fps => 123 fps +35% Doom3: 74 fps => 101 fps +36% Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 31 5月, 2012 1 次提交
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由 Dave Airlie 提交于
This is the same as the nouveau code pretty much. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 29 5月, 2012 1 次提交
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由 Dave Airlie 提交于
Just move its only caller into the same file as it and make it static. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 22 5月, 2012 1 次提交
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由 Rafał Miłecki 提交于
This optmizes calls, registers reads and assignments. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 13 5月, 2012 2 次提交
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Reviewed-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 10 5月, 2012 9 次提交
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由 Jerome Glisse 提交于
No need to malloc it any more. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
If we don't store local data into global variables it isn't necessary to lock anything. v2: rebased on new SA interface Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
It never really belonged there in the first place. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
It isn't necessary any more and the suballocator seems to perform even better. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
Directly use the suballocator to get small chunks of memory. It's equally fast and doesn't crash when we encounter a GPU reset. v2: rebased on new SA interface. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
A startover with a new idea for a multiple ring allocator. Should perform as well as a normal ring allocator as long as only one ring does somthing, but falls back to a more complex algorithm if more complex things start to happen. We store the last allocated bo in last, we always try to allocate after the last allocated bo. Principle is that in a linear GPU ring progression was is after last is the oldest bo we allocated and thus the first one that should no longer be in use by the GPU. If it's not the case we skip over the bo after last to the closest done bo if such one exist. If none exist and we are not asked to block we report failure to allocate. If we are asked to block we wait on all the oldest fence of all rings. We just wait for any of those fence to complete. v2: We need to be able to let hole point to the list_head, otherwise try free will never free the first allocation of the list. Also stop calling radeon_fence_signalled more than necessary. v3: Don't free allocations without considering them as a hole, otherwise we might lose holes. Also return ENOMEM instead of ENOENT when running out of fences to wait for. Limit the number of holes we try for each ring to 3. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
Use one wait queue for all rings. When one ring progress, other likely does to and we are not expecting to have a lot of waiter anyway. Also add a fence_wait_any that will wait until the first fence in the fence array (one fence per ring) is signaled. This allow to wait on all rings. v2: some minor cleanups and improvements. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
Define the interface without modifying the allocation algorithm in any way. v2: rebase on top of fence new uint64 patch v3: add ring to debugfs output Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
Allocating and freeing it seperately. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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