1. 25 4月, 2019 2 次提交
    • J
      drm/bridge: dw-hdmi: fix SCDC configuration for ddc-i2c-bus · c4cba44e
      Jonas Karlman 提交于
      When ddc-i2c-bus property is used, a NULL pointer dereference is reported:
      
      [   31.041669] Unable to handle kernel NULL pointer dereference at virtual address 00000008
      [   31.041671] pgd = 4d3c16f6
      [   31.041673] [00000008] *pgd=00000000
      [   31.041678] Internal error: Oops: 5 [#1] SMP ARM
      
      [   31.041711] Hardware name: Rockchip (Device Tree)
      [   31.041718] PC is at i2c_transfer+0x8/0xe4
      [   31.041721] LR is at drm_scdc_read+0x54/0x84
      [   31.041723] pc : [<c073273c>]    lr : [<c05926c4>]    psr: 280f0013
      [   31.041725] sp : edffdad0  ip : 5ccb5511  fp : 00000058
      [   31.041727] r10: 00000780  r9 : edf91608  r8 : c11b0f48
      [   31.041728] r7 : 00000438  r6 : 00000000  r5 : 00000000  r4 : 00000000
      [   31.041730] r3 : edffdae7  r2 : 00000002  r1 : edffdaec  r0 : 00000000
      
      [   31.041908] [<c073273c>] (i2c_transfer) from [<c05926c4>] (drm_scdc_read+0x54/0x84)
      [   31.041913] [<c05926c4>] (drm_scdc_read) from [<c0592858>] (drm_scdc_set_scrambling+0x30/0xbc)
      [   31.041919] [<c0592858>] (drm_scdc_set_scrambling) from [<c05cc0f4>] (dw_hdmi_update_power+0x1440/0x1610)
      [   31.041926] [<c05cc0f4>] (dw_hdmi_update_power) from [<c05cc574>] (dw_hdmi_bridge_enable+0x2c/0x70)
      [   31.041932] [<c05cc574>] (dw_hdmi_bridge_enable) from [<c05aed48>] (drm_bridge_enable+0x24/0x34)
      [   31.041938] [<c05aed48>] (drm_bridge_enable) from [<c0591060>] (drm_atomic_helper_commit_modeset_enables+0x114/0x220)
      [   31.041943] [<c0591060>] (drm_atomic_helper_commit_modeset_enables) from [<c05c3fe0>] (rockchip_atomic_helper_commit_tail_rpm+0x28/0x64)
      
      hdmi->i2c may not be set when ddc-i2c-bus property is used in device tree.
      Fix this by using hdmi->ddc as the i2c adapter when calling drm_scdc_*().
      Also report that SCDC is not supported when there is no DDC bus.
      
      Fixes: 264fce6c ("drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling support")
      Signed-off-by: NJonas Karlman <jonas@kwiboo.se>
      Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
      Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com>
      Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/VE1PR03MB59031814B5BCAB2152923BDAAC210@VE1PR03MB5903.eurprd03.prod.outlook.com
      c4cba44e
    • T
      drm/vmwgfx: Fix dma API layer violation · 81103355
      Thomas Hellstrom 提交于
      Remove the check for IOMMU presence since it was considered a
      layer violation.
      This means we have no reliable way to destinguish between coherent
      hardware IOMMU DMA address translations and incoherent SWIOTLB DMA
      address translations, which we can't handle. So always presume the
      former. This means that if anybody forces SWIOTLB without also setting
      the vmw_force_coherent=1 vmwgfx option, driver operation will fail,
      like it will on most other graphics drivers.
      Signed-off-by: NThomas Hellstrom <thellstrom@vmware.com>
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      81103355
  2. 24 4月, 2019 6 次提交
  3. 23 4月, 2019 1 次提交
  4. 20 4月, 2019 1 次提交
  5. 18 4月, 2019 3 次提交
  6. 17 4月, 2019 1 次提交
  7. 16 4月, 2019 2 次提交
  8. 15 4月, 2019 1 次提交
    • D
      drm/amd/display: If one stream full updates, full update all planes · c238bfe0
      David Francis 提交于
      [Why]
      On some compositors, with two monitors attached, VT terminal
      switch can cause a graphical issue by the following means:
      
      There are two streams, one for each monitor. Each stream has one
      plane
      
      current state:
      	M1:S1->P1
      	M2:S2->P2
      
      The user calls for a terminal switch and a commit is made to
      change both planes to linear swizzle mode. In atomic check,
      a new dc_state is constructed with new planes on each stream
      
      new state:
      	M1:S1->P3
      	M2:S2->P4
      
      In commit tail, each stream is committed, one at a time. The first
      stream (S1) updates properly, triggerring a full update and replacing
      the state
      
      current state:
      	M1:S1->P3
      	M2:S2->P4
      
      The update for S2 comes in, but dc detects that there is no difference
      between the stream and plane in the new and current states, and so
      triggers a fast update. The fast update does not program swizzle,
      so the second monitor is corrupted
      
      [How]
      Add a flag to dc_plane_state that forces full updates
      
      When a stream undergoes a full update, set this flag on all changed
      planes, then clear it on the current stream
      
      Subsequent streams will get full updates as a result
      Signed-off-by: NDavid Francis <David.Francis@amd.com>
      Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
      Reviewed-by: NRoman Li <Roman.Li@amd.com>
      Acked-by: Bhawanpreet Lakha <Bhawanpreet Lakha@amd.com>
      Acked-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      c238bfe0
  9. 13 4月, 2019 2 次提交
  10. 12 4月, 2019 1 次提交
  11. 11 4月, 2019 9 次提交
  12. 09 4月, 2019 7 次提交
  13. 08 4月, 2019 4 次提交