1. 30 8月, 2013 1 次提交
  2. 26 5月, 2012 1 次提交
    • C
      arch/tile: support multiple huge page sizes dynamically · 621b1955
      Chris Metcalf 提交于
      This change adds support for a new "super" bit in the PTE, using the new
      arch_make_huge_pte() method.  The Tilera hypervisor sees the bit set at a
      given level of the page table and gangs together 4, 16, or 64 consecutive
      pages from that level of the hierarchy to create a larger TLB entry.
      
      One extra "super" page size can be specified at each of the three levels
      of the page table hierarchy on tilegx, using the "hugepagesz" argument
      on the boot command line.  A new hypervisor API is added to allow Linux
      to tell the hypervisor how many PTEs to gang together at each level of
      the page table.
      
      To allow pre-allocating huge pages larger than the buddy allocator can
      handle, this change modifies the Tilera bootmem support to put all of
      memory on tilegx platforms into bootmem.
      
      As part of this change I eliminate the vestigial CONFIG_HIGHPTE support,
      which never worked anyway, and eliminate the hv_page_size() API in favor
      of the standard vma_kernel_pagesize() API.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      621b1955
  3. 05 5月, 2011 1 次提交
  4. 05 6月, 2010 1 次提交