- 15 1月, 2018 1 次提交
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由 Christoph Hellwig 提交于
tile uses ZONE_DMA for allocations below 32-bits. These days we name the zone for that ZONE_DMA32, which will allow to use the dma-direct and generic swiotlb code as-is, so rename it. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NChristian König <christian.koenig@amd.com>
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- 09 9月, 2017 1 次提交
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由 Alexey Dobriyan 提交于
First, number of CPUs can't be negative number. Second, different signnnedness leads to suboptimal code in the following cases: 1) kmalloc(nr_cpu_ids * sizeof(X)); "int" has to be sign extended to size_t. 2) while (loff_t *pos < nr_cpu_ids) MOVSXD is 1 byte longed than the same MOV. Other cases exist as well. Basically compiler is told that nr_cpu_ids can't be negative which can't be deduced if it is "int". Code savings on allyesconfig kernel: -3KB add/remove: 0/0 grow/shrink: 25/264 up/down: 261/-3631 (-3370) function old new delta coretemp_cpu_online 450 512 +62 rcu_init_one 1234 1272 +38 pci_device_probe 374 399 +25 ... pgdat_reclaimable_pages 628 556 -72 select_fallback_rq 446 369 -77 task_numa_find_cpu 1923 1807 -116 Link: http://lkml.kernel.org/r/20170819114959.GA30580@avx2Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 7月, 2017 1 次提交
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由 Dan Carpenter 提交于
My static checker correctly complains that we should have a lower bound on "node" to prevent an array underflow. Fixes: 867e359b ("arch/tile: core support for Tilera 32-bit chips.") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NChris Metcalf <cmetcalf@mellanox.com>
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- 17 12月, 2016 1 次提交
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由 Chris Metcalf 提交于
The semantics of the old tile __write_once are the same as the newer generic __ro_after_init, so rename them all and get rid of the tile-specific version. This does not enable actual support for __ro_after_init, which had been dropped from the tile architecture before the initial upstreaming was done, since we had at that time switched to using 16MB huge pages to map the kernel. Signed-off-by: NChris Metcalf <cmetcalf@mellanox.com>
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- 20 5月, 2016 1 次提交
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由 Andrew Morton 提交于
Lots of code does node = next_node(node, XXX); if (node == MAX_NUMNODES) node = first_node(XXX); so create next_node_in() to do this and use it in various places. [mhocko@suse.com: use next_node_in() helper] Acked-by: NVlastimil Babka <vbabka@suse.cz> Acked-by: NMichal Hocko <mhocko@kernel.org> Signed-off-by: NMichal Hocko <mhocko@suse.com> Cc: Xishi Qiu <qiuxishi@huawei.com> Cc: Joonsoo Kim <js1304@gmail.com> Cc: David Rientjes <rientjes@google.com> Cc: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com> Cc: Laura Abbott <lauraa@codeaurora.org> Cc: Hui Zhu <zhuhui@xiaomi.com> Cc: Wang Xiaoqiang <wangxq10@lzu.edu.cn> Cc: Johannes Weiner <hannes@cmpxchg.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 1月, 2016 1 次提交
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由 Toshi Kani 提交于
Set IORESOURCE_SYSTEM_RAM in flags of resource ranges with "System RAM", "Kernel code", "Kernel data", and "Kernel bss". Note that: - IORESOURCE_SYSRAM (i.e. modifier bit) is set in flags when IORESOURCE_MEM is already set. IORESOURCE_SYSTEM_RAM is defined as (IORESOURCE_MEM|IORESOURCE_SYSRAM). - Some archs do not set 'flags' for children nodes, such as "Kernel code". This patch does not change 'flags' in this case. Signed-off-by: NToshi Kani <toshi.kani@hpe.com> Signed-off-by: NBorislav Petkov <bp@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Luis R. Rodriguez <mcgrof@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Toshi Kani <toshi.kani@hp.com> Cc: linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Cc: linux-mm <linux-mm@kvack.org> Cc: linux-parisc@vger.kernel.org Cc: linux-s390@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: sparclinux@vger.kernel.org Link: http://lkml.kernel.org/r/1453841853-11383-7-git-send-email-bp@alien8.deSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 19 1月, 2016 1 次提交
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由 Chris Metcalf 提交于
The warning occurs in setup.c, where it is known that it can't be a problem, but it's still a good idea to silence the warning. The onstack array is converted from an s32 to a u8, which still is plenty of range for the values being managed there. Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
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- 24 7月, 2015 1 次提交
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由 Chris Metcalf 提交于
We were previously using free_bootmem() and just getting lucky that nothing too bad happened. Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com> Cc: stable@vger.kernel.org
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- 11 5月, 2015 1 次提交
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由 Chris Metcalf 提交于
For some reason this was never changed to match the rest of the code where we always initialize the kernel sp 64 bytes below the top of the page. This is generally harmless, but it does mean that if you do a dump_stack() early on in kernel boot you see a bogus warning about stack overrun. Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
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- 28 4月, 2015 1 次提交
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由 Chris Metcalf 提交于
The code accidentally used cpu_isset() previously in one place (though properly node_isset() elsewhere). Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
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- 18 4月, 2015 1 次提交
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由 Chris Metcalf 提交于
The "hypervisor shared" cores are ones that the Tilera hypervisor uses to receive interrupts to manage hypervisor-owned devices. It's a bad idea to try to use those cores with nohz_full, since they will get interrupted unpredictably -- and invisibly to Linux tracing tools, since the interrupts are delivered at a higher privilege level to the Tilera hypervisor. Generate a clear warning at boot up that this doesn't end well for the nohz_full cores in question. Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
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- 05 3月, 2015 1 次提交
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由 Rusty Russell 提交于
Thanks to spatch. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Cc: Chris Metcalf <cmetcalf@ezchip.com>
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- 14 2月, 2015 1 次提交
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由 Tejun Heo 提交于
printk and friends can now format bitmaps using '%*pb[l]'. cpumask and nodemask also provide cpumask_pr_args() and nodemask_pr_args() respectively which can be used to generate the two printf arguments necessary to format the specified cpu/nodemask. Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 11 12月, 2014 2 次提交
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由 Joe Perches 提交于
Use the more common pr_warn. Coalesce formats, realign arguments. Signed-off-by: NJoe Perches <joe@perches.com> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Coalesce the formats and align arguments. Signed-off-by: NJoe Perches <joe@perches.com> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 12 11月, 2014 1 次提交
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由 Joe Perches 提交于
And other message logging neatening. Other miscellanea: o coalesce formats o realign arguments o standardize a couple of macros o use __func__ instead of embedding the function name Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 27 8月, 2014 1 次提交
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由 Christoph Lameter 提交于
__get_cpu_var() is used for multiple purposes in the kernel source. One of them is address calculation via the form &__get_cpu_var(x). This calculates the address for the instance of the percpu variable of the current processor based on an offset. Other use cases are for storing and retrieving data from the current processors percpu area. __get_cpu_var() can be used as an lvalue when writing data or on the right side of an assignment. __get_cpu_var() is defined as : #define __get_cpu_var(var) (*this_cpu_ptr(&(var))) __get_cpu_var() always only does an address determination. However, store and retrieve operations could use a segment prefix (or global register on other platforms) to avoid the address calculation. this_cpu_write() and this_cpu_read() can directly take an offset into a percpu area and use optimized assembly code to read and write per cpu variables. This patch converts __get_cpu_var into either an explicit address calculation using this_cpu_ptr() or into a use of this_cpu operations that use the offset. Thereby address calculations are avoided and less registers are used when code is generated. At the end of the patch set all uses of __get_cpu_var have been removed so the macro is removed too. The patch set includes passes over all arches as well. Once these operations are used throughout then specialized macros can be defined in non -x86 arches as well in order to optimize per cpu access by f.e. using a global register that may be set to the per cpu base. Transformations done to __get_cpu_var() 1. Determine the address of the percpu instance of the current processor. DEFINE_PER_CPU(int, y); int *x = &__get_cpu_var(y); Converts to int *x = this_cpu_ptr(&y); 2. Same as #1 but this time an array structure is involved. DEFINE_PER_CPU(int, y[20]); int *x = __get_cpu_var(y); Converts to int *x = this_cpu_ptr(y); 3. Retrieve the content of the current processors instance of a per cpu variable. DEFINE_PER_CPU(int, y); int x = __get_cpu_var(y) Converts to int x = __this_cpu_read(y); 4. Retrieve the content of a percpu struct DEFINE_PER_CPU(struct mystruct, y); struct mystruct x = __get_cpu_var(y); Converts to memcpy(&x, this_cpu_ptr(&y), sizeof(x)); 5. Assignment to a per cpu variable DEFINE_PER_CPU(int, y) __get_cpu_var(y) = x; Converts to __this_cpu_write(y, x); 6. Increment/Decrement etc of a per cpu variable DEFINE_PER_CPU(int, y); __get_cpu_var(y)++ Converts to __this_cpu_inc(y) Acked-by: NChris Metcalf <cmetcalf@tilera.com> Signed-off-by: NChristoph Lameter <cl@linux.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 29 5月, 2014 1 次提交
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由 Daniel Walter 提交于
remove obsolete calls to strict_strto* and replace them with kstrto* calls accordingly. Signed-off-by: NDaniel Walter <dwalter@google.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 03 5月, 2014 1 次提交
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由 Wang Sheng-Hui 提交于
Use macro flag BOOTMEM_DEFAULT instead of magic number 0 for reserve_bootmem. Signed-off-by: NWang Sheng-Hui <shhuiw@gmail.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 13 9月, 2013 1 次提交
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由 Chris Metcalf 提交于
A config option to allow a variant vmap() using huge pages that was never upstreamed had some bits of code related to it scattered around the tile architecture; the config option was removed downstream and this commit cleans up the scattered evidence of it from the upstream as well. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 04 9月, 2013 4 次提交
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由 Wang Sheng-Hui 提交于
Should check the return value of kzalloc first to avoid the null pointer. Then can dereference the non-null pointer to access the fields of struct resource. Signed-off-by: NWang Sheng-Hui <shhuiw@gmail.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This chip is no longer being actively developed for (it was superceded by the TILEPro64 in 2008), and in any case the existing compiler and toolchain in the community do not support it. It's unlikely that the kernel works with TILE64 at this point as the configuration has not been tested in years. The support is also awkward as it requires maintaining a significant number of ifdefs. So, just remove it altogether. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
We use virt_to_pte(NULL, va) a lot, which isn't very obvious. I added virt_to_kpte(va) as a more obvious wrapper function, that also validates the va as being a kernel adddress. And, I fixed the semantics of virt_to_pte() so that we handle the pud and pmd the same way, and we now document the fact that we handle the final pte level differently. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
The existing code relied on the hardware definition (<arch/chip.h>) to specify how much VA and PA space was available. It's convenient to allow customizing this for some configurations, so provide symbols MAX_PA_WIDTH and MAX_VA_WIDTH in <asm/page.h> that can be modified if desired. Additionally, move away from the MEM_XX_INTRPT nomenclature to define the start of various regions within the VA space. In fact the cleaner symbol is, for example, MEM_SV_START, to indicate the start of the area used for supervisor code; the actual address of the interrupt vectors is not as important, and can be changed if desired. As part of this change, convert from "intrpt1" nomenclature (which built in the old privilege-level 1 model) to a simple "intrpt". Also strip out some tilepro-specific code supporting modifying the PL the kernel could run at, since we don't actually support using different PLs in tilepro, only tilegx. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 30 8月, 2013 1 次提交
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由 Chris Metcalf 提交于
This enables support for "kexec --initrd" for tile. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 13 8月, 2013 1 次提交
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由 Chris Metcalf 提交于
This change adds support for the "memmap" boot parameter similar to what x86 provides. The tile version supports "memmap=1G$5G", for example, as a way to reserve a 1 GB range starting at PA 5GB. The memory is reserved via bootmem during startup, and we create a suitable "struct resource" marked as "Reserved" so you can see the range reported by /proc/iomem. Up to 64 such regions can currently be reserved on the boot command line. We do not support the x86 options "memmap=nn@ss" (force some memory to be available at the given address) since it's pointless to try to have Linux use memory the Tilera hypervisor hasn't given it. We do not support "memmap=nn#ss" to add an ACPI range for later processing, since we don't support ACPI. We do not support "memmap=exactmap" since we don't support reading the e820 information from the BIOS like x86 does. I did add support for "memmap=nn" (and the synonym "mem=nn") which cap the highest PA value at "nn"; these are both just a synonym for the existing tile boot option "maxmem". Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 06 8月, 2013 1 次提交
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由 Chris Metcalf 提交于
Fix a bug in the tilepro PCI resource allocation code that could make the bootmem allocator unhappy if 4GB is installed on mshim 0. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 15 7月, 2013 1 次提交
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由 Paul Gortmaker 提交于
The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) are flagged as __cpuinit -- so if we remove the __cpuinit from arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. This removes all the arch/tile uses of the __cpuinit macros from all C files. Currently tile does not have any __CPUINIT used in assembly files. [1] https://lkml.org/lkml/2013/5/20/589 Cc: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 04 7月, 2013 2 次提交
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由 Jiang Liu 提交于
Prepare for removing num_physpages and simplify mem_init(). Signed-off-by: NJiang Liu <jiang.liu@huawei.com> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Wen Congyang <wency@cn.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Jiang Liu 提交于
Normalize global variables exported by vmlinux.lds to conform usage guidelines from include/asm-generic/sections.h. 1) Use _text to mark the start of the kernel image including the head text, and _stext to mark the start of the .text section. 2) Export mandatory global variables __init_begin and __init_end. Signed-off-by: NJiang Liu <jiang.liu@huawei.com> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Wen Congyang <wency@cn.fujitsu.com> Cc: David Howells <dhowells@redhat.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 3月, 2013 1 次提交
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由 Chris Metcalf 提交于
The current Tilera boot infrastructure now provides the initramfs to Linux as a Tilera-hypervisor file named "initramfs", rather than "initramfs.cpio.gz", as before. (This makes it reasonable to use other compression techniques than gzip on the file without having to worry about the name causing confusion.) Adapt to use the new name, but also fall back to checking for the old name. Cc'ing to stable so that older kernels will remain compatible with newer Tilera boot infrastructure. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com> Cc: stable@vger.kernel.org
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- 05 2月, 2013 1 次提交
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由 Chris Metcalf 提交于
This avoids a link-time failure when building allyesconfig. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 19 7月, 2012 4 次提交
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由 Chris Metcalf 提交于
Reviewed-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This change uses the TRIO IOMMU to map the PCI DMA space and physical memory at different addresses. We also now use the dma_mapping_ops to provide support for non-PCI DMA, PCIe DMA (64-bit) and legacy PCI DMA (32-bit). We use the kernel's software I/O TLB framework (i.e. bounce buffers) for the legacy 32-bit PCI device support since there are a limited number of TLB entries in the IOMMU and it is non-trivial to handle indexing, searching, matching, etc. For 32-bit devices the performance impact of bounce buffers should not be a concern. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This is required for PCI root complex legacy support and USB OHCI root complex support. With this change tilegx now supports allocating memory whose PA fits in 32 bits. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This change implements PCIe root complex support for tilegx using the kernel support layer for accessing the TRIO hardware shim. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3] Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 06 6月, 2012 1 次提交
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由 Chris Metcalf 提交于
Some code was moved from init_task.c to setup.c but the appropriate header needed to be moved as well. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 26 5月, 2012 2 次提交
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由 Chris Metcalf 提交于
This change adds support for a new "super" bit in the PTE, using the new arch_make_huge_pte() method. The Tilera hypervisor sees the bit set at a given level of the page table and gangs together 4, 16, or 64 consecutive pages from that level of the hierarchy to create a larger TLB entry. One extra "super" page size can be specified at each of the three levels of the page table hierarchy on tilegx, using the "hugepagesz" argument on the boot command line. A new hypervisor API is added to allow Linux to tell the hypervisor how many PTEs to gang together at each level of the page table. To allow pre-allocating huge pages larger than the buddy allocator can handle, this change modifies the Tilera bootmem support to put all of memory on tilegx platforms into bootmem. As part of this change I eliminate the vestigial CONFIG_HIGHPTE support, which never worked anyway, and eliminate the hv_page_size() API in favor of the standard vma_kernel_pagesize() API. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This change introduces new flags for the hv_install_context() API that passes a page table pointer to the hypervisor. Clients can explicitly request 4K, 16K, or 64K small pages when they install a new context. In practice, the page size is fixed at kernel compile time and the same size is always requested every time a new page table is installed. The <hv/hypervisor.h> header changes so that it provides more abstract macros for managing "page" things like PFNs and page tables. For example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old HV_PAGE_SIZE_SMALL. The various PFN routines have been eliminated and only PA- or PTFN-based ones remain (since PTFNs are always expressed in fixed 2KB "page" size). The page-table management macros are renamed with a leading underscore and take page-size arguments with the presumption that clients will use those macros in some single place to provide the "real" macros they will use themselves. I happened to notice the old hv_set_caching() API was totally broken (it assumed 4KB pages) so I changed it so it would nominally work correctly with other page sizes. Tag modules with the page size so you can't load a module built with a conflicting page size. (And add a test for SMP while we're at it.) Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 05 5月, 2012 1 次提交
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由 Thomas Gleixner 提交于
Same code. Use the generic version. The special Makefile treatment is pointless anyway as init_task.o contains only data which is handled by the linker script. So no point on being treated like head text. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/r/20120503085035.528129988@linutronix.de
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