1. 26 5月, 2012 1 次提交
    • C
      arch/tile: Allow tilegx to build with either 16K or 64K page size · d5d14ed6
      Chris Metcalf 提交于
      This change introduces new flags for the hv_install_context()
      API that passes a page table pointer to the hypervisor.  Clients
      can explicitly request 4K, 16K, or 64K small pages when they
      install a new context.  In practice, the page size is fixed at
      kernel compile time and the same size is always requested every
      time a new page table is installed.
      
      The <hv/hypervisor.h> header changes so that it provides more abstract
      macros for managing "page" things like PFNs and page tables.  For
      example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old
      HV_PAGE_SIZE_SMALL.  The various PFN routines have been eliminated and
      only PA- or PTFN-based ones remain (since PTFNs are always expressed
      in fixed 2KB "page" size).  The page-table management macros are
      renamed with a leading underscore and take page-size arguments with
      the presumption that clients will use those macros in some single
      place to provide the "real" macros they will use themselves.
      
      I happened to notice the old hv_set_caching() API was totally broken
      (it assumed 4KB pages) so I changed it so it would nominally work
      correctly with other page sizes.
      
      Tag modules with the page size so you can't load a module built with
      a conflicting page size.  (And add a test for SMP while we're at it.)
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      d5d14ed6
  2. 31 3月, 2011 1 次提交
  3. 25 11月, 2010 1 次提交
    • C
      drivers/net/tile/: on-chip network drivers for the tile architecture · e5a06939
      Chris Metcalf 提交于
      This change adds the first network driver for the tile architecture,
      supporting the on-chip XGBE and GBE shims.
      
      The infrastructure is present for the TILE-Gx networking drivers (another
      three source files in the new directory) but for now the the actual
      tilegx sources are waiting on releasing hardware to initial customers.
      
      Note that arch/tile/include/hv/* are "upstream" headers from the
      Tilera hypervisor and will probably benefit less from LKML review.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      e5a06939