- 19 1月, 2016 1 次提交
-
-
由 Chris Metcalf 提交于
Missing parentheses could cause an argument of the form "integer + pointer" to get cast to "(long)integer + pointer" and remain a pointer type, causing compiler warnings. Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
-
- 29 7月, 2015 1 次提交
-
-
由 Luis R. Rodriguez 提交于
This adds ioremap_uc() only for architectures that do not include asm-generic.h/io.h as that already provides a default definition for them for both cases where you have CONFIG_MMU and you do not, and because of this, the number of architectures this patch address is less than the architectures that the ioremap_wt() patch addressed, "arch/*/io.h: Add ioremap_wt() to all architectures"). In order to reduce the number of architectures we have to modify by adding new architecture IO APIs we'll have to review the architectures in this patch, see why they can't add asm-generic.h/io.h or issues that would be created by doing so and then spread a consistent inclusion of this header towards the end of their own header. For instance arch/metag includes the asm-generic/io.h *before* the ioremap*() definitions, this should be the other way around but only once we have guard wrappers for the non-MMU case also for asm-generic/io.h. Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NLuis R. Rodriguez <mcgrof@suse.com> Cc: Abhilash Kesavan <a.kesavan@samsung.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Borislav Petkov <bp@suse.de> Cc: Chris Metcalf <cmetcalf@ezchip.com> Cc: David Howells <dhowells@redhat.com> Cc: Fengguang Wu <fengguang.wu@intel.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Cc: Kyle McMartin <kyle@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rob Herring <robh@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Toshi Kani <toshi.kani@hp.com> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-am33-list@redhat.com Cc: linux-arch@vger.kernel.org Cc: linux-m68k@lists.linux-m68k.org Cc: linux-sh@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/20150728181713.GB30479@wotan.suse.deSigned-off-by: NIngo Molnar <mingo@kernel.org>
-
- 07 6月, 2015 2 次提交
-
-
由 Toshi Kani 提交于
Replace all calls to ioremap_writethrough() with ioremap_wt(). Remove ioremap_writethrough() too. Signed-off-by: NToshi Kani <toshi.kani@hp.com> Signed-off-by: NBorislav Petkov <bp@suse.de> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Elliott@hp.com Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Luis R. Rodriguez <mcgrof@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: arnd@arndb.de Cc: hch@lst.de Cc: hmh@hmh.eng.br Cc: jgross@suse.com Cc: konrad.wilk@oracle.com Cc: linux-mm <linux-mm@kvack.org> Cc: linux-nvdimm@lists.01.org Cc: stefan.bader@canonical.com Cc: yigal@plexistor.com Link: http://lkml.kernel.org/r/1433436928-31903-10-git-send-email-bp@alien8.deSigned-off-by: NIngo Molnar <mingo@kernel.org>
-
由 Toshi Kani 提交于
Add ioremap_wt() to all arch-specific asm/io.h headers which define ioremap_wc() locally. These headers do not include <asm-generic/iomap.h>. Some of them include <asm-generic/io.h>, but ioremap_wt() is defined for consistency since they define all ioremap_xxx locally. In all architectures without Write-Through support, ioremap_wt() is defined indentical to ioremap_nocache(). frv and m68k already have ioremap_writethrough(). On those we add ioremap_wt() indetical to ioremap_writethrough() and defines ARCH_HAS_IOREMAP_WT in both architectures. The ioremap_wt() interface is exported to drivers. Signed-off-by: NToshi Kani <toshi.kani@hp.com> Signed-off-by: NBorislav Petkov <bp@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Elliott@hp.com Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Luis R. Rodriguez <mcgrof@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: arnd@arndb.de Cc: hch@lst.de Cc: hmh@hmh.eng.br Cc: jgross@suse.com Cc: konrad.wilk@oracle.com Cc: linux-mm <linux-mm@kvack.org> Cc: linux-nvdimm@lists.01.org Cc: stefan.bader@canonical.com Cc: yigal@plexistor.com Link: http://lkml.kernel.org/r/1433436928-31903-9-git-send-email-bp@alien8.deSigned-off-by: NIngo Molnar <mingo@kernel.org>
-
- 12 11月, 2014 1 次提交
-
-
由 Joe Perches 提交于
And other message logging neatening. Other miscellanea: o coalesce formats o realign arguments o standardize a couple of macros o use __func__ instead of embedding the function name Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 21 10月, 2014 1 次提交
-
-
由 Will Deacon 提交于
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the write accessors to tile, in the same vein as the dummy definitions for the relaxed read accessors. Acked-by: NChris Metcalf <cmetcalf@tilera.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
-
- 30 8月, 2013 1 次提交
-
-
由 Chris Metcalf 提交于
Normally the build doesn't include these warnings, but at one point I built with -Wsign-compare, and noticed a few things that are technically bugs. This change fixes those things. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 07 8月, 2013 1 次提交
-
-
由 Chris Metcalf 提交于
To enable this functionality, configure CONFIG_TILE_PCI_IO. Without this flag, the kernel still assigns I/O address ranges to the devices, but no TRIO resource and mapping support is provided. We assign disjoint I/O address ranges to separate PCIe domains. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 09 2月, 2013 1 次提交
-
-
由 Chris Metcalf 提交于
On tilepro without CONFIG_PCI, we can't provide inlines of these functions, as we don't have readl/writel. In addition, fix memset_io() signature to take a volatile void *. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 12 7月, 2012 1 次提交
-
-
由 Chris Metcalf 提交于
Add support for MMIO read/write on tilegx to support GXIO IORPC access. Similar to the asm-generic version, but we include memory fences on the writes to be conservative. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 04 12月, 2011 1 次提交
-
-
由 Michael S. Tsirkin 提交于
I think panic on iomap is there just for debugging. If we return NULL instead, the generic pci_iomap will DTRT so we don't need to roll our own. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
-
- 05 5月, 2011 1 次提交
-
-
由 Chris Metcalf 提交于
This change adds a number of missing headers in asm (fb.h, parport.h, serial.h, and vga.h) using the minimal generic versions. It also adds a number of missing interfaces that showed up as build failures when trying to build various drivers not normally included in the "tile" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(), virt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(), and __pmd(). I also added a cast in virt_to_page() since not all callers pass a pointer. I fixed <asm/stat.h> to properly include a __KERNEL__ guard for the __ARCH_WANT_STAT64 symbol, and <asm/swab.h> to use __builtin_bswap32() even for our 64-bit architecture, since the same code is produced. I added an export for get_cycles(), since it's used in some modules. And I made <arch/spr_def.h> properly include the __KERNEL__ guard, even though it's not yet exported, since it likely will be soon. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 25 11月, 2010 1 次提交
-
-
由 Chris Metcalf 提交于
This change enables PCI root complex support for TILEPro. Unlike TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI support consists of hypervisor upcalls for PIO, DMA, etc. However, the performance is fine for the devices we have tested with so far (1Gb Ethernet, SATA, etc.). The <asm/io.h> header was tweaked to be a little bit more aggressive about disabling attempts to map/unmap IO port space. The hacky <asm/pci-bridge.h> header was rolled into the <asm/pci.h> header and the result was simplified. Both of the latter two headers were preliminary versions not meant for release before now - oh well. There is one quirk for our TILEmpower platform, which accidentally negotiates up to 5GT and needs to be kicked down to 2.5GT. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 15 9月, 2010 1 次提交
-
-
由 Chris Metcalf 提交于
This tripped up a driver (not yet committed to git). Fix it now. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
-
- 05 6月, 2010 1 次提交
-
-
由 Chris Metcalf 提交于
This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: NPaul Mundt <lethal@linux-sh.org>
-