Some HW blocks have errata which requires specific slave idle mode
under certain conditions.

This patch adds an hwmod API to allow setting slave idlemode
ensuring that any SYSCONFIG register updates go through hwmod.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

First, this patch adds new worst-case latency values to the
omap_device_pm_latency struct.  Here the worst-case measured latencies
for the activate and deactivate hooks are stored.

In addition, add an option to auto-adjust the latency values used for
device activate/deactivate.

By setting a new 'OMAP_DEVICE_LATENCY_AUTO_ADJUST' flag in the
omap_device_pm_latency struct, the omap_device layer automatically
adjusts the activate/deactivate latencies to the worst-case measured
values.

Anytime a new worst-case value is found, it is printed to the console.
Here is an example log during boot using UART2 s an example.  After
boot, the OPP is manually changed to the 125MHz OPP:

[...]
Freeing init memory: 128K
omap_device: serial8250.2: new worst case deactivate latency 0: 30517
omap_device: serial8250.2: new worst case activate latency 0: 30517
omap_device: serial8250.2: new worst case activate latency 0: 218139648
omap_device: serial8250.2: new worst case deactivate latency 0: 61035
omap_device: serial8250.2: new worst case activate latency 0: 278076171
omap_device: serial8250.2: new worst case activate latency 0: 298614501
omap_device: serial8250.2: new worst case activate latency 0: 327331542

/ # echo 125000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

omap_device: serial8250.2: new worst case deactivate latency 0: 91552

Motivation: this can be used as a technique to automatically determine
the worst case latency values.  The current method of printing a
warning on every violation is too noisy to actually interact the
console in order to set low OPP to discover latencies.

Another motivation for this patch is that the activate/deactivate
latenices can vary depending on the idlemode of the device.  While
working on the UARTs, I noticed that when using no-idle, the activate
latencies were as high as several hundred msecs as shown above.  When
the UARTs are in smart-idle, the max latency is well under 100 usecs.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch only affects documentation; no functional changes are
included.

Clean up comments in the current clockdomain, powerdomain code and
header files.  This mostly involves conversion to kerneldoc format,
although some clarifications are also included.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Nothing calls pwrdm_clk_state_switch(), and the function that seems to be
its ideal use case calls pwrdm_clkdm_state_switch(clk->clkdm), so remove it.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

This patch rearranges the order of structure members in struct powerdomain
to avoid wasting memory due to alignment restrictions.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Replace some bare constants with symbolic constants.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

Add usecounting for wakeup and sleep dependencies.  In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.

Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow.  pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code.  This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.

N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched.  This has been tested by Kevin and confirmed to work.

The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences.  This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>

OMAP clockdomains and powerdomains are currently defined statically,
only registered at boot, and never unregistered, so we can remove the
unregister function and the locking.   A variant of this was originally
suggested a while ago by Dmitry Baryshkov <dbaryshkov@gmail.com>.
This version of this patch contains an additional fix from Kevin Hilman
<khilman@deeprootsystems.com> to address one of the pwrdm_for_each_nolock()
users in mach-omap2/pm-debug.c.   Thanks Kevin.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Dmitry Baryshkov <dbaryshkov@gmail.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

For some reason, previously, we included the MDM clockdomain on all 24xx,
but the stacked die-on-die modem configuration (chassis mode) is only
available on OMAP2430.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Previously some of the clockdomain wakeup/sleep dependency structures
were shared between several domains.  For the subsequent wakeup and sleep
dependency usecounting patch to work, these can no longer be
shared.  This patch splits the shared structures apart.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Move clockdomain wakeup dependency and sleep dependency data
structures from the powerdomain layer to the clockdomain layer, where
they belong.  These dependencies were originally placed in the
powerdomain layer due to unclear documentation; however, it is clear
now that these dependencies are between clockdomains.  For OMAP2/3,
this is not such a big problem, but for OMAP4 this needs to be fixed.

Thanks to Benoît Cousson <b-cousson@ti.com> for his advice on this
patch.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>

One of the clock domains was missing from the auto-generated file.
It has been added here.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The clockdomain related code being in place, it is not necessary to have
some part of the clock code commented out. This would help the validation of
the clockdomain functions using the clock level interfaces.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The armwdt_ck clock uses a fixed divisor, so it can use the OMAP clock
fixed divisor recalculation code, rather than a custom function.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

One of the OMAP1 clocks can use the fixed divisor recalculation code
introduced in the OMAP2 clock code, so rename the
omap2_fixed_divisor_recalc() function to omap_fixed_divisor_recalc()
and make it available to all OMAPs.  A followup patch converts the OMAP1
clock.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

AM3505/17 though a OMAP3530 derivative have the following
main differences

	- Removal of the following OMAP3 modules
		- IVA
		- ISP/CAM
		- Modem and D2D components (MAD2D, SAD2D)
		- USIM
		- SSI
		- Mailboxes
		- USB OTG
		- ICR
		- MSPRO
		- SmartReflex
	- SDRC replaced with EMIF4 Controller in the SDRC subsystem
	  thus adding support for DDR2 memory devices
	- Addition of the following new modules
		- Ethernet MAC (CPGMAC)
		- CAN Controller (HECC)
		- New USB OTG Controller with integrated Phy
		- Video Processing Front End (VPFE)
		- Additional UART (UART4)
	- All security accelerators disabled on GP devices and not to
	  be accessed or configured

This patch defines CPU flags for AM3505/17 and update the clock table.
Clock support for new modules will be added by subsequent patches.
Signed-off-by: NRanjith Lohithakshan <ranjithl@ti.com>
[paul@pwsan.com: updated for 2.6.34 clock layout]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add CK_* flags for the two new Sitara chips, AM3505 and AM3517, and
the OMAP34xx die shrink, OMAP36xx/OMAP37xx.  Introduce a new CK_*
flag, CK_3XXX, that marks all clocks that are common to OMAP3 family
chips.  CK_343X now refers to clocks that are available only on
OMAP34{1,2,3,4}0 (WTBU) and OMAP35{03,15,25,30} (any version).
At some point, the RATE_IN_* flags should be updated also.

While here, add some documentation describing the chip families
covered by these clock flags.

This patch is partially based on patches from Ranjith Lohithakshan
<ranjithl@ti.com> and Vishwanath Sripathy <vishwanath.bs@ti.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Ranjith Lohithakshan <ranjithl@ti.com>
Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>

AM3517/05 has a few additional control module registers defined mainly
to control the new IP's. This patch adds support for those new registers.
Signed-off-by: NRanjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Port the APIs to support the OMAP4 clockdomain framework.
Also take care of the compiling requirements for the same.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

The introduction of the OMAP4 Clock Domain framework requires
some adaptaions to be done in the earlier files to place the
common and uncommon data in the proper places where they belong.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

The Autogenerated OMAP4 clock domain specific file
(mach-omap2/clockdomains44xx.h) is added here.  This file is
auto-generated using python scripting, and following is the lsit of
the people involved:
Benoit Cousson
Abhijit Pagare
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

Here the APIs are modified to use absolute addresses instead of module offsets.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

Here the ".clkstctrl_reg" field is added to the clockdomain stucture
as the module offsets for OMAP4 do not map one to one for powerdomains
and clockdomains as it used to for OMAP3. Hence we need to use absolute
addresses to access the control registers. Some of the clock domains have
modules falling in the address space of PRM partition. Hence  necessitating
the use of absolute adresses.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

The proper Macros have to be used for platform specific calls and
some of the compiling requirements and init calls are taken care of.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

Taking care of the platform specific and common power domains with
proper checks.  Also refining some Macros according to the latest
OMAP4 requirements.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

The Autogenerated OMAP4 power domain specific file (mach-omap2/powerdomains44xx.h)
is added here.
This file is auto-generated using python scripting and following is the list of the people
involved:
Paul Walmsley
Benoit Cousson
Abhijit Pagare
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>

Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4.
Hence we need different macros for identifying platform specific offsets.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

Some of the OMAP4 specific chip level initialisations are taken care of.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated
 to apply after the intervening cpu.h/id.c patch; thanks also to Tony
 for catching a bug in my rewrite]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (25 commits)
  OMAP2/3: DMTIMER: Clear pending interrupts when stopping a timer
  PM debug: Fix warning when no CONFIG_DEBUG_FS
  OMAP3: PM: DSS PM_WKEN to refill DMA
  OMAP: timekeeping: time should not stop during suspend
  OMAP3: PM: Force write last pad config register into save area
  OMAP: omap3_pm_get_suspend_state() error ignored in pwrdm_suspend_get()
  OMAP3: PM: Enable wake-up from McBSP2, 3 and 4 modules
  OMAP3: PM debug: fix build error when !CONFIG_DEBUG_FS
  OMAP3: PM: Removing redundant and potentially dangerous PRCM configration
  OMAP3: Fixed ARM aux ctrl register save/restore
  OMAP3: CPUidle: Fixed timer resolution
  OMAP3: PM: Remove duplicate code blocks
  OMAP3: PM: Disable interrupt controller AUTOIDLE before WFI
  OMAP3: PM: Enable system control module autoidle
  OMAP3: PM: Ack pending interrupts before entering suspend
  omap: Enable GPMC clock in gpmc_init
  OMAP1 clock: fix for "BUG: spinlock lockup on CPU#0"
  OMAP4: clocks: Fix the clksel_rate struct DPLL divs
  OMAP4: PRCM: Fix the base address for CHIRONSS reg defines
  OMAP: dma_chan[lch_head].flag & OMAP_DMA_ACTIVE tested twice in omap_dma_unlink_lch()
  ...

Merge branch 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  clockevent: Don't remove broadcast device when cpu is dead

* 'for-linus/i2c' of git://git.fluff.org/bjdooks/linux:
  i2c: imx: call ioremap only after request_mem_region
  i2c: mxc: let time to generate stop bit

* git://git.infradead.org/~dwmw2/mtd-2.6.33:
  mtd: tests: fix read, speed and stress tests on NOR flash
  mtd: Really add ARM pismo support
  kmsg_dump: Dump on crash_kexec as well

accordingly adapt order of release_mem_region and release_mem_region on
remove.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Richard Zhao <linuxzsc@gmail.com>
Cc: Darius Augulis <augulis.darius@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: linux-i2c@vger.kernel.org
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

After generating the stop bit by changing MSTA from 1 to 0,
the i2c_imx->stopped was immediatly set to 1. The second test
on i2c_imx->stopped then is correct and the controller never
waits if the bus is busy. This patch corrects this.

On mx31moboard, stop bit was not generated on single write transfers.
This was kept unnoticed as other transfers are made afterwards that
help the write recipient to resynchronize.

Thanks to Philippe and Michael for the debugging.
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Reported-by: NMichael Bonani <michael.bonani@epfl.ch>
Acked-by; Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

OMAP GP timers keep running for a few cycles after they are stopped,
which can cause the timer to expire and generate an interrupt. The
pending interrupt will prevent e.g. OMAP from entering suspend, thus
we ack it manually.  Only applicable on OMAP2/3/4.
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

* 'for-linus/samsung' of git://git.fluff.org/bjdooks/linux:
  hmt: adjust for new pwm_backlight->notify prototype

Commit cfc38999f (backlight: Pass device through notify callback)
added a struct device argument to the notify callback, but didn't
update the user of it in mach-hmt.c
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  perf: x86: Add support for the ANY bit
  perf: Change the is_software_event() definition
  perf: Honour event state for aux stream data
  perf: Fix perf_event_do_pending() fallback callsite
  perf kmem: Print usage help for unknown commands
  perf kmem: Increase "Hit" column length
  hw-breakpoints, perf: Fix broken mmiotrace due to dr6 by reference change
  perf timechart: Use tid not pid for COMM change

Merge branch 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  sched: Reassign prev and switch_count when reacquire_kernel_lock() fail
  sched: Fix vmark regression on big machines