1. 07 5月, 2019 1 次提交
  2. 22 2月, 2018 1 次提交
    • G
      nds32: Exception handling · 2923f5ea
      Greentime Hu 提交于
      This patch includes the exception/interrupt entries, pt_reg structure and
      related accessors.
      
      /* Unaligned accessing handling*/
      Andes processors cannot load/store information which is not naturally
      aligned on the bus, i.e., loading a 4 byte data whose start address must
      be divisible by 4. If unaligned data accessing is happened, data
      unaligned exception will be triggered and user will get SIGSEGV or
      kernel oops according to the unaligned address. In order to make user be
      able to load/store data from an unaligned address, software load/store
      emulation is implemented in arch/nds32/mm/alignment.c to address data
      unaligned exception.
      
      Unaligned accessing handling is disabled by default because it is not a
      normal case. User can enable this feature by following steps.
      
      A. Compile time:
          1. Enable kernel config CONFIG_ALIGNMENT_TRAP
      B. Run time:
          1. Enter /proc/sys/nds32/unaligned_acess folder
          2. Write 1 to file enable_mode to enable unaligned accessing
             handling. User can disable it by writing 0 to this file.
          3. Write 1 to file debug to show which unaligned address is under
             processing. User can disable it by writing 0 to this file.
      
      However, unaligned accessing handler cannot work if this unaligned
      address is not accessible such as protection violation. On this
      condition, the default behaviors for addressing data unaligned exception
      still happen
      Signed-off-by: NVincent Chen <vincentc@andestech.com>
      Signed-off-by: NGreentime Hu <greentime@andestech.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      2923f5ea