1. 05 9月, 2016 1 次提交
  2. 14 7月, 2016 1 次提交
  3. 09 5月, 2016 1 次提交
  4. 07 4月, 2016 1 次提交
  5. 29 12月, 2015 1 次提交
  6. 21 10月, 2015 4 次提交
  7. 04 10月, 2015 1 次提交
  8. 11 6月, 2015 2 次提交
  9. 24 4月, 2015 1 次提交
  10. 02 4月, 2015 1 次提交
  11. 31 3月, 2015 1 次提交
  12. 04 2月, 2015 1 次提交
  13. 26 8月, 2014 1 次提交
  14. 09 7月, 2014 1 次提交
  15. 04 7月, 2014 2 次提交
    • A
      iommu/amd: Add sysfs support · 066f2e98
      Alex Williamson 提交于
      AMD-Vi support for IOMMU sysfs.  This allows us to associate devices
      with a specific IOMMU device and examine the capabilities and features
      of that IOMMU.  The AMD IOMMU is hosted on and actual PCI device, so
      we make that device the parent for the IOMMU class device.  This
      initial implementaiton exposes only the capability header and extended
      features register for the IOMMU.
      
      # find /sys | grep ivhd
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:00.0
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:02.0
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:04.0
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:09.0
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:11.0
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:12.0
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:12.2
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:13.0
      ...
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/power
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/power/control
      ...
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/device
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/subsystem
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu/cap
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu/features
      /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/uevent
      /sys/class/iommu/ivhd0
      Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      066f2e98
    • A
      iommu/amd: Use iommu_group_get_for_dev() · 65d5352f
      Alex Williamson 提交于
      The common iommu_group_get_for_dev() allows us to greatly simplify
      our group lookup for a new device.  Also, since we insert IVRS
      aliases into the PCI DMA alias quirks, we should alway come up with
      the same results as the existing code.
      Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      65d5352f
  16. 24 3月, 2014 1 次提交
  17. 20 2月, 2014 1 次提交
  18. 19 6月, 2013 1 次提交
  19. 20 4月, 2013 1 次提交
  20. 02 4月, 2013 1 次提交
  21. 27 3月, 2013 2 次提交
  22. 24 10月, 2012 1 次提交
  23. 28 9月, 2012 4 次提交
  24. 18 9月, 2012 1 次提交
  25. 17 7月, 2012 2 次提交
  26. 02 7月, 2012 1 次提交
  27. 04 6月, 2012 1 次提交
    • J
      iommu/amd: Cache pdev pointer to root-bridge · c1bf94ec
      Joerg Roedel 提交于
      At some point pci_get_bus_and_slot started to enable
      interrupts. Since this function is used in the
      amd_iommu_resume path it will enable interrupts on resume
      which causes a warning. The fix will use a cached pointer
      to the root-bridge to re-enable the IOMMU in case the BIOS
      is broken.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      c1bf94ec
  28. 22 12月, 2011 1 次提交
  29. 12 12月, 2011 2 次提交