- 17 9月, 2011 2 次提交
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由 Senthil Balasubramanian 提交于
This patch adds support for AR946/8x chipets. Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Senthil Balasubramanian 提交于
Split tx/rx gain table initval hanlding part so readability is better and easy to manage the code. Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 26 8月, 2011 1 次提交
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由 Luis R. Rodriguez 提交于
Here are the AR9580 1.0 initvals checksums using the Atheros initvals-tools [1]. This is useful for when we udate the initvals again with other values. It ensures that we match the same initvals used internally. The tool is documented on the wiki [2]. $ ./initvals -f ar9580-1p0 0x00000000e912711f ar9580_1p0_modes_fast_clock 0x000000004a488fc7 ar9580_1p0_radio_postamble 0x00000000f3888b02 ar9580_1p0_baseband_core 0x0000000003f783bb ar9580_1p0_mac_postamble 0x0000000094be244a ar9580_1p0_low_ob_db_tx_gain_table 0x0000000094be244a ar9580_1p0_high_power_tx_gain_table 0x0000000090be244a ar9580_1p0_lowest_ob_db_tx_gain_table 0x00000000ed9eaac6 ar9580_1p0_baseband_core_txfir_coeff_japan_2484 0x00000000c4d66d1b ar9580_1p0_mac_core 0x00000000e8e9043a ar9580_1p0_mixed_ob_db_tx_gain_table 0x000000003521a300 ar9580_1p0_wo_xlna_rx_gain_table 0x00000000301fc841 ar9580_1p0_soc_postamble 0x00000000a9a06b3a ar9580_1p0_high_ob_db_tx_gain_table 0x00000000a15ccf1b ar9580_1p0_soc_preamble 0x0000000029495000 ar9580_1p0_rx_gain_table 0x0000000037ac0ee8 ar9580_1p0_radio_core 0x00000000603a1b80 ar9580_1p0_baseband_postamble 0x000000003d8b4396 ar9580_1p0_pcie_phy_clkreq_enable_L1 0x00000000398b4396 ar9580_1p0_pcie_phy_clkreq_disable_L1 0x00000000397b4396 ar9580_1p0_pcie_phy_pll_on_clkreq [1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git [2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool Cc: David Quan <dquan@qca.qualcomm.com> Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Tested-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 23 8月, 2011 2 次提交
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由 Stanislaw Gruszka 提交于
Move common checks into wrapper function. Since ASPM can be only enabled on PCIe devices ->is_pciexpress check is unneeded. Signed-off-by: NStanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Stanislaw Gruszka 提交于
We always call ->config_pci_powersave() with both restore and power_off arguments equal to 0 or both equal to 1, so merge them into one argument. Signed-off-by: NStanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 02 8月, 2011 1 次提交
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由 Stanislaw Gruszka 提交于
We receive many bug reports about system hang during suspend/resume when ath9k driver is in use. Adrian Chadd remarked that this problem happens on systems that have ASPM disabled. To do not hit the bug, skip doing ->config_pci_powersave magic if PCIe downstream port device, which ath9k device is connected to, has ASPM disabled. Bug was introduced by: commit 53bc7aa0 Author: Vivek Natarajan <vnatarajan@atheros.com> Date: Mon Apr 5 14:48:04 2010 +0530 ath9k: Add support for newer AR9285 chipsets. Patch should address: https://bugzilla.kernel.org/show_bug.cgi?id=37462 https://bugzilla.kernel.org/show_bug.cgi?id=37082 https://bugzilla.redhat.com/show_bug.cgi?id=697157 however I did not receive confirmation about that, except from Camilo Mesias, whose system stops hang regularly with this patch (but still hangs from time to time, but this is probably some other bug). Tested-by: NCamilo Mesias <camilo@mesias.co.uk> Cc: stable@kernel.org # 2.6.35+ Signed-off-by: NStanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 23 6月, 2011 3 次提交
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 20 5月, 2011 1 次提交
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由 Sujith Manoharan 提交于
The Times They Are a-Changin'. Signed-off-by: NSujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 26 4月, 2011 2 次提交
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 05 4月, 2011 1 次提交
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 31 3月, 2011 1 次提交
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由 Luis R. Rodriguez 提交于
Only AR9485 1.1 was sold. This debloats the driver by ~14 KiB. text data bss dec hex filename 300413 624 1056 302093 49c0d drivers/net/wireless/ath/ath9k/ath9k_hw.ko text data bss dec hex filename 310285 624 1056 311965 4c29d drivers/net/wireless/ath/ath9k/ath9k_hw-old.ko $ du -b ath9k_hw* 6210541 ath9k_hw.ko 6225089 ath9k_hw-old.ko Cc: Bill Wu <bill.wu@atheros.com> Cc: Paul Shaw <paul.shaw@atheros.com> Cc: Forbes Tsai <Forbes.Tsai@Atheros.com> Cc: Jesmine Chen <jesmine.chen@atheros.com> Cc: Marvian Chen <Hou-hua.Chen@Atheros.com> Cc: Vivek Natarajan <vivek.natarajan@atheros.com> Cc: Bernadette Yetso <bernadette.yetso@atheros.com> Cc: Sarvesh Shrivastava <sarvesh.shrivastava@atheros.com> Acked-by: NYi-Chen Su <yi-chen.su@atheros.com> Acked-by: NJeffrey Chung <jeffrey.chung@atheros.com> Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 26 2月, 2011 1 次提交
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由 Vivek Natarajan 提交于
Signed-off-by: NVivek Natarajan <vnatarajan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 19 2月, 2011 1 次提交
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由 Vivek Natarajan 提交于
Signed-off-by: NVivek Natarajan <vnatarajan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 18 1月, 2011 1 次提交
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由 Luis R. Rodriguez 提交于
There is an interoperability with AR9382/AR9380 in L1 state with a few root complexes which can cause a hang. This is fixed by setting some work around bits on the PCIE PHY. We fix by using a new ini array to modify these bits when the radio is idle. Cc: stable@kernel.org Cc: Jack Lee <jack.lee@atheros.com> Cc: Carl Huang <carl.huang@atheros.com> Cc: David Quan <david.quan@atheros.com> Cc: Nael Atallah <nael.atallah@atheros.com> Cc: Sarvesh Shrivastava <sarvesh.shrivastava@atheros.com> Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 14 12月, 2010 1 次提交
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由 Felix Fietkau 提交于
There's no need to have separate callbacks for pre-AR9003 vs AR9003 SREV version checks, so just merge those into one function. Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 08 12月, 2010 3 次提交
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Also make it a supported mac Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 16 10月, 2010 1 次提交
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由 Luis R. Rodriguez 提交于
These chipsets will not hit the market, all customers will be on >= AR9003 2.2. This shaves down the ath9k_hw size by 24161 bytes (24 KB) on my system. Before: $ size drivers/net/wireless/ath/ath9k/ath9k_hw.ko text data bss dec hex filename 292328 616 1824 294768 47f70 drivers/net/wireless/ath/ath9k/ath9k_hw.ko $ du -b drivers/net/wireless/ath/ath9k/ath9k_hw.ko 5987825 drivers/net/wireless/ath/ath9k/ath9k_hw.ko After: $ size drivers/net/wireless/ath/ath9k/ath9k_hw.ko text data bss dec hex filename 277192 616 1824 279632 44450 drivers/net/wireless/ath/ath9k/ath9k_hw.ko $ du -b drivers/net/wireless/ath/ath9k/ath9k_hw.ko 5963664 drivers/net/wireless/ath/ath9k/ath9k_hw.ko Cc: Yixiang Li <yixiang.li@atheros.com> Cc: Don Breslin <don.breslin@atheros.com> Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 07 10月, 2010 1 次提交
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由 Felix Fietkau 提交于
After the last rounds of cleanup, these functions are now functionally equivalent and can thus be merged. Also get rid of some excessive (and redundant) debug messages. Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 24 6月, 2010 4 次提交
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由 Luis R. Rodriguez 提交于
The array we use will vary depending on whether or not we are to go to lower power or not. The default values (iniPcieSerdes) are a copy or what go into the registers through the INI files. Cc: Aeolus Yang <aeolus.yang@atheros.com> Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com> Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
This can be useful during testing of new ASPM tweaks which often have to be done through the PCI Serializer-Deserializer (SERDES). Cc: Aeolus Yang <aeolus.yang@atheros.com> Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com> Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
The LowPower array writes disables the PLL when ASPM is enabled. The host driver makes quite a few calls to ath9k_hw_configpcipowersave() and these same calls also need to ensure the PLL is off when they issue it. Cc: Aeolus Yang <aeolus.yang@atheros.com> Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com> Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
The AR_WA register should not be read when in sleep state so add a variable we can stash its value into for when we need to set it. Additionally the AR_WA_D3_TO_L1_DISABLE_REAL (bit 16) needs to be removed. Cc: Aeolus Yang <aeolus.yang@atheros.com> Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com> signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 15 6月, 2010 2 次提交
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由 Luis R. Rodriguez 提交于
This adds support for ANI for AR9003. The implementation for ANI for AR9003 is slightly different than the one used for the older chipset families. It can technically be used for the older families as well but this is not yet fully tested so we only enable the new ANI for the AR5008, AR9001 and AR9002 families with a module parameter, force_new_ani. The old ANI implementation is left intact. Details of the new ANI implemention: * ANI adjustment logic is now table driven so that each ANI level setting is parameterized. This makes adjustments much more deterministic than the old procedure based logic and allows adjustments to be made incrementally to several parameters per level. * ANI register settings are now relative to INI values; so ANI param zero level == INI value. Appropriate floor and ceiling values are obeyed when adjustments are combined with INI values. * ANI processing is done once per second rather that every 100ms. The poll interval is now a set upon hardware initialization and can be picked up by the core driver. * OFDM error and CCK error processing are made in a round robin fashion rather than allowing all OFDM adjustments to be made before CCK adjustments. * ANI adjusts MRC CCK off in the presence of high CCK errors * When adjusting spur immunity (SI) and OFDM weak signal detection, ANI now sets register values for the extension channel too * When adjusting FIR step (ST), ANI now sets register for FIR step low too * FIR step adjustments now allow for an extra level of immunity for extremely noisy environments * The old Noise immunity setting (NI), which changes coarse low, size desired, etc have been removed. Changing these settings could affect up RIFS RX as well. * CCK weak signal adjustment is no longer used * ANI no longer enables phy error interrupts; in all cases phy hw counting registers are used instead * The phy error count (overflow) interrupts are also no longer used for ANI adjustments. All ANI adjustments are made via the polling routine and no adjustments are possible in the ISR context anymore * A history settings buffer is now correctly used for each channel; channel settings are initialized with the defaults but later changes are restored when returning back to that channel * When scanning, ANI is disabled settings are returned to (INI) defaults. * OFDM phy error thresholds are now 400 & 1000 (errors/second units) for low/high water marks, providing increased stability/hysteresis when changing levels. * Similarly CCK phy error thresholds are now 300 & 600 (errors/second) Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
The AR9003 hardware family will use a slightly modified ANI implementation which has not yet been tested on the other hardware families. To allow for this new ANI implementation a few ANI calls need to be abstracted away. This patch just allows for each hardware family to declare their own ANI ops and annotates the current ANI implementation as old. Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 03 6月, 2010 2 次提交
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由 Luis R. Rodriguez 提交于
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
The checksums of the initvals are: initvals -f ar9003-2p2 0x00000000c2bfa7d5 ar9300_2p2_radio_postamble 0x00000000ada2b114 ar9300Modes_lowest_ob_db_tx_gain_table_2p2 0x00000000e0bc2c84 ar9300Modes_fast_clock_2p2 0x00000000056eaf74 ar9300_2p2_radio_core 0x0000000000000000 ar9300Common_rx_gain_table_merlin_2p2 0x0000000078658fb5 ar9300_2p2_mac_postamble 0x0000000023235333 ar9300_2p2_soc_postamble 0x0000000054d41904 ar9200_merlin_2p2_radio_core 0x000000008475a084 ar9300_2p2_baseband_postamble 0x000000009aaafd90 ar9300_2p2_baseband_core 0x000000003df9a326 ar9300Modes_high_power_tx_gain_table_2p2 0x000000001cfba124 ar9300Modes_high_ob_db_tx_gain_table_2p2 0x0000000011302700 ar9300Common_rx_gain_table_2p2 0x00000000a9a2b114 ar9300Modes_low_ob_db_tx_gain_table_2p2 0x00000000a9d66d40 ar9300_2p2_mac_core 0x000000001e1d0800 ar9300Common_wo_xlna_rx_gain_table_2p2 0x00000000a0c531c8 ar9300_2p2_soc_preamble 0x00000000292e2544 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2 0x000000002d3e2544 ar9300PciePhy_clkreq_enable_L1_2p2 0x00000000293e2544 ar9300PciePhy_clkreq_disable_L1_2p2 Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 17 4月, 2010 4 次提交
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由 Luis R. Rodriguez 提交于
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
This is done depending on what the EEPROM settings indicates. Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
The AR9003 TX/RX gain is currently initialized with the other components, so for now AR9003 does not implment this callback, after hardware bring up we can test moving the TX/RX gain there as well and if it works well move them to its own callback as well. Since all INI stuff is now moved out hw.c no longer needs to include and touch any original INI headers/structs. Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Luis R. Rodriguez 提交于
Move out the generic hardware family code out into their own files, we have one for AR5008, AR9001, and AR9002 family (ar9002_hw.c) and another file for the new AR9003 hardware family (ar9003_hw.c). Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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