The SDHCI interface is not PCI specific, yet the Linux driver was
intimitely connected to the PCI bus. This patch properly separates
the PCI specific portion from the bus independent code.

This patch is based on work by Ben Dooks but he did not have time
to complete it.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The specification is insufficiently strict when it comes to how the
hardware should update the block count register, making it useless
for checking transfer progress.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Even the newer ENE controllers have bugs in their DMA engine that make
it too dangerous to use. Disable it until someone has figured out under
which conditions it corrupts data.

This has caused problems at least once, and can be found as bug report
10925 in the kernel bugzilla.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The CaFe chip has a hardware bug that ends up with us getting a timeout
value that's too small, causing the following sorts of problems:

[   60.525138] mmcblk0: error -110 transferring data
[   60.531477] end_request: I/O error, dev mmcblk0, sector 1484353
[   60.533371] Buffer I/O error on device mmcblk0p2, logical block 181632
[   60.533371] lost page write due to I/O error on mmcblk0p2

Presumably this is an off-by-one error in the hardware.  Incrementing
the timeout count value that we stuff into the TIMEOUT_CONTROL register
gets us a value that works.  This bug was originally discovered by
Pierre Ossman, I believe.

[thanks to Robert Millan for proving that this was still a problem]
Signed-off-by: NAndres Salomon <dilinger@debian.org>
Cc: Pierre Ossman <drzeus-list@drzeus.cx>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This has been sitting around unloved for way too long..

The Marvell CaFe chip's SD implementation chokes during card insertion
if one attempts to set the voltage and power up in the same
SDHCI_POWER_CONTROL register write.  This adds a quirk that does
that particular dance in two steps.

It also adds an entry to pci_ids.h for the CaFe chip's SD device.
Signed-off-by: NAndres Salomon <dilinger@debian.org>
Cc: Pierre Ossman <drzeus-list@drzeus.cx>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The quirk was meant to just inhibit some resets, but ended up blocking
all of them. Fortunately, this was just what was needed. Change the
comment to reflect reality.

Also, this issue has just been observed on Samsung laptops, so reduce
the number of chips the quirk affects.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Hook up the controller LED to the LED subsystem, allowing more flexible
control than simply indicating an ongoing request.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Remove the use of the sdhci specific device name and use the mmc controller
name instead.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some devices have several controllers; need add the index info to
device slot name host->slot_desc[]
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some controllers have been designed on the assumption that all transfers
will be 32-bit aligned, both in start address and in size. This is not a
guarantee the SDHCI specification provides and not one we can provide.

Revert back to PIO for individual requests in order to work around the
hardware bug.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

We support 2.0 controllers, even though we don't use anything in the new
feature set.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Add a comment for each quirk to describe what it does and why.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Signed-off-by: NRolf Eike Beer <eike-kernel@sf-tec.de>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Do a full scan of the directory to try and be a bit more proactive,
instead of waiting for things to break.
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Commits

  58b053e4 ("Update arch/ to use sg helpers")
  45711f1a ("[SG] Update drivers to use sg helpers")
  fa05f128 ("Update net/ to use sg helpers")

converted many files to use the scatter gather helpers without ensuring
that the necessary headerfile <linux/scatterlist> is included.  This
happened to work for ia64, powerpc, sparc64 and x86 because they
happened to drag in that file via their <asm/dma-mapping.h>.

On most of the others this probably broke.

Instead of increasing the header file spider web I choose to include
<linux/scatterlist.h> directly into the affectes files.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

The forcedma and nodma module parameters can be replaced with the quirks
parameter, so remove the redundancy.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some controllers like ENE712 can't work properly with DMA mode,
add this quirk to force these kinds of HW work with PIO mode
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Many host controllers don't fully follow the PCI spec to claim
whether they support DMA in PCI class register. Leave the driver
to judge it from the Capability register, quirks and module parameter
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Add support for relaying the sdio interrupt signal from the card.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Remove the BYTEBLOCK capability and let the broken hosts fail the
requests with -EINVAL instead.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Convert the MMC layer to use standard error codes and not its own,
incompatible values.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

When we get unexpected interrupts, also print which interrupt it was.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

It is fully legal for a controller to start issuing data related
interrupts before it has signalled that the command has completed.
Make sure the driver actually can handle this.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some SDHC cards report an invalid maximum block size, in these cases
assume they support block sizes up to 512 bytes instead of returning
an error.
Signed-off-by: NDavid Vrabel <david.vrabel@csr.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The block count register shouldn't be trusted for single block transfers,
so avoid using it completely when calculating transferred bytes.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Remove the extra debugging output that now is properly printed
by the core.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Make sure all headers in the files reflect their true position
in the tree.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Added its pci_id and implemented a quirk for it because this
controller needs to reset cmd and data when setting ios.
Signed-off-by: NLeandro Dorileo <dorileo@ossystems.com.br>
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some controllers signal "command complete" even on failures (which
they are allowed to do according to the spec). Make sure we check
the error bits first so we don't get any false positives.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The controller has a bit indicating that one of the higher bits (the
error bits) are set. A previous bug caused this bit to be masked, but
since that bug has been fixed we have to clear it explicictly.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Whenever a power interrupt is signaled it is also reported as an unexpected
one. All other unexpected interrupts get lost. Cause is a not inversed
bitmask to remove power interrupts from the status.
Signed-off-by: NRolf Eike Beer <eike-kernel@sf-tec.de>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

ENE has a very weird design where an SDHCI device (0805) is presented
on the PCI bus, but that device is non-functional, and the real device
is hidden as a more generic device.
Signed-off-by: NMilko Krachounov <milko@3mhz.net>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

When the device hits certain memory boundaries, it signals an
interrupt and expects to be serviced. We don't need the feature
but we need to make sure the device doesn't stall.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Fix handling of low voltage MMC cards.

The latest MMC and SD specs both agree that support for
low-voltage operations is indicated by bit 7 in the OCR.
The MMC spec states that the low voltage range is
1.65-1.95V while the SD spec leaves the actual voltage
range undefined - meaning that there is still no such
thing as a low voltage SD card.

However, an old Sandisk spec implied that bits 7.0
represented voltages below 2.0V in 1V or 0.5V increments,
and the code was accordingly written with that expectation.

This confusion meant that host drivers attempting to support
the typical low voltage (1.8V) would set the wrong bits in
the host OCR mask (usually bits 5 and/or 6) resulting in the
the low voltage mode never being used.

This change corrects the low voltage range and adds sanity
checks on the reserved bits (0-6) and for SD cards that
claim to support low-voltage operations.
Signed-off-by: NPhilip Langdale <philipl@overt.org>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Consolidate the list of available voltages.

Up until now, a separate set of defines has been
used for host->vdd than that used for the OCR
voltage mask values. Having two sets of defines
allows them to get out of sync and the current
sets are already inconsistent with one claiming
to describe ranges and the other specific voltages.

Only the SDHCI driver uses the host->vdd defines and
it is easily fixed to use the OCR defines.
Signed-off-by: NPhilip Langdale <philipl@overt.org>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Clean up the drivers/mmc directory by moving card and host drivers
into subdirectories.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

All host drivers were #include:ing mmc/protocol.h just to
get access to the OCR bit defines. Move these to host.h instead.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>