1. 07 7月, 2015 1 次提交
  2. 02 6月, 2015 1 次提交
  3. 27 11月, 2014 1 次提交
  4. 08 9月, 2014 1 次提交
  5. 10 5月, 2014 1 次提交
    • S
      arm64: mm: Optimise tlb flush logic where we have >4K granule · fa48e6f7
      Steve Capper 提交于
      The tlb maintainence functions: __cpu_flush_user_tlb_range and
      __cpu_flush_kern_tlb_range do not take into consideration the page
      granule when looping through the address range, and repeatedly flush
      tlb entries for the same page when operating with 64K pages.
      
      This patch re-works the logic s.t. we instead advance the loop by
       1 << (PAGE_SHIFT - 12), so avoid repeating ourselves.
      
      Also the routines have been converted from assembler to static inline
      functions to aid with legibility and potential compiler optimisations.
      
      The isb() has been removed from flush_tlb_kernel_range(.) as it is
      only needed when changing the execute permission of a mapping. If one
      needs to set an area of the kernel as execute/non-execute an isb()
      must be inserted after the call to flush_tlb_kernel_range.
      
      Cc: Laura Abbott <lauraa@codeaurora.org>
      Signed-off-by: NSteve Capper <steve.capper@linaro.org>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      fa48e6f7
  6. 14 6月, 2013 1 次提交
  7. 17 9月, 2012 1 次提交