- 15 8月, 2011 1 次提交
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由 Catalin Marinas 提交于
This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible cache data corruption with hit-under-miss enabled). It sets the undocumented bit 31 in the auxiliary control register and the FI bit in the control register, thus disabling hit-under-miss without putting the processor into full low interrupt latency mode. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 10 8月, 2011 1 次提交
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由 Russell King 提交于
This has now been well tested, and several platforms are now selecting this directly. It's time to drop its experimental status. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 7月, 2011 1 次提交
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由 Grant Likely 提交于
This patch adds irq_domain infrastructure for translating from hardware irq numbers to linux irqs. This is particularly important for architectures adding device tree support because the current implementation (excluding PowerPC and SPARC) cannot handle translation for more than a single interrupt controller. irq_domain supports device tree translation for any number of interrupt controllers. This patch converts x86, Microblaze, ARM and MIPS to use irq_domain for device tree irq translation. x86 is untested beyond compiling it, irq_domain is enabled for MIPS and Microblaze, but the old behaviour is preserved until the core code is modified to actually register an irq_domain yet. On ARM it works and is required for much of the new ARM device tree board support. PowerPC has /not/ been converted to use this new infrastructure. It is still missing some features before it can replace the virq infrastructure already in powerpc (see documentation on irq_domain_map/unmap for details). Followup patches will add the missing pieces and migrate PowerPC to use irq_domain. SPARC has its own method of managing interrupts from the device tree and is unaffected by this change. Acked-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 21 7月, 2011 3 次提交
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由 Kamil Debski 提交于
Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210: - clock support - memory mapping and reserving - s5p_device_mfc platform device Signed-off-by: NKamil Debski <k.debski@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chanwoo Choi 提交于
Convert the S5PV210/S5P64X0 32-bit down-counting clocksource to the generic mmio clocksource infrastructure Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> [kgene.kim@samsung.com: removed changes of mach-exynos4/time.c] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 20 7月, 2011 6 次提交
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kyungmin Park 提交于
Now most of ARM machines has the alsmot same __clk_get/put() macro So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config Now there are only 3 caese. 1) define the clk structure with clkdev macro => Need to move clk structure to proper header file arch/arm/mach-versatile/include/mach/clkdev.h arch/arm/mach-realview/include/mach/clkdev.h arch/arm/mach-vexpress/include/mach/clkdev.h arch/arm/mach-integrator/include/mach/clkdev.h 2) export the __clk_get/put function at clock.c arch/arm/mach-shmobile/include/mach/clkdev.h 3) demuxing the clk source arch/arm/mach-u300/include/mach/clkdev.h Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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- 18 7月, 2011 2 次提交
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由 Nicolas Pitre 提交于
This was introduced more than 3 years ago, and since then only generic janitorial changes were made without further addition of actual support for "real" devices. This is therefore a cost with no benefits to keep in the tree. If someone wishes to revive this code, it is always possible to retrieve it from the Git repository. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> CC: Ke Wei <kewei@marvell.com> CC: Saeed Bishara <saeed@marvell.com> CC: Lennert Buytenhek <buytenh@wantstofly.org>
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由 Nicolas Pitre 提交于
On Tue, 28 Jun 2011, Ben Dooks wrote: > On Tue, Jun 28, 2011 at 11:22:57PM +0200, Arnd Bergmann wrote: > > > On a related note, what about mach-s3c2400? It seems to be even more > > incomplete. > > Probably the same fate awaits that. It is so old that there's little > incentive to do anything with it. So out it goes as well. The PORT_S3C2400 definition in include/linux/serial_core.h is left there to prevent a reuse of the same number for another port type. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 14 7月, 2011 2 次提交
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由 Kukjin Kim 提交于
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Jon Medhurst 提交于
Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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- 13 7月, 2011 1 次提交
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由 Colin Cross 提交于
The barriers implemented in arch/arm/mach-tegra/mach/barriers.h are exactly the same as the default barriers implemented in arch/arm/include/asm/system.h. Remove barriers.h from Tegra, and don't select ARCH_HAS_BARRIERS. Signed-off-by: NColin Cross <ccross@android.com> Acked-by: NOlof Johansson <olof@lixom.net>
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- 12 7月, 2011 2 次提交
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 11 7月, 2011 1 次提交
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由 Russell King - ARM Linux 提交于
clocksource support. This achieves several things: 1. It means we get rid of all these helper functions which frankly should never have been necessary. 2. It means omap_readl() inside these helper functions does not appear in ftrace output. Another plus is that we avoid the overhead of calculating the address to read each time, but a minus is that we use readl() which has a barrier. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> [tony@atomide.com: updated to use ioremap] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 7月, 2011 1 次提交
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由 Binghua Duan 提交于
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: NBinghua Duan <Binghua.Duan@csr.com> Signed-off-by: NRongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: NYuping Luo <Yuping.Luo@csr.com> Signed-off-by: NBin Shi <Bin.Shi@csr.com> Signed-off-by: NHuayi Li <Huayi.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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- 07 7月, 2011 3 次提交
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由 Imre Kaloz 提交于
CNS3XXX is based on MPCore, so select the right CPU option for it. Signed-off-by: NImre Kaloz <kaloz@openwrt.org> Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com>
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由 Shawn Guo 提交于
The patch converts mxc tzic interrupt controller to use generic irq chip. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Rob Herring 提交于
The scu_power_mode function can be used on UP builds as it drives signals to an SOC power controller. So make it selectable for !SMP. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 02 7月, 2011 1 次提交
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由 Rafael J. Wysocki 提交于
Use the generic power domains support introduced by the previous patch to implement support for power domains on SH7372. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Acked-by: NPaul Mundt <lethal@linux-sh.org>
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- 29 6月, 2011 1 次提交
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由 Simon Horman 提交于
This allows a ROM-able zImage to be written to eSD and for SuperH Mobile ARM to boot directly from the SDHI hardware block. This is achieved by the MaskROM loading the first portion of the image into MERAM and then jumping to it. This portion contains loader code which copies the entire image to SDRAM and jumps to it. From there the zImage boot code proceeds as normal, uncompressing the image into its final location and then jumping to it. Cc: Paul Mundt <lethal@linux-sh.org> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 6月, 2011 1 次提交
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由 John Linn 提交于
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: NJohn Linn <john.linn@xilinx.com>
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- 02 6月, 2011 1 次提交
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由 Russell King 提交于
Allow SoCs to enable the scatterlist chaining support, which allows scatterlist tables to be broken up into smaller allocations. As support for this feature depends on the implementation details of the users of the scatterlists, we can't enable this globally without auditing all the users, which is a very big task. Instead, let SoCs progressively switch over to using this. SoC drivers using scatterlists and SoC DMA implementations need auditing before this option can be enabled for the SoC. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 26 5月, 2011 2 次提交
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由 Jeffrey Ohlstein 提交于
Hotplug support was added in 9f1890a5 (msm: hotplug: support cpu hotplug on msm, 2010-12-02) Signed-off-by: NJeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
In commit eb33575c ("[ARM] Double check memmap is actually valid with a memmap has unexpected holes V2"), a new function, memmap_valid_within, was introduced to mmzone.h so that holes in the memmap which pass pfn_valid in SPARSEMEM configurations can be detected and avoided. The fix to this problem checks that the pfn <-> page linkages are correct by calculating the page for the pfn and then checking that page_to_pfn on that page returns the original pfn. Unfortunately, in SPARSEMEM configurations, this results in reading from the page flags to determine the correct section. Since the memmap here has been freed, junk is read from memory and the check is no longer robust. In the best case, reading from /proc/pagetypeinfo will give you the wrong answer. In the worst case, you get SEGVs, Kernel OOPses and hung CPUs. Furthermore, ioremap implementations that use pfn_valid to disallow the remapping of normal memory will break. This patch allows architectures to provide their own pfn_valid function instead of using the default implementation used by sparsemem. The architecture-specific version is aware of the memmap state and will return false when passed a pfn for a freed page within a valid section. Acked-by: NMel Gorman <mgorman@suse.de> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 5月, 2011 2 次提交
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select ARM_PATCH_PHYS_VIRT as with ARM_PATCH_PHYS_VIRT you can patch boot_params at runtime or any recent bootloader will provide a valid atags pointer in r2 as point out by Russell on AT91 we never use XIP so se do not need PLAT_PHYS_OFFSET Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
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we do not change the clock naming convention so does not need to switch the AVR32 yet Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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- 24 5月, 2011 6 次提交
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由 Russell King 提交于
bcmring has a set of four sp804 timers incorporated, yet it has its own copy of the sp804 code. Convert its clocksource implementation to the standard sp804 support code. Cc: Jiandong Zheng <jdzheng@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert the MXS timrotv2 32-bit down counting clocksource to the generic clocksource infrastructure. Cc: Sascha Hauer <kernel@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert SPEAr platforms 16-bit up counting clocksource, which requires a 16-bit register access read rather than 32-bit. Acked-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert the W90x900 24-bit down-counting clocksource to the generic mmio clocksource infrastructure Acked-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert ixp4xx, lpc32xx, mxc, netx, pxa, sa1100, tcc8k, tegra and u300 to use the generic mmio clocksource recently introduced. Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Acked-by: NEric Miao <eric.y.miao@gmail.com> Acked-by: N"Hans J. Koch" <hjk@hansjkoch.de> Acked-by: NColin Cross <ccross@android.com> Cc: Erik Gilling <konkers@android.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 5月, 2011 1 次提交
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由 Russell King 提交于
As a result of c42321c7 (genirq: Make generic irq chip depend on CONFIG_GENERIC_IRQ_CHIP), we now need those platforms using this in my tree to select this symbol. Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NNicolas Pitre <nico@fluxnic.net> Acked-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 5月, 2011 1 次提交
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由 Kukjin Kim 提交于
The current mainline codes of ARCH_S5PC100 cannot support suspend to ram. So needs this for preventing build error. Cc: Russell King <rmk+kernel at arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim at samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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