1. 18 6月, 2009 1 次提交
    • P
      perf_counter: powerpc: Enable use of software counters on 32-bit powerpc · 105988c0
      Paul Mackerras 提交于
      This enables the perf_counter subsystem on 32-bit powerpc.  Since we
      don't have any support for hardware counters on 32-bit powerpc yet,
      only software counters can be used.
      
      Besides selecting HAVE_PERF_COUNTERS for 32-bit powerpc as well as
      64-bit, the main thing this does is add an implementation of
      set_perf_counter_pending().  This needs to arrange for
      perf_counter_do_pending() to be called when interrupts are enabled.
      Rather than add code to local_irq_restore as 64-bit does, the 32-bit
      set_perf_counter_pending() generates an interrupt by setting the
      decrementer to 1 so that a decrementer interrupt will become pending
      in 1 or 2 timebase ticks (if a decrementer interrupt isn't already
      pending).  When interrupts are enabled, timer_interrupt() will be
      called, and some new code in there calls perf_counter_do_pending().
      We use a per-cpu array of flags to indicate whether we need to call
      perf_counter_do_pending() or not.
      
      This introduces a couple of new Kconfig symbols: PPC_HAVE_PMU_SUPPORT,
      which is selected by processor families for which we have hardware PMU
      support (currently only PPC64), and PPC_PERF_CTRS, which enables the
      powerpc-specific perf_counter back-end.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: linuxppc-dev@ozlabs.org
      Cc: benh@kernel.crashing.org
      LKML-Reference: <19000.55404.103840.393470@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      105988c0
  2. 15 6月, 2009 1 次提交
  3. 11 6月, 2009 1 次提交
  4. 09 6月, 2009 2 次提交
  5. 11 3月, 2009 1 次提交
    • B
      powerpc/kconfig: Kill PPC_MULTIPLATFORM · 28794d34
      Benjamin Herrenschmidt 提交于
      CONFIG_PPC_MULTIPLATFORM is a remain of the pre-powerpc days and isn't
      really meaningful anymore. It was basically equivalent to PPC64 || 6xx.
      
      This removes it along with the following changes:
      
       - 32-bit platforms that relied on PPC32 && PPC_MULTIPLATFORM now rely
         on 6xx which is what they want anyway.
      
       - A new symbol, PPC_BOOK3S, is defined that represent compliance with
         the "Server" variant of the architecture. This is set when either 6xx
         or PPC64 is set and open the door for future BOOK3E 64-bit.
      
       - 64-bit platforms that relied on PPC64 && PPC_MULTIPLATFORM now use
         PPC64 && PPC_BOOK3S
      
       - A separate and selectable CONFIG_PPC_OF_BOOT_TRAMPOLINE option is now
         used to control the use of prom_init.c
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      28794d34
  6. 06 3月, 2009 2 次提交
  7. 26 2月, 2009 1 次提交
    • P
      perfcounters/powerpc: Add support for POWER5 processors · 742bd95b
      Paul Mackerras 提交于
      This adds the back-end for the PMU on the POWER5 processor.  This knows
      how to use the fixed-function PMC5 and PMC6 (instructions completed and
      run cycles).  Unlike POWER6, PMC5/6 obey the freeze conditions and can
      generate interrupts, so their use doesn't impose any extra restrictions.
      
      POWER5+ is different and is not supported by this patch.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      742bd95b
  8. 23 2月, 2009 2 次提交
  9. 29 1月, 2009 1 次提交
    • K
      powerpc/fsl-booke: Cleanup init/exception setup to be runtime · 105c31df
      Kumar Gala 提交于
      We currently have a few variants of fsl-booke processors (e500v1, e500v2,
      e500mc, and e200).  They all have minor differences that we had previously
      been handling via ifdefs.
      
      To move towards having this support the following changes have been made:
      
      * PID1, PID2 only exist on e500v1 & e500v2 and should not be accessed on
        e500mc or e200.  We use MMUCFG[NPIDS] to determine which case we are
        since we only touch PID1/2 in extremely early init code.
      
      * Not all IVORs exist on all the processors so introduce cpu_setup
        functions for each variant to setup the proper IVORs that are either
        unique or exist but have some variations between the processors
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      105c31df
  10. 10 1月, 2009 3 次提交
    • P
      powerpc/perf_counter: Add support for POWER6 · f7862837
      Paul Mackerras 提交于
      This adds the back-end for the PMU on the POWER6 processor.
      Fortunately, the event selection hardware is somewhat simpler on
      POWER6 than on other POWER family processors, so the constraints
      fit into only 32 bits.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f7862837
    • P
      powerpc/perf_counter: Add support for PPC970 family · 16b06799
      Paul Mackerras 提交于
      This adds the back-end for the PMU on the PPC970 family.
      
      The PPC970 allows events from the ISU to be selected in two different
      ways.  Rather than use alternative event codes to express this, we
      instead use a single encoding for ISU events and express the
      resulting constraint (that you can't select events from all three
      of FPU/IFU/VPU, ISU and IDU/STS at the same time, since they all come
      in through only 2 multiplexers) using a NAND constraint field, and
      work out which multiplexer is used for ISU events at compute_mmcr
      time.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      16b06799
    • P
      powerpc/perf_counter: Add generic support for POWER-family PMU hardware · 4574910e
      Paul Mackerras 提交于
      This provides the architecture-specific functions needed to access
      PMU hardware on the 64-bit PowerPC processors.  It has been designed
      for the IBM POWER family (POWER 4/4+/5/5+/6 and PPC970) but will
      hopefully also suit other 64-bit PowerPC machines (although probably
      not Cell given how different it is in this area).  This doesn't
      include back-ends for any specific processors.
      
      This implements a system which allows back-ends to express the
      constraints that their hardware has on what events can be counted
      simultaneously.  The constraints are expressed as a 64-bit mask +
      64-bit value for each event, and the encoding is capable of
      expressing the constraints arising from having a set of multiplexers
      feeding an event bus, with some events being available through
      multiple multiplexer settings, such as we get on POWER4 and PPC970.
      Furthermore, the back-end can supply alternative event codes for
      each event, and the constraint checking code will try all possible
      combinations of alternative event codes to try to find a combination
      that will fit.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      4574910e
  11. 08 1月, 2009 1 次提交
    • N
      powerpc: Rewrite sysfs processor cache info code · 93197a36
      Nathan Lynch 提交于
      The current code for providing processor cache information in sysfs
      has the following deficiencies:
      - several complex functions that are hard to understand
      - implicit recursion (cache_desc_release -> kobject_put -> cache_desc_release)
      - explicit recursion (create_cache_index_info)
      - use of two per-cpu arrays when one would suffice
      - duplication of work on systems where CPUs share cache
      
      Also, when I looked at implementing support for a shared_cpu_map
      attribute, it was pretty much impossible to handle hotplug without
      checking every single online CPU's cache_desc list and fixing things
      up... not that this is a hot path, but it would have introduced
      O(n^2)-ish behavior during boot.  Addressing this involved rethinking
      the core data structures used, which didn't lend itself to an
      incremental approach.
      
      This implementation maintains a "forest" (potentially more than one
      tree) of cache objects which reflects the system's cache topology.
      Cache objects are instantiated as needed as CPUs come online.  A
      per-cpu array is used mainly for sysfs-related bookkeeping; the
      objects in the array just point to the appropriate points in the
      forest.
      
      This maintains compatibility with the existing code and includes some
      enhancements:
      - Implement the shared_cpu_map attribute, which is essential for
        enabling userspace to discover the system's overall cache topology.
      - Use cache-block-size properties if cache-line-size is not available.
      
      I chose to place this implementation in a new file since it would have
      roughly doubled the size of sysfs.c, which is already kind of messy.
      Signed-off-by: NNathan Lynch <ntl@pobox.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      93197a36
  12. 23 12月, 2008 2 次提交
  13. 28 11月, 2008 1 次提交
    • S
      powerpc/ppc32: static ftrace fixes for PPC32 · f1eecf0e
      Steven Rostedt 提交于
      Impact: fix for PowerPC 32 code
      
      There were some early init code that was not safe for static
      ftrace to boot on my PowerBook. This code must only use relative
      addressing, and static mcount performs a compare of the
      ftrace_trace_function pointer, and gets that with an absolute address.
      In the early init boot up code, this will cause a fault.
      
      This patch removes tracing from the files containing the offending
      functions.
      Signed-off-by: NSteven Rostedt <srostedt@redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f1eecf0e
  14. 21 10月, 2008 1 次提交
  15. 25 9月, 2008 3 次提交
  16. 16 9月, 2008 1 次提交
    • P
      powerpc: Make the 64-bit kernel as a position-independent executable · 549e8152
      Paul Mackerras 提交于
      This implements CONFIG_RELOCATABLE for 64-bit by making the kernel as
      a position-independent executable (PIE) when it is set.  This involves
      processing the dynamic relocations in the image in the early stages of
      booting, even if the kernel is being run at the address it is linked at,
      since the linker does not necessarily fill in words in the image for
      which there are dynamic relocations.  (In fact the linker does fill in
      such words for 64-bit executables, though not for 32-bit executables,
      so in principle we could avoid calling relocate() entirely when we're
      running a 64-bit kernel at the linked address.)
      
      The dynamic relocations are processed by a new function relocate(addr),
      where the addr parameter is the virtual address where the image will be
      run.  In fact we call it twice; once before calling prom_init, and again
      when starting the main kernel.  This means that reloc_offset() returns
      0 in prom_init (since it has been relocated to the address it is running
      at), which necessitated a few adjustments.
      
      This also changes __va and __pa to use an equivalent definition that is
      simpler.  With the relocatable kernel, PAGE_OFFSET and MEMORY_START are
      constants (for 64-bit) whereas PHYSICAL_START is a variable (and
      KERNELBASE ideally should be too, but isn't yet).
      
      With this, relocatable kernels still copy themselves down to physical
      address 0 and run there.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      549e8152
  17. 03 9月, 2008 1 次提交
    • T
      powerpc: Work around gcc's -fno-omit-frame-pointer bug · 7563dc64
      Tony Breeds 提交于
      This bug is causing random crashes
      (http://bugzilla.kernel.org/show_bug.cgi?id=11414).
      
      -fno-omit-frame-pointer is only needed on powerpc when -pg is also
      supplied, and there is a gcc bug that causes incorrect code generation
      on 32-bit powerpc when -fno-omit-frame-pointer is used---it uses stack
      locations below the stack pointer, which is not allowed by the ABI
      because those locations can and sometimes do get corrupted by an
      interrupt.
      
      This ensures that CONFIG_FRAME_POINTER is only selected by ftrace.
      When CONFIG_FTRACE is enabled we also pass -mno-sched-epilog to work
      around the gcc codegen bug.
      
      Patch based on work by:
      	Andreas Schwab <schwab@suse.de>
      	Segher Boessenkool <segher@kernel.crashing.org>
      Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      7563dc64
  18. 20 8月, 2008 1 次提交
  19. 04 8月, 2008 1 次提交
  20. 24 7月, 2008 1 次提交
    • J
      kgdb, powerpc: arch specific powerpc kgdb support · 17ce452f
      Jason Wessel 提交于
      This patch removes the old kgdb reminants from ARCH=powerpc and
      implements the new style arch specific stub for the common kgdb core
      interface.
      
      It is possible to have xmon and kgdb in the same kernel, but you
      cannot use both at the same time because there is only one set of
      debug hooks.
      
      The arch specific kgdb implementation saves the previous state of the
      debug hooks and restores them if you unconfigure the kgdb I/O driver.
      Kgdb should have no impact on a kernel that has no kgdb I/O driver
      configured.
      Signed-off-by: NJason Wessel <jason.wessel@windriver.com>
      17ce452f
  21. 01 7月, 2008 1 次提交
  22. 26 6月, 2008 1 次提交
  23. 24 5月, 2008 1 次提交
  24. 12 5月, 2008 1 次提交
  25. 29 4月, 2008 1 次提交
  26. 24 4月, 2008 1 次提交
  27. 18 4月, 2008 1 次提交
  28. 17 4月, 2008 1 次提交
  29. 14 2月, 2008 1 次提交
  30. 07 2月, 2008 2 次提交
  31. 24 1月, 2008 1 次提交