1. 23 4月, 2017 4 次提交
  2. 21 4月, 2017 2 次提交
    • M
      powerpc/mm: Add support for runtime configuration of ASLR limits · 9fea59bd
      Michael Ellerman 提交于
      Add powerpc support for mmap_rnd_bits and mmap_rnd_compat_bits, which are two
      sysctls that allow a user to configure the number of bits of randomness used for
      ASLR.
      
      Because of the way the Kconfig for ARCH_MMAP_RND_BITS is defined, we have to
      construct at least the MIN value in Kconfig, vs in a header which would be more
      natural. Given that we just go ahead and do it all in Kconfig.
      
      At least according to the code (the documentation makes no mention of it), the
      value is defined as the number of bits of randomisation *of the page*, not the
      address. This makes some sense, with larger page sizes more of the low bits are
      forced to zero, which would reduce the randomisation if we didn't take the
      PAGE_SIZE into account. However it does mean the min/max values have to change
      depending on the PAGE_SIZE in order to actually limit the amount of address
      space consumed by the randomisation.
      
      The result of that is that we have to define the default values based on both
      32-bit vs 64-bit, but also the configured PAGE_SIZE. Furthermore now that we
      have 128TB address space support on Book3S, we also have to take that into
      account.
      
      Finally we can wire up the value in arch_mmap_rnd().
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NBhupesh Sharma <bhsharma@redhat.com>
      Tested-by: NBhupesh Sharma <bhsharma@redhat.com>
      Reviewed-by: NKees Cook <keescook@chromium.org>
      Reviewed-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      9fea59bd
    • O
      powerpc/mm: Wire up ioremap_cache() · f855b2f5
      Oliver O'Halloran 提交于
      The default implementation of ioremap_cache() is aliased to ioremap().
      On powerpc ioremap() creates cache-inhibited mappings by default which
      is almost certainly not what you wanted.
      Signed-off-by: NOliver O'Halloran <oohall@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      f855b2f5
  3. 20 4月, 2017 2 次提交
    • N
      powerpc/64s: Use relon prolog for EXC_VIRT_OOL_MASKABLE_HV handlers · a050d20d
      Nicholas Piggin 提交于
      Hypervisor Virtualization and Directed Hypervisor Doorbell interrupt handlers
      use the macro EXC_VIRT_OOL_MASKABLE_HV for their relocation-on handlers, which
      calls MASKABLE_RELON_EXCEPTION_HV_OOL, which uses the *real mode* interrupt
      prolog. This means we needlessly rfid from virtual mode to virtual mode.
      
      For POWER8 it only affects doorbell IPIs. Context switch microbenchmark between
      threads with snooze disabled (which causes IPI) gets about 3% faster, about 370
      cycles. Should be more important on POWER9 with global doorbells and HVI for
      host interrupts.
      
      Use the RELON variant instead to reduce overhead.
      
      Fixes: 1707dd16 ("powerpc: Save CFAR before branching in interrupt entry paths")
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      [mpe: Fold some more detail into the change log]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      a050d20d
    • M
      powerpc/xive: Fix missing check of rc != OPAL_BUSY · 686978b1
      Michael Ellerman 提交于
      Dan Carpenter noticed that the code in __xive_native_disable_queue() has a for
      loop with an unconditional break in the middle, which doesn't make a lot of
      sense.
      
      What the code's supposed to do is loop as long as OPAL says it's busy, if we get
      any other return code, either success or failure, then we should break the loop.
      
      So add the missing check.
      
      Fixes: 243e2511 ("powerpc/xive: Native exploitation of the XIVE interrupt controller")
      Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      686978b1
  4. 19 4月, 2017 14 次提交
  5. 13 4月, 2017 18 次提交