- 20 5月, 2010 4 次提交
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由 Guillaume LECERF 提交于
Tested with W19L320SBT9C [1]. [1] http://www.datasheetarchive.com/pdf-datasheets/Datasheets-40/DSA-795343.pdf [dwmw2: Fix MODULE_ALIAS and linkage] Signed-off-by: NObinou <obconseil@gmail.com> Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Acked-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
This reverts commit 66803762 ("mtd: mxc_nand: add RESET command support"). Support for NAND_CMD_RESET was added separately in commit d4840180 ("mtd: mxc_nand: set NFC registers after reset"), causing a build error: drivers/mtd/nand/mxc_nand.c: In function 'mxc_nand_command': drivers/mtd/nand/mxc_nand.c:689: error: duplicate case value drivers/mtd/nand/mxc_nand.c:606: error: previously used here Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Tejun Heo 提交于
Implicit slab.h inclusion via percpu.h is about to go away. Make sure gfp.h or slab.h is included as necessary. Signed-off-by: NTejun Heo <tj@kernel.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 18 5月, 2010 1 次提交
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由 Kirill A. Shutemov 提交于
We cannot modify file->f_mapping->backing_dev_info, because it will corrupt backing device of device node inode, since file->f_mapping is equal to inode->i_mapping (see __dentry_open() in fs/open.c). Let's introduce separate inode for MTD device with appropriate backing device. [dwmw2: Refactor to keep it all entirely within mtdchar.c; use iget_locked()] Signed-off-by: NKirill A. Shutemov <kirill@shutemov.name> Acked-by: NJan Kara <jack@suse.cz> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 17 5月, 2010 1 次提交
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 16 5月, 2010 1 次提交
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由 Julia Lawall 提交于
Use kmemdup when some other buffer is immediately copied into the allocated region. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression from,to,size,flag; statement S; @@ - to = \(kmalloc\|kzalloc\)(size,flag); + to = kmemdup(from,size,flag); if (to==NULL || ...) S - memcpy(to, from, size); // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 14 5月, 2010 32 次提交
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由 David Woodhouse 提交于
Doh. Pointed out by Guillaume LECERF <glecerf@gmail.com> since I managed to miss it in my test builds. S'what I get for hacking at 2am, I suppose. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Florian Fainelli 提交于
This NAND flash part advertises 0xD1 as an identifier but is still a working 128MBytes x 8bits 3.3V NAND part. Signed-off-by: NFlorian Fainelli <ffainelli@freebox.fr> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Dominik Brodowski 提交于
Reported-by: NKomuro <komurojun-mbn@nifty.com> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Alexander Kurz 提交于
Signed-off-by: NAlexander Kurz <linux@kbdbabel.org> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Alexander Kurz 提交于
After fixing the obvious errors, the driver will now compile again on v2.6.34-rc3. First tests with two 4MB flash cards including erase- and write test with one of the cards where successful. Also, add two new PCMCIA_DEVICE_PROD_IDs. [linux@dominikbrodowski.net: clean up commit message] Signed-off-by: NAlexander Kurz <linux@kbdbabel.org> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Wolfram Sang 提交于
Due to a broken CFI, they have to be added to jedec_probe. Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kevin Cernekee 提交于
This is a slightly modified version of a patch submitted last year by Reuben Dowle <reuben.dowle@navico.com>. His original comments follow: This patch adds support for some MLC NAND flashes that place the BB marker in the LAST page of the bad block rather than the FIRST page used for SLC NAND and other types of MLC nand. Lifted from Samsung datasheet for K9LG8G08U0A (1Gbyte MLC NAND): " Identifying Initial Invalid Block(s) All device locations are erased(FFh) except locations where the initial invalid block(s) information is written prior to shipping. The initial invalid block(s) status is defined by the 1st byte in the spare area. Samsung makes sure that the last page of every initial invalid block has non-FFh data at the column address of 2,048. ... " As far as I can tell, this is the same for all Samsung MLC nand, and in fact the samsung bsp for the processor used in our project (s3c6410) actually contained a hack similar to this patch but less portable to enable use of their NAND parts. I discovered this problem when trying to use a Micron NAND which does not used this layout - I wish samsung would put their stuff in main-line to avoid this type of problem. Currently this patch causes all MLC nand with manufacturer codes from Samsung and ST(Numonyx) to use this alternative location, since these are the manufactures that I know of that use this layout. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kevin Cernekee 提交于
Some of the newer MLC devices have a 6-byte ID sequence in which several field definitions differ from older chips in a manner that is not backward compatible. For instance: Samsung K9GAG08U0M (5-byte sequence): ec d5 14 b6 74 4th byte, bits 1:0 encode the page size: 0=1KiB, 1=2KiB, 2=4KiB, 3=8KiB 4th byte, bits 5:4 encode the block size: 0=64KiB, 1=128KiB, ... 4th byte, bit 6 encodes the OOB size: 0=8B/512B, 1=16B/512B Samsung K9GAG08U0D (6-byte sequence): ec d5 94 29 34 41 4th byte, bits 1:0 encode the page size: 0=2KiB, 1=4KiB, 3=8KiB, 4=rsvd 4th byte, bits 7;5:4 encode the block size: 0=128KiB, 1=256KiB, ... 4th byte, bits 6;3:2 encode the OOB size: 1=128B/page, 2=218B/page This patch uses the new 6-byte scheme if the following conditions are all true: 1) The ID code wraps around after exactly 6 bytes 2) Manufacturer is Samsung 3) 6th byte is zero The patch also extends the maximum OOB size from 128B to 256B. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 H Hartley Sweeten 提交于
Some SPI masters (ep93xx) have limitations when using the SFRMOUT signal for the spi device chip select. The SFRMOUT signal is only asserted as long as the spi transmit fifo contains data. As soon as the last bit is clocked into the receive fifo it gets deasserted. The functions sst25l_status and sst25l_match_device use the API function spi_write_then_read to write a command to the flash then read the response back. This API function creates a two part spi message for the write then read. When this message is transferred the SFRMOUT signal ends up getting deasserted after the command phase. This causes the command to get aborted by the device so the read phase returns invalid data. By changing sst25l_status and sst25l_match_device to use a single transfer synchronous message, the SFRMOUT signal stays asserted during the entire message so the correct data always gets returned. This change will have no effect on SPI masters which use a chip select mechanism (GPIO's, etc.) which does stay asserted correctly. As a bonus, the single transfer synchronous messages complete faster than multi-part messages. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kyungmin Park 提交于
This patch adds a driver for OneNAND controller on Samsung SoCs. Following SoCs are supported: S3C6400, S3C6410, S5PC100 and S5PC110. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kyungmin Park 提交于
Some chips fails to identify properly when SYNC_WRITE mode is enabled (the example is OneNAND on S5PC110 SoC). This patch adds a workaround for such chips. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kyungmin Park 提交于
This patch adds a new callback for the underlying drivers, which is called instead of accessing the buffer ram directly. This callback will be used by Samsung OneNAND driver to implement DMA transfers on S5PC110 SoC. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kyungmin Park 提交于
This patch extends OneNAND core code with support for OneNAND verify write check. This is done by allocating the buffer for verify read directly from the core code. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kyungmin Park 提交于
This patch adds support for OneNAND chips that have 4KiB page size. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Artem Bityutskiy 提交于
Nothing very important, this just makes git am stop producing warnings. Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Wolfram Sang 提交于
Factor out old manufacturers and use the generic ones from cfi.h Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
This patch adds support for detecting SST 39VF32xxB and 39VF64xxB chips in CFI mode. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
SST 39VF{16,32}xx chips use the 0x0701 command set, fully compatible with the AMD one. This patch adds support for detecting them in CFI mode. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
Accept values of 2-5 for TopBottom, where the newly-added 4 and 5 values mean a uniform layout. It does indicate WP layout but we don't handle that. Also don't say "broken" when swapping erase regions in a top-boot chip. That got retrospectively documented in the spec. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
After looking at AMD's CFI specification [1], both of the extended query tables are optional. Thus, it looks like relying that at least one of those tables exist is a bug in cfi_cmdset_0002. This patch inverts the logic and checks for unlock function pointers before exiting on error. This approach leaves place to add a call to a fixup function to try to handle chips compatible with the early AMD specification from 1995 [2]. [1] http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_r20.pdf [2] http://noel.feld.cvut.cz/hw/amd/20158a.pdfSigned-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
Use P_ID_* definitions already in include/linux/mtd/cfi.h instead of the hardcoded values. Make the code more readable. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
SST 39VF160x and 39VF320x chips use vendorname id 0x0701 and alternative unlock addresses. Add support for them in cfi_probe.c. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
Make the addresses used to enter Auto Select Mode variable to leave place for handling chips using non-standard addresses. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Guillaume LECERF 提交于
Move the code to enter Auto Select Mode down to be able to use cfi->cfiq members to add support for chips using alternative sequence / unlock addresses. Signed-off-by: NGuillaume LECERF <glecerf@gmail.com> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ben Dooks 提交于
Add support for a board to register a callback to get the state of the RnB line if it has it attached. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Maxim Levitsky 提交于
2GB xD card, and 4MB SmartMedia ROM card share same ID, so to make both work split xD and smartmedia ID tables. Hardware driver must be able to know which type it handles (and probably just one). Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ivo Clarysse 提交于
On i.MX21 SoCs, if the NFC_CONFIG1:NFC_INT_MASK bit is set, NFC_CONFIG2:NFC_INT always reads out zero, even if an operation is completed. This patch uses enable_irq and disable_irq_nosync instead of NFC_CONFIG1:NFC_INT_MASK to mask NFC interrupts. This allows NFC_CONFIG2:NFC_INT to also be used to detect operation completion on i.MX21. The i.MX21 NFC does not signal reset completion using NFC_CONFIG1:NFC_INT_MASK, so instead reset completion is tested by checking if NFC_CONFIG2 becomes 0. Signed-off-by: NIvo Clarysse <ivo.clarysse@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ivo Clarysse 提交于
This patch allows the mxc_nand driver to reset the NAND flash controller. NFC registers are (re-)set after completion of the reset, as a reset will have reverted the NFC registers to their default values. Signed-off-by: NIvo Clarysse <ivo.clarysse@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Jason Gunthorpe 提交于
This is to support custom partitioning schemes for embedded PPC. To use define your own mtd_part_parser and then add something like: linux,part-probe = "my_probe", "cmdlinepart"; To the board's dts file. If linux,part-probe is not specified then this behaves the same as before. Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Julia Lawall 提交于
Use kzalloc rather than the combination of kmalloc and memset. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,size,flags; statement S; @@ -x = kmalloc(size,flags); +x = kzalloc(size,flags); if (x == NULL) S -memset(x, 0, size); // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Julia Lawall 提交于
Use kzalloc rather than the combination of kmalloc and memset. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,size,flags; statement S; @@ -x = kmalloc(size,flags); +x = kzalloc(size,flags); if (x == NULL) S -memset(x, 0, size); // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 13 5月, 2010 1 次提交
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由 David Woodhouse 提交于
drivers/mtd/nand/denali.c:1427: error: conflicting types for ‘enable_dma’ arch/powerpc/include/asm/dma.h:189: note: previous definition of ‘enable_dma’ was here Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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