- 14 2月, 2007 1 次提交
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由 Becky Bruce 提交于
Eliminate needless invocation of the SYNC macro (which always evaluates to nothing on BookE) from head_fsl_booke.S (for both arch/ppc & arch/powerpc). Signed-off-by: NBecky Bruce <becky.bruce@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 13 2月, 2007 1 次提交
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由 Becky Bruce 提交于
Some of the current tlbwe instructions early on in head_fsl_booke.S take advantage of unarchitected behavior that allows the writing of reserved values to the TSIZE field. This patch corrects that, as well as an error where an uninitialized (by linux) value was written into a MAS register and used for a tlbwe. Correct this for both arch/ppc and arch/powerpc. Signed-off-by: NBecky Bruce <becky.bruce@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 01 7月, 2006 1 次提交
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由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 10 2月, 2006 2 次提交
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由 Jon Mason 提交于
This patch removes all self references and fixes references to files in the now defunct arch/ppc64 tree. I think this accomplises everything wanted, though there might be a few references I missed. Signed-off-by: NJon Mason <jdmason@us.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Becky Bruce 提交于
The e500 core reference manual indicates that isync is required after mtmsr(DE bit) and mtspr DBCR0. Add isyncs to make the code conform to the spec. Signed-off-by: NBecky Bruce <becky.bruce@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 14 11月, 2005 1 次提交
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由 Kumar Gala 提交于
Changed jobs and the Freescale address is no longer valid. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 20 10月, 2005 1 次提交
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由 Kumar Gala 提交于
The _GLOBAL() macro is for text symbols only. Changed to using .globl for .data symbols. This is also needed in ppc32 land to allow FSL Book-E, 40x, and 44x to work. Signed-off-by: NKumar K. Gala <kumar.gala@freescale.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 01 10月, 2005 1 次提交
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由 Stephen Rothwell 提交于
Use idle_power4.S from ppc64 as we are not going to support 32 bit power4 in the merged tree. Merge ppc64 traps.c into powerpc traps.c: use ppc64 versions of exception routine names (as they don't have StudlyCaps) make all the versions if die() have the same prototype Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
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- 19 9月, 2005 1 次提交
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由 Kumar Gala 提交于
Merged ppc_asm.h between ppc32 & ppc64. The majority of the file is common between the two architectures excluding how a single GPR is saved/restored and which GPRs are non-volatile. Additionally, moved the ASM_CONST macro used on ppc64 into ppc_asm.h. Signed-off-by: NKumar Gala <kumar.gala@freescale.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 10 9月, 2005 1 次提交
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由 Sam Ravnborg 提交于
Delete obsoleted parts form arch makefiles and rename to asm-offsets.h Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
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- 05 9月, 2005 1 次提交
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由 Kumar Gala 提交于
PowerPC 40x and Book-E processors support a watchdog timer at the processor core level. The timer has implementation dependent timeout frequencies that can be configured by software. One the first Watchdog timeout we get a critical exception. It is left to board specific code to determine what should happen at this point. If nothing is done and another timeout period expires the processor may attempt to reset the machine. Command line parameters: wdt=0 : disable watchdog (default) wdt=1 : enable watchdog wdt_period=N : N sets the value of the Watchdog Timer Period. The Watchdog Timer Period meaning is implementation specific. Check User Manual for the processor for more details. This patch is based off of work done by Takeharu Kato. Signed-off-by: NMatt McClintock <msm@freescale.com> Signed-off-by: NKumar Gala <kumar.gala@freescale.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 26 6月, 2005 1 次提交
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由 Kumar Gala 提交于
The e200 core is a Book-E core (similar to e500) that has a unified L1 cache and is not cache coherent on the bus. The e200 core also adds a separate exception level for debug exceptions. Part of this patch helps to cleanup a few cases that are true for all Freescale Book-E parts, not just e500. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <kumar.gala@freescale.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 29 5月, 2005 1 次提交
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由 Kumar Gala 提交于
Some debug registers needed to be initialized early on to allow proper support for KGDB. Additionally, we need to setup the ppc.md_early_serial_map function pointer on boards that have serial support for KGDB. Signed-off-by: NKumar Gala <kumar.gala@freescale.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 01 5月, 2005 1 次提交
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由 Paul Mackerras 提交于
Moved common FPU exception handling code out of head.S so it can be used by several of the sub-architectures that might of a full PowerPC FPU. Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling for floating point load/store instructions to only occur if we have a hardware FPU. Signed-off-by: NJason McMullan <jason.mcmullan@timesys.com> Signed-off-by: NKumar Gala <kumar.gala@freescale.com> Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 17 4月, 2005 2 次提交
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由 Kumar Gala 提交于
To add support for 36-bit physical addressing on e500 the following changes have been made. The changes are generalized to support any physical address size larger than 32-bits: * Allow FSL Book-E parts to use a 64-bit PTE, it is 44-bits of pfn, 20-bits of flags. * Introduced new CPU feature (CPU_FTR_BIG_PHYS) to allow runtime handling of updating hardware register (SPRN_MAS7) which holds the upper 32-bits of physical address that will be written into the TLB. This is useful since not all e500 cores support 36-bit physical addressing. * Currently have a pass through implementation of fixup_bigphys_addr * Moved _PAGE_DIRTY in the 64-bit PTE case to free room for three additional storage attributes that may exist in future FSL Book-E cores and updated fault handler to copy these bits into the hardware TLBs. Signed-off-by: NKumar Gala <kumar.gala@freescale.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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