提交 e879b7ab 编写于 作者: N Niklas Cassel 提交者: David S. Miller

net: stmmac: rename GMAC_INT_DEFAULT_MASK for dwmac4

GMAC_INT_DEFAULT_MASK is written to the interrupt enable register.
In previous versions of the IP (e.g. dwmac1000), this register was
instead an interrupt mask register.
To improve clarity and reflect reality, rename GMAC_INT_DEFAULT_MASK
to GMAC_INT_DEFAULT_ENABLE.
Signed-off-by: NNiklas Cassel <niklas.cassel@axis.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 1b84ca18
......@@ -98,7 +98,7 @@
#define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \
GMAC_INT_PCS_ANE)
#define GMAC_INT_DEFAULT_MASK (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN)
#define GMAC_INT_DEFAULT_ENABLE (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN)
enum dwmac4_irq_status {
time_stamp_irq = 0x00001000,
......
......@@ -61,8 +61,8 @@ static void dwmac4_core_init(struct mac_device_info *hw,
writel(value, ioaddr + GMAC_CONFIG);
/* Mask GMAC interrupts */
value = GMAC_INT_DEFAULT_MASK;
/* Enable GMAC interrupts */
value = GMAC_INT_DEFAULT_ENABLE;
if (hw->pmt)
value |= GMAC_INT_PMT_EN;
if (hw->pcs)
......
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