提交 e4f2379d 编写于 作者: A Alexey Brodkin 提交者: David S. Miller

ethernet/arc/arc_emac - Add new driver

Driver for non-standard on-chip ethernet device ARC EMAC 10/100,
instantiated in some legacy ARC (Synopsys) FPGA Boards such as
ARCAngel4/ML50x.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Francois Romieu <romieu@fr.zoreil.com>
Cc: Joe Perches <joe@perches.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Florian Fainelli <florian@openwrt.org>
Cc: David Laight <david.laight@aculab.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 62208f12
* Synopsys ARC EMAC 10/100 Ethernet driver (EMAC)
Required properties:
- compatible: Should be "snps,arc-emac"
- reg: Address and length of the register set for the device
- interrupts: Should contain the EMAC interrupts
- clock-frequency: CPU frequency. It is needed to calculate and set polling
period of EMAC.
- max-speed: Maximum supported data-rate in Mbit/s. In some HW configurations
bandwidth of external memory controller might be a limiting factor. That's why
it's required to specify which data-rate is supported on current SoC or FPGA.
For example if only 10 Mbit/s is supported (10BASE-T) set "10". If 100 Mbit/s is
supported (100BASE-TX) set "100".
- phy: PHY device attached to the EMAC via MDIO bus
Child nodes of the driver are the individual PHY devices connected to the
MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
Optional properties:
- mac-address: 6 bytes, mac address
Examples:
ethernet@c0fc2000 {
compatible = "snps,arc-emac";
reg = <0xc0fc2000 0x3c>;
interrupts = <6>;
mac-address = [ 00 11 22 33 44 55 ];
clock-frequency = <80000000>;
max-speed = <100>;
phy = <&phy0>;
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <1>;
};
};
......@@ -24,6 +24,7 @@ source "drivers/net/ethernet/allwinner/Kconfig"
source "drivers/net/ethernet/alteon/Kconfig"
source "drivers/net/ethernet/amd/Kconfig"
source "drivers/net/ethernet/apple/Kconfig"
source "drivers/net/ethernet/arc/Kconfig"
source "drivers/net/ethernet/atheros/Kconfig"
source "drivers/net/ethernet/cadence/Kconfig"
source "drivers/net/ethernet/adi/Kconfig"
......
......@@ -10,6 +10,7 @@ obj-$(CONFIG_NET_VENDOR_ALLWINNER) += allwinner/
obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/
obj-$(CONFIG_NET_VENDOR_AMD) += amd/
obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
obj-$(CONFIG_NET_VENDOR_ARC) += arc/
obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/
obj-$(CONFIG_NET_CADENCE) += cadence/
obj-$(CONFIG_NET_BFIN) += adi/
......
#
# ARC EMAC network device configuration
#
config NET_VENDOR_ARC
bool "ARC devices"
default y
---help---
If you have a network (Ethernet) card belonging to this class, say Y
and read the Ethernet-HOWTO, available from
<http://www.tldp.org/docs.html#howto>.
Note that the answer to this question doesn't directly affect the
kernel: saying N will just cause the configurator to skip all
the questions about ARC cards. If you say Y, you will be asked for
your specific card in the following questions.
if NET_VENDOR_ARC
config ARC_EMAC
tristate "ARC EMAC support"
select MII
select PHYLIB
depends on OF_IRQ
depends on OF_NET
---help---
On some legacy ARC (Synopsys) FPGA boards such as ARCAngel4/ML50x
non-standard on-chip ethernet device ARC EMAC 10/100 is used.
Say Y here if you have such a board. If unsure, say N.
endif # NET_VENDOR_ARC
#
# Makefile for the ARC network device drivers.
#
arc_emac-objs := emac_main.o emac_mdio.o
obj-$(CONFIG_ARC_EMAC) += arc_emac.o
/*
* Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
*
* Registers and bits definitions of ARC EMAC
*/
#ifndef ARC_EMAC_H
#define ARC_EMAC_H
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/netdevice.h>
#include <linux/phy.h>
/* STATUS and ENABLE Register bit masks */
#define TXINT_MASK (1<<0) /* Transmit interrupt */
#define RXINT_MASK (1<<1) /* Receive interrupt */
#define ERR_MASK (1<<2) /* Error interrupt */
#define TXCH_MASK (1<<3) /* Transmit chaining error interrupt */
#define MSER_MASK (1<<4) /* Missed packet counter error */
#define RXCR_MASK (1<<8) /* RXCRCERR counter rolled over */
#define RXFR_MASK (1<<9) /* RXFRAMEERR counter rolled over */
#define RXFL_MASK (1<<10) /* RXOFLOWERR counter rolled over */
#define MDIO_MASK (1<<12) /* MDIO complete interrupt */
#define TXPL_MASK (1<<31) /* Force polling of BD by EMAC */
/* CONTROL Register bit masks */
#define EN_MASK (1<<0) /* VMAC enable */
#define TXRN_MASK (1<<3) /* TX enable */
#define RXRN_MASK (1<<4) /* RX enable */
#define DSBC_MASK (1<<8) /* Disable receive broadcast */
#define ENFL_MASK (1<<10) /* Enable Full-duplex */
#define PROM_MASK (1<<11) /* Promiscuous mode */
/* Buffer descriptor INFO bit masks */
#define OWN_MASK (1<<31) /* 0-CPU owns buffer, 1-EMAC owns buffer */
#define FIRST_MASK (1<<16) /* First buffer in chain */
#define LAST_MASK (1<<17) /* Last buffer in chain */
#define LEN_MASK 0x000007FF /* last 11 bits */
#define CRLS (1<<21)
#define DEFR (1<<22)
#define DROP (1<<23)
#define RTRY (1<<24)
#define LTCL (1<<28)
#define UFLO (1<<29)
#define FOR_EMAC OWN_MASK
#define FOR_CPU 0
/* ARC EMAC register set combines entries for MAC and MDIO */
enum {
R_ID = 0,
R_STATUS,
R_ENABLE,
R_CTRL,
R_POLLRATE,
R_RXERR,
R_MISS,
R_TX_RING,
R_RX_RING,
R_ADDRL,
R_ADDRH,
R_LAFL,
R_LAFH,
R_MDIO,
};
#define TX_TIMEOUT (400*HZ/1000) /* Transmission timeout */
#define ARC_EMAC_NAPI_WEIGHT 40 /* Workload for NAPI */
#define EMAC_BUFFER_SIZE 1536 /* EMAC buffer size */
/**
* struct arc_emac_bd - EMAC buffer descriptor (BD).
*
* @info: Contains status information on the buffer itself.
* @data: 32-bit byte addressable pointer to the packet data.
*/
struct arc_emac_bd {
__le32 info;
dma_addr_t data;
};
/* Number of Rx/Tx BD's */
#define RX_BD_NUM 128
#define TX_BD_NUM 128
#define RX_RING_SZ (RX_BD_NUM * sizeof(struct arc_emac_bd))
#define TX_RING_SZ (TX_BD_NUM * sizeof(struct arc_emac_bd))
/**
* struct buffer_state - Stores Rx/Tx buffer state.
* @sk_buff: Pointer to socket buffer.
* @addr: Start address of DMA-mapped memory region.
* @len: Length of DMA-mapped memory region.
*/
struct buffer_state {
struct sk_buff *skb;
DEFINE_DMA_UNMAP_ADDR(addr);
DEFINE_DMA_UNMAP_LEN(len);
};
/**
* struct arc_emac_priv - Storage of EMAC's private information.
* @dev: Pointer to the current device.
* @ndev: Pointer to the current network device.
* @phy_dev: Pointer to attached PHY device.
* @bus: Pointer to the current MII bus.
* @regs: Base address of EMAC memory-mapped control registers.
* @napi: Structure for NAPI.
* @stats: Network device statistics.
* @rxbd: Pointer to Rx BD ring.
* @txbd: Pointer to Tx BD ring.
* @rxbd_dma: DMA handle for Rx BD ring.
* @txbd_dma: DMA handle for Tx BD ring.
* @rx_buff: Storage for Rx buffers states.
* @tx_buff: Storage for Tx buffers states.
* @txbd_curr: Index of Tx BD to use on the next "ndo_start_xmit".
* @txbd_dirty: Index of Tx BD to free on the next Tx interrupt.
* @last_rx_bd: Index of the last Rx BD we've got from EMAC.
* @link: PHY's last seen link state.
* @duplex: PHY's last set duplex mode.
* @speed: PHY's last set speed.
* @max_speed: Maximum supported by current system network data-rate.
*/
struct arc_emac_priv {
/* Devices */
struct device *dev;
struct net_device *ndev;
struct phy_device *phy_dev;
struct mii_bus *bus;
void __iomem *regs;
struct napi_struct napi;
struct net_device_stats stats;
struct arc_emac_bd *rxbd;
struct arc_emac_bd *txbd;
dma_addr_t rxbd_dma;
dma_addr_t txbd_dma;
struct buffer_state rx_buff[RX_BD_NUM];
struct buffer_state tx_buff[TX_BD_NUM];
unsigned int txbd_curr;
unsigned int txbd_dirty;
unsigned int last_rx_bd;
unsigned int link;
unsigned int duplex;
unsigned int speed;
unsigned int max_speed;
};
/**
* arc_reg_set - Sets EMAC register with provided value.
* @priv: Pointer to ARC EMAC private data structure.
* @reg: Register offset from base address.
* @value: Value to set in register.
*/
static inline void arc_reg_set(struct arc_emac_priv *priv, int reg, int value)
{
iowrite32(value, priv->regs + reg * sizeof(int));
}
/**
* arc_reg_get - Gets value of specified EMAC register.
* @priv: Pointer to ARC EMAC private data structure.
* @reg: Register offset from base address.
*
* returns: Value of requested register.
*/
static inline unsigned int arc_reg_get(struct arc_emac_priv *priv, int reg)
{
return ioread32(priv->regs + reg * sizeof(int));
}
/**
* arc_reg_or - Applies mask to specified EMAC register - ("reg" | "mask").
* @priv: Pointer to ARC EMAC private data structure.
* @reg: Register offset from base address.
* @mask: Mask to apply to specified register.
*
* This function reads initial register value, then applies provided mask
* to it and then writes register back.
*/
static inline void arc_reg_or(struct arc_emac_priv *priv, int reg, int mask)
{
unsigned int value = arc_reg_get(priv, reg);
arc_reg_set(priv, reg, value | mask);
}
/**
* arc_reg_clr - Applies mask to specified EMAC register - ("reg" & ~"mask").
* @priv: Pointer to ARC EMAC private data structure.
* @reg: Register offset from base address.
* @mask: Mask to apply to specified register.
*
* This function reads initial register value, then applies provided mask
* to it and then writes register back.
*/
static inline void arc_reg_clr(struct arc_emac_priv *priv, int reg, int mask)
{
unsigned int value = arc_reg_get(priv, reg);
arc_reg_set(priv, reg, value & ~mask);
}
int arc_mdio_probe(struct platform_device *pdev, struct arc_emac_priv *priv);
int arc_mdio_remove(struct arc_emac_priv *priv);
#endif /* ARC_EMAC_H */
此差异已折叠。
/*
* Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
*
* MDIO implementation for ARC EMAC
*/
#include <linux/delay.h>
#include <linux/of_mdio.h>
#include <linux/platform_device.h>
#include "emac.h"
/* Number of seconds we wait for "MDIO complete" flag to appear */
#define ARC_MDIO_COMPLETE_POLL_COUNT 1
/**
* arc_mdio_complete_wait - Waits until MDIO transaction is completed.
* @priv: Pointer to ARC EMAC private data structure.
*
* returns: 0 on success, -ETIMEDOUT on a timeout.
*/
static int arc_mdio_complete_wait(struct arc_emac_priv *priv)
{
unsigned int i;
for (i = 0; i < ARC_MDIO_COMPLETE_POLL_COUNT * 40; i++) {
unsigned int status = arc_reg_get(priv, R_STATUS);
status &= MDIO_MASK;
if (status) {
/* Reset "MDIO complete" flag */
arc_reg_set(priv, R_STATUS, status);
return 0;
}
msleep(25);
}
return -ETIMEDOUT;
}
/**
* arc_mdio_read - MDIO interface read function.
* @bus: Pointer to MII bus structure.
* @phy_addr: Address of the PHY device.
* @reg_num: PHY register to read.
*
* returns: The register contents on success, -ETIMEDOUT on a timeout.
*
* Reads the contents of the requested register from the requested PHY
* address.
*/
static int arc_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num)
{
struct arc_emac_priv *priv = bus->priv;
unsigned int value;
int error;
arc_reg_set(priv, R_MDIO,
0x60020000 | (phy_addr << 23) | (reg_num << 18));
error = arc_mdio_complete_wait(priv);
if (error < 0)
return error;
value = arc_reg_get(priv, R_MDIO) & 0xffff;
dev_dbg(priv->dev, "arc_mdio_read(phy_addr=%i, reg_num=%x) = %x\n",
phy_addr, reg_num, value);
return value;
}
/**
* arc_mdio_write - MDIO interface write function.
* @bus: Pointer to MII bus structure.
* @phy_addr: Address of the PHY device.
* @reg_num: PHY register to write to.
* @value: Value to be written into the register.
*
* returns: 0 on success, -ETIMEDOUT on a timeout.
*
* Writes the value to the requested register.
*/
static int arc_mdio_write(struct mii_bus *bus, int phy_addr,
int reg_num, u16 value)
{
struct arc_emac_priv *priv = bus->priv;
dev_dbg(priv->dev,
"arc_mdio_write(phy_addr=%i, reg_num=%x, value=%x)\n",
phy_addr, reg_num, value);
arc_reg_set(priv, R_MDIO,
0x50020000 | (phy_addr << 23) | (reg_num << 18) | value);
return arc_mdio_complete_wait(priv);
}
/**
* arc_mdio_probe - MDIO probe function.
* @pdev: Pointer to platform device.
* @priv: Pointer to ARC EMAC private data structure.
*
* returns: 0 on success, -ENOMEM when mdiobus_alloc
* (to allocate memory for MII bus structure) fails.
*
* Sets up and registers the MDIO interface.
*/
int arc_mdio_probe(struct platform_device *pdev, struct arc_emac_priv *priv)
{
struct mii_bus *bus;
int error;
bus = mdiobus_alloc();
if (!bus)
return -ENOMEM;
priv->bus = bus;
bus->priv = priv;
bus->parent = priv->dev;
bus->name = "Synopsys MII Bus",
bus->read = &arc_mdio_read;
bus->write = &arc_mdio_write;
snprintf(bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
error = of_mdiobus_register(bus, pdev->dev.of_node);
if (error) {
dev_err(priv->dev, "cannot register MDIO bus %s\n", bus->name);
mdiobus_free(bus);
return error;
}
return 0;
}
/**
* arc_mdio_remove - MDIO remove function.
* @priv: Pointer to ARC EMAC private data structure.
*
* Unregisters the MDIO and frees any associate memory for MII bus.
*/
int arc_mdio_remove(struct arc_emac_priv *priv)
{
mdiobus_unregister(priv->bus);
mdiobus_free(priv->bus);
priv->bus = NULL;
return 0;
}
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