提交 d39fe4e5 编写于 作者: R Rafael J. Wysocki

tty / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM

After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is
selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks
depending on CONFIG_PM_RUNTIME may now be changed to depend on
CONFIG_PM.

Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere under
drivers/tty/.
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
上级 ec833050
......@@ -489,7 +489,7 @@ static int dw8250_resume(struct device *dev)
}
#endif /* CONFIG_PM_SLEEP */
#ifdef CONFIG_PM_RUNTIME
#ifdef CONFIG_PM
static int dw8250_runtime_suspend(struct device *dev)
{
struct dw8250_data *data = dev_get_drvdata(dev);
......
......@@ -244,7 +244,7 @@ static int mtk8250_resume(struct device *dev)
}
#endif /* CONFIG_PM_SLEEP */
#ifdef CONFIG_PM_RUNTIME
#ifdef CONFIG_PM
static int mtk8250_runtime_suspend(struct device *dev)
{
struct mtk8250_data *data = dev_get_drvdata(dev);
......
......@@ -1252,12 +1252,7 @@ static int serial_hsu_resume(struct pci_dev *pdev)
}
return 0;
}
#else
#define serial_hsu_suspend NULL
#define serial_hsu_resume NULL
#endif
#ifdef CONFIG_PM_RUNTIME
static int serial_hsu_runtime_idle(struct device *dev)
{
pm_schedule_suspend(dev, 500);
......@@ -1274,6 +1269,8 @@ static int serial_hsu_runtime_resume(struct device *dev)
return 0;
}
#else
#define serial_hsu_suspend NULL
#define serial_hsu_resume NULL
#define serial_hsu_runtime_idle NULL
#define serial_hsu_runtime_suspend NULL
#define serial_hsu_runtime_resume NULL
......
......@@ -1792,7 +1792,7 @@ static void __exit msm_serial_hs_exit(void)
}
module_exit(msm_serial_hs_exit);
#ifdef CONFIG_PM_RUNTIME
#ifdef CONFIG_PM
static int msm_hs_runtime_idle(struct device *dev)
{
/*
......
......@@ -1799,7 +1799,7 @@ static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
}
}
#ifdef CONFIG_PM_RUNTIME
#ifdef CONFIG_PM
static void serial_omap_restore_context(struct uart_omap_port *up)
{
if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
......
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