提交 af096046 编写于 作者: J Jeff Garzik 提交者: David S. Miller

[netdrvr] skfp: remove a bunch of dead code

The driver has not compiled in anything except PCI support for many
years (see drivers/net/skfp/Makefile).  This driver is also unmaintained
for many years, so arguments for keeping the cross-OS, cross-bus (ISA,
EISA, MCA) code do not exist.
Signed-off-by: NJeff Garzik <jeff@garzik.org>
上级 7856a541
......@@ -43,25 +43,6 @@ static const char ID_sccs[] = "@(#)drvfbi.c 1.63 99/02/11 (C) SK " ;
/*
* valid configuration values are:
*/
#ifdef ISA
const int opt_ints[] = {8, 3, 4, 5, 9, 10, 11, 12, 15} ;
const int opt_iops[] = {8,
0x100, 0x120, 0x180, 0x1a0, 0x220, 0x240, 0x320, 0x340};
const int opt_dmas[] = {4, 3, 5, 6, 7} ;
const int opt_eproms[] = {15, 0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
#endif
#ifdef EISA
const int opt_ints[] = {5, 9, 10, 11} ;
const int opt_dmas[] = {0, 5, 6, 7} ;
const int opt_eproms[] = {0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
#endif
#ifdef MCA
int opt_ints[] = {3, 11, 10, 9} ; /* FM1 */
int opt_eproms[] = {0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4, 0xd8, 0xdc} ;
#endif /* MCA */
/*
* xPOS_ID:xxxx
......@@ -78,17 +59,9 @@ int opt_eproms[] = {0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4, 0xd8, 0xdc} ;
*/
#ifndef MULT_OEM
#ifndef OEM_CONCEPT
#ifndef MCA
const u_char oem_id[] = "xPOS_ID:xxxx" ;
#else
const u_char oem_id[] = "xPOSID1:xxxx" ; /* FM1 card id. */
#endif
#else /* OEM_CONCEPT */
#ifndef MCA
const u_char oem_id[] = OEM_ID ;
#else
const u_char oem_id[] = OEM_ID1 ; /* FM1 card id. */
#endif /* MCA */
#endif /* OEM_CONCEPT */
#define ID_BYTE0 8
#define OEMID(smc,i) oem_id[ID_BYTE0 + i]
......@@ -109,23 +82,6 @@ extern int AIX_vpdReadByte() ;
/* Prototype of a local function. */
static void smt_stop_watchdog(struct s_smc *smc);
#ifdef MCA
static int read_card_id() ;
static void DisableSlotAccess() ;
static void EnableSlotAccess() ;
#ifdef AIX
extern int attach_POS_addr() ;
extern int detach_POS_addr() ;
extern u_char read_POS() ;
extern void write_POS() ;
extern int AIX_vpdReadByte() ;
#else
#define read_POS(smc,a1,a2) ((u_char) inp(a1))
#define write_POS(smc,a1,a2,a3) outp((a1),(a3))
#endif
#endif /* MCA */
/*
* FDDI card reset
*/
......@@ -139,51 +95,6 @@ static void card_start(struct s_smc *smc)
smt_stop_watchdog(smc) ;
#ifdef ISA
outpw(CSR_A,0) ; /* reset for all chips */
for (i = 10 ; i ; i--) /* delay for PLC's */
(void)inpw(ISR_A) ;
OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(2)) ;
/* counter 2, mode 2 */
OUT_82c54_TIMER(2,97) ; /* LSB */
OUT_82c54_TIMER(2,0) ; /* MSB ( 15.6 us ) */
outpw(CSR_A,CS_CRESET) ;
#endif
#ifdef EISA
outpw(CSR_A,0) ; /* reset for all chips */
for (i = 10 ; i ; i--) /* delay for PLC's */
(void)inpw(ISR_A) ;
outpw(CSR_A,CS_CRESET) ;
smc->hw.led = (2<<6) ;
outpw(CSR_A,CS_CRESET | smc->hw.led) ;
#endif
#ifdef MCA
outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
for (i = 10 ; i ; i--) /* delay for PLC's */
(void)inpw(ISR_A) ;
outp(ADDR(CARD_EN),0) ;
/* first I/O after reset must not be a access to FORMAC or PLC */
/*
* bus timeout (MCA)
*/
OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(3)) ;
/* counter 2, mode 3 */
OUT_82c54_TIMER(2,(2*24)) ; /* 3.9 us * 2 square wave */
OUT_82c54_TIMER(2,0) ; /* MSB */
/* POS 102 indicated an activ Check Line or Buss Error monitoring */
if (inpw(CSA_A) & (POS_EN_CHKINT | POS_EN_BUS_ERR)) {
outp(ADDR(IRQ_CHCK_EN),0) ;
}
if (!((i = inpw(CSR_A)) & CS_SAS)) {
if (!(i & CS_BYSTAT)) {
outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
}
}
outpw(LEDR_A,LED_1) ; /* yellow */
#endif /* MCA */
#ifdef PCI
/*
* make sure no transfer activity is pending
......@@ -253,15 +164,7 @@ void card_stop(struct s_smc *smc)
{
smt_stop_watchdog(smc) ;
smc->hw.mac_ring_is_up = 0 ; /* ring down */
#ifdef ISA
outpw(CSR_A,0) ; /* reset for all chips */
#endif
#ifdef EISA
outpw(CSR_A,0) ; /* reset for all chips */
#endif
#ifdef MCA
outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
#endif
#ifdef PCI
/*
* make sure no transfer activity is pending
......@@ -284,60 +187,6 @@ void mac1_irq(struct s_smc *smc, u_short stu, u_short stl)
{
int restart_tx = 0 ;
again:
#ifndef PCI
#ifndef ISA
/*
* FORMAC+ bug modified the queue pointer if many read/write accesses happens!?
*/
if (stl & (FM_SPCEPDS | /* parit/coding err. syn.q.*/
FM_SPCEPDA0 | /* parit/coding err. a.q.0 */
FM_SPCEPDA1 | /* parit/coding err. a.q.1 */
FM_SPCEPDA2)) { /* parit/coding err. a.q.2 */
SMT_PANIC(smc,SMT_E0132, SMT_E0132_MSG) ;
}
if (stl & (FM_STBURS | /* tx buffer underrun syn.q.*/
FM_STBURA0 | /* tx buffer underrun a.q.0 */
FM_STBURA1 | /* tx buffer underrun a.q.1 */
FM_STBURA2)) { /* tx buffer underrun a.q.2 */
SMT_PANIC(smc,SMT_E0133, SMT_E0133_MSG) ;
}
#endif
if ( (stu & (FM_SXMTABT | /* transmit abort */
#ifdef SYNC
FM_STXABRS | /* syn. tx abort */
#endif /* SYNC */
FM_STXABRA0)) || /* asyn. tx abort */
(stl & (FM_SQLCKS | /* lock for syn. q. */
FM_SQLCKA0)) ) { /* lock for asyn. q. */
formac_tx_restart(smc) ; /* init tx */
restart_tx = 1 ;
stu = inpw(FM_A(FM_ST1U)) ;
stl = inpw(FM_A(FM_ST1L)) ;
stu &= ~ (FM_STECFRMA0 | FM_STEFRMA0 | FM_STEFRMS) ;
if (stu || stl)
goto again ;
}
#ifndef SYNC
if (stu & (FM_STECFRMA0 | /* end of chain asyn tx */
FM_STEFRMA0)) { /* end of frame asyn tx */
/* free tx_queue */
smc->hw.n_a_send = 0 ;
if (++smc->hw.fp.tx_free < smc->hw.fp.tx_max) {
start_next_send(smc);
}
restart_tx = 1 ;
}
#else /* SYNC */
if (stu & (FM_STEFRMA0 | /* end of asyn tx */
FM_STEFRMS)) { /* end of sync tx */
restart_tx = 1 ;
}
#endif /* SYNC */
if (restart_tx)
llc_restart_tx(smc) ;
}
#else /* PCI */
/*
* parity error: note encoding error is not possible in tag mode
......@@ -378,7 +227,7 @@ void mac1_irq(struct s_smc *smc, u_short stu, u_short stl)
if (restart_tx)
llc_restart_tx(smc) ;
}
#endif /* PCI */
/*
* interrupt source= plc1
* this function is called in nwfbisr.asm
......@@ -387,10 +236,6 @@ void plc1_irq(struct s_smc *smc)
{
u_short st = inpw(PLC(PB,PL_INTR_EVENT)) ;
#if (defined(ISA) || defined(EISA))
/* reset PLC Int. bits */
outpw(PLC1_I,inpw(PLC1_I)) ;
#endif
plc_irq(smc,PB,st) ;
}
......@@ -402,10 +247,6 @@ void plc2_irq(struct s_smc *smc)
{
u_short st = inpw(PLC(PA,PL_INTR_EVENT)) ;
#if (defined(ISA) || defined(EISA))
/* reset PLC Int. bits */
outpw(PLC2_I,inpw(PLC2_I)) ;
#endif
plc_irq(smc,PA,st) ;
}
......@@ -446,43 +287,15 @@ void read_address(struct s_smc *smc, u_char *mac_addr)
char PmdType ;
int i ;
#if (defined(ISA) || defined(MCA))
for (i = 0; i < 4 ;i++) { /* read mac address from board */
smc->hw.fddi_phys_addr.a[i] =
bitrev8(inpw(PR_A(i+SA_MAC)));
}
for (i = 4; i < 6; i++) {
smc->hw.fddi_phys_addr.a[i] =
bitrev8(inpw(PR_A(i+SA_MAC+PRA_OFF)));
}
#endif
#ifdef EISA
/*
* Note: We get trouble on an Alpha machine if we make a inpw()
* instead of inp()
*/
for (i = 0; i < 4 ;i++) { /* read mac address from board */
smc->hw.fddi_phys_addr.a[i] =
bitrev8(inp(PR_A(i+SA_MAC)));
}
for (i = 4; i < 6; i++) {
smc->hw.fddi_phys_addr.a[i] =
bitrev8(inp(PR_A(i+SA_MAC+PRA_OFF)));
}
#endif
#ifdef PCI
for (i = 0; i < 6; i++) { /* read mac address from board */
smc->hw.fddi_phys_addr.a[i] =
bitrev8(inp(ADDR(B2_MAC_0+i)));
}
#endif
#ifndef PCI
ConnectorType = inpw(PR_A(SA_PMD_TYPE)) & 0xff ;
PmdType = inpw(PR_A(SA_PMD_TYPE+1)) & 0xff ;
#else
ConnectorType = inp(ADDR(B2_CONN_TYP)) ;
PmdType = inp(ADDR(B2_PMD_TYP)) ;
#endif
smc->y[PA].pmd_type[PMD_SK_CONN] =
smc->y[PB].pmd_type[PMD_SK_CONN] = ConnectorType ;
......@@ -512,20 +325,12 @@ void init_board(struct s_smc *smc, u_char *mac_addr)
card_start(smc) ;
read_address(smc,mac_addr) ;
#ifndef PCI
if (inpw(CSR_A) & CS_SAS)
#else
if (!(inp(ADDR(B0_DAS)) & DAS_AVAIL))
#endif
smc->s.sas = SMT_SAS ; /* Single att. station */
else
smc->s.sas = SMT_DAS ; /* Dual att. station */
#ifndef PCI
if (inpw(CSR_A) & CS_BYSTAT)
#else
if (!(inp(ADDR(B0_DAS)) & DAS_BYP_ST))
#endif
smc->mib.fddiSMTBypassPresent = 0 ;
/* without opt. bypass */
else
......@@ -538,42 +343,12 @@ void init_board(struct s_smc *smc, u_char *mac_addr)
*/
void sm_pm_bypass_req(struct s_smc *smc, int mode)
{
#if (defined(ISA) || defined(EISA))
int csra_v ;
#endif
DB_ECMN(1,"ECM : sm_pm_bypass_req(%s)\n",(mode == BP_INSERT) ?
"BP_INSERT" : "BP_DEINSERT",0) ;
if (smc->s.sas != SMT_DAS)
return ;
#if (defined(ISA) || defined(EISA))
csra_v = inpw(CSR_A) & ~CS_BYPASS ;
#ifdef EISA
csra_v |= smc->hw.led ;
#endif
switch(mode) {
case BP_INSERT :
outpw(CSR_A,csra_v | CS_BYPASS) ;
break ;
case BP_DEINSERT :
outpw(CSR_A,csra_v) ;
break ;
}
#endif /* ISA / EISA */
#ifdef MCA
switch(mode) {
case BP_INSERT :
outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
break ;
case BP_DEINSERT :
outp(ADDR(BYPASS(STAT_BYP)),0) ; /* bypass station */
break ;
}
#endif
#ifdef PCI
switch(mode) {
case BP_INSERT :
......@@ -591,31 +366,14 @@ void sm_pm_bypass_req(struct s_smc *smc, int mode)
*/
int sm_pm_bypass_present(struct s_smc *smc)
{
#ifndef PCI
return( (inpw(CSR_A) & CS_BYSTAT) ? FALSE : TRUE ) ;
#else
return( (inp(ADDR(B0_DAS)) & DAS_BYP_ST) ? TRUE: FALSE) ;
#endif
}
void plc_clear_irq(struct s_smc *smc, int p)
{
SK_UNUSED(p) ;
#if (defined(ISA) || defined(EISA))
switch (p) {
case PA :
/* reset PLC Int. bits */
outpw(PLC2_I,inpw(PLC2_I)) ;
break ;
case PB :
/* reset PLC Int. bits */
outpw(PLC1_I,inpw(PLC1_I)) ;
break ;
}
#else
SK_UNUSED(smc) ;
#endif
}
......@@ -645,51 +403,6 @@ static void led_indication(struct s_smc *smc, int led_event)
phy = &smc->y[PB] ;
mib_b = phy->mib ;
#ifdef EISA
/* Ring up = yellow led OFF*/
if (led_event == LED_Y_ON) {
smc->hw.led |= CS_LED_1 ;
}
else if (led_event == LED_Y_OFF) {
smc->hw.led &= ~CS_LED_1 ;
}
else {
/* Link at Port A or B = green led ON */
if (mib_a->fddiPORTPCMState == PC8_ACTIVE ||
mib_b->fddiPORTPCMState == PC8_ACTIVE) {
smc->hw.led |= CS_LED_0 ;
}
else {
smc->hw.led &= ~CS_LED_0 ;
}
}
#endif
#ifdef MCA
led_state = inpw(LEDR_A) ;
/* Ring up = yellow led OFF*/
if (led_event == LED_Y_ON) {
led_state |= LED_1 ;
}
else if (led_event == LED_Y_OFF) {
led_state &= ~LED_1 ;
}
else {
led_state &= ~(LED_2|LED_0) ;
/* Link at Port A = green led A ON */
if (mib_a->fddiPORTPCMState == PC8_ACTIVE) {
led_state |= LED_2 ;
}
/* Link at Port B/S = green led B ON */
if (mib_b->fddiPORTPCMState == PC8_ACTIVE) {
led_state |= LED_0 ;
}
}
outpw(LEDR_A, led_state) ;
#endif /* MCA */
#ifdef PCI
led_state = 0 ;
......@@ -824,406 +537,6 @@ int set_oi_id_def(struct s_smc *smc)
}
#endif /* MULT_OEM */
#ifdef MCA
/************************
*
* BEGIN_MANUAL_ENTRY()
*
* exist_board
*
* Check if an MCA board is present in the specified slot.
*
* int exist_board(
* struct s_smc *smc,
* int slot) ;
* In
* smc - A pointer to the SMT Context struct.
*
* slot - The number of the slot to inspect.
* Out
* 0 = No adapter present.
* 1 = Found FM1 adapter.
*
* Pseudo
* Read MCA ID
* for all valid OEM_IDs
* compare with ID read
* if equal, return 1
* return(0
*
* Note
* The smc pointer must be valid now.
*
* END_MANUAL_ENTRY()
*
************************/
#define LONG_CARD_ID(lo, hi) ((((hi) & 0xff) << 8) | ((lo) & 0xff))
int exist_board(struct s_smc *smc, int slot)
{
#ifdef MULT_OEM
SK_LOC_DECL(u_char,id[2]) ;
int idi ;
#endif /* MULT_OEM */
/* No longer valid. */
if (smc == NULL)
return(0) ;
#ifndef MULT_OEM
if (read_card_id(smc, slot)
== LONG_CARD_ID(OEMID(smc,0), OEMID(smc,1)))
return (1) ; /* Found FM adapter. */
#else /* MULT_OEM */
idi = read_card_id(smc, slot) ;
id[0] = idi & 0xff ;
id[1] = idi >> 8 ;
smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
continue ;
if (is_equal_num(&id[0],&OEMID(smc,0),2))
return (1) ;
}
#endif /* MULT_OEM */
return (0) ; /* No adapter found. */
}
/************************
*
* read_card_id
*
* Read the MCA card id from the specified slot.
* In
* smc - A pointer to the SMT Context struct.
* CAVEAT: This pointer may be NULL and *must not* be used within this
* function. It's only purpose is for drivers that need some information
* for the inp() and outp() macros.
*
* slot - The number of the slot for which the card id is returned.
* Out
* Returns the card id read from the specified slot. If an illegal slot
* number is specified, the function returns zero.
*
************************/
static int read_card_id(struct s_smc *smc, int slot)
/* struct s_smc *smc ; Do not use. */
{
int card_id ;
SK_UNUSED(smc) ; /* Make LINT happy. */
if ((slot < 1) || (slot > 15)) /* max 16 slots, 0 = motherboard */
return (0) ; /* Illegal slot number specified. */
EnableSlotAccess(smc, slot) ;
card_id = ((read_POS(smc,POS_ID_HIGH,slot - 1) & 0xff) << 8) |
(read_POS(smc,POS_ID_LOW,slot - 1) & 0xff) ;
DisableSlotAccess(smc) ;
return (card_id) ;
}
/************************
*
* BEGIN_MANUAL_ENTRY()
*
* get_board_para
*
* Get adapter configuration information. Fill all board specific
* parameters within the 'smc' structure.
*
* int get_board_para(
* struct s_smc *smc,
* int slot) ;
* In
* smc - A pointer to the SMT Context struct, to which this function will
* write some adapter configuration data.
*
* slot - The number of the slot, in which the adapter is installed.
* Out
* 0 = No adapter present.
* 1 = Ok.
* 2 = Adapter present, but card enable bit not set.
*
* END_MANUAL_ENTRY()
*
************************/
int get_board_para(struct s_smc *smc, int slot)
{
int val ;
int i ;
/* Check if adapter present & get type of adapter. */
switch (exist_board(smc, slot)) {
case 0: /* Adapter not present. */
return (0) ;
case 1: /* FM Rev. 1 */
smc->hw.rev = FM1_REV ;
smc->hw.VFullRead = 0x0a ;
smc->hw.VFullWrite = 0x05 ;
smc->hw.DmaWriteExtraBytes = 8 ; /* 2 extra words. */
break ;
}
smc->hw.slot = slot ;
EnableSlotAccess(smc, slot) ;
if (!(read_POS(smc,POS_102, slot - 1) & POS_CARD_EN)) {
DisableSlotAccess(smc) ;
return (2) ; /* Card enable bit not set. */
}
val = read_POS(smc,POS_104, slot - 1) ; /* I/O, IRQ */
#ifndef MEM_MAPPED_IO /* is defined by the operating system */
i = val & POS_IOSEL ; /* I/O base addr. (0x0200 .. 0xfe00) */
smc->hw.iop = (i + 1) * 0x0400 - 0x200 ;
#endif
i = ((val & POS_IRQSEL) >> 6) & 0x03 ; /* IRQ <0, 1> */
smc->hw.irq = opt_ints[i] ;
/* FPROM base addr. */
i = ((read_POS(smc,POS_103, slot - 1) & POS_MSEL) >> 4) & 0x07 ;
smc->hw.eprom = opt_eproms[i] ;
DisableSlotAccess(smc) ;
/* before this, the smc->hw.iop must be set !!! */
smc->hw.slot_32 = inpw(CSF_A) & SLOT_32 ;
return (1) ;
}
/* Enable access to specified MCA slot. */
static void EnableSlotAccess(struct s_smc *smc, int slot)
{
SK_UNUSED(slot) ;
#ifndef AIX
SK_UNUSED(smc) ;
/* System mode. */
outp(POS_SYS_SETUP, POS_SYSTEM) ;
/* Select slot. */
outp(POS_CHANNEL_POS, POS_CHANNEL_BIT | (slot-1)) ;
#else
attach_POS_addr (smc) ;
#endif
}
/* Disable access to MCA slot formerly enabled via EnableSlotAccess(). */
static void DisableSlotAccess(struct s_smc *smc)
{
#ifndef AIX
SK_UNUSED(smc) ;
outp(POS_CHANNEL_POS, 0) ;
#else
detach_POS_addr (smc) ;
#endif
}
#endif /* MCA */
#ifdef EISA
#ifndef MEM_MAPPED_IO
#define SADDR(slot) (((slot)<<12)&0xf000)
#else /* MEM_MAPPED_IO */
#define SADDR(slot) (smc->hw.iop)
#endif /* MEM_MAPPED_IO */
/************************
*
* BEGIN_MANUAL_ENTRY()
*
* exist_board
*
* Check if an EISA board is present in the specified slot.
*
* int exist_board(
* struct s_smc *smc,
* int slot) ;
* In
* smc - A pointer to the SMT Context struct.
*
* slot - The number of the slot to inspect.
* Out
* 0 = No adapter present.
* 1 = Found adapter.
*
* Pseudo
* Read EISA ID
* for all valid OEM_IDs
* compare with ID read
* if equal, return 1
* return(0
*
* Note
* The smc pointer must be valid now.
*
************************/
int exist_board(struct s_smc *smc, int slot)
{
int i ;
#ifdef MULT_OEM
SK_LOC_DECL(u_char,id[4]) ;
#endif /* MULT_OEM */
/* No longer valid. */
if (smc == NULL)
return(0);
SK_UNUSED(slot) ;
#ifndef MULT_OEM
for (i = 0 ; i < 4 ; i++) {
if (inp(SADDR(slot)+PRA(i)) != OEMID(smc,i))
return(0) ;
}
return(1) ;
#else /* MULT_OEM */
for (i = 0 ; i < 4 ; i++)
id[i] = inp(SADDR(slot)+PRA(i)) ;
smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
continue ;
if (is_equal_num(&id[0],&OEMID(smc,0),4))
return (1) ;
}
return (0) ; /* No adapter found. */
#endif /* MULT_OEM */
}
int get_board_para(struct s_smc *smc, int slot)
{
int i ;
if (!exist_board(smc,slot))
return(0) ;
smc->hw.slot = slot ;
#ifndef MEM_MAPPED_IO /* if defined by the operating system */
smc->hw.iop = SADDR(slot) ;
#endif
if (!(inp(C0_A(0))&CFG_CARD_EN)) {
return(2) ; /* CFG_CARD_EN bit not set! */
}
smc->hw.irq = opt_ints[(inp(C1_A(0)) & CFG_IRQ_SEL)] ;
smc->hw.dma = opt_dmas[((inp(C1_A(0)) & CFG_DRQ_SEL)>>3)] ;
if ((i = inp(C2_A(0)) & CFG_EPROM_SEL) != 0x0f)
smc->hw.eprom = opt_eproms[i] ;
else
smc->hw.eprom = 0 ;
smc->hw.DmaWriteExtraBytes = 8 ;
return(1) ;
}
#endif /* EISA */
#ifdef ISA
#ifndef MULT_OEM
const u_char sklogo[6] = SKLOGO_STR ;
#define SIZE_SKLOGO(smc) sizeof(sklogo)
#define SKLOGO(smc,i) sklogo[i]
#else /* MULT_OEM */
#define SIZE_SKLOGO(smc) smc->hw.oem_id->oi_logo_len
#define SKLOGO(smc,i) smc->hw.oem_id->oi_logo[i]
#endif /* MULT_OEM */
int exist_board(struct s_smc *smc, HW_PTR port)
{
int i ;
#ifdef MULT_OEM
int bytes_read ;
u_char board_logo[15] ;
SK_LOC_DECL(u_char,id[4]) ;
#endif /* MULT_OEM */
/* No longer valid. */
if (smc == NULL)
return(0);
SK_UNUSED(smc) ;
#ifndef MULT_OEM
for (i = SADDRL ; i < (signed) (SADDRL+SIZE_SKLOGO(smc)) ; i++) {
if ((u_char)inpw((PRA(i)+port)) != SKLOGO(smc,i-SADDRL)) {
return(0) ;
}
}
/* check MAC address (S&K or other) */
for (i = 0 ; i < 3 ; i++) {
if ((u_char)inpw((PRA(i)+port)) != OEMID(smc,i))
return(0) ;
}
return(1) ;
#else /* MULT_OEM */
smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
board_logo[0] = (u_char)inpw((PRA(SADDRL)+port)) ;
bytes_read = 1 ;
for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
continue ;
/* Test all read bytes with current OEM_entry */
/* for (i=0; (i<bytes_read) && (i < SIZE_SKLOGO(smc)); i++) { */
for (i = 0; i < bytes_read; i++) {
if (board_logo[i] != SKLOGO(smc,i))
break ;
}
/* If mismatch, switch to next OEM entry */
if ((board_logo[i] != SKLOGO(smc,i)) && (i < bytes_read))
continue ;
--i ;
while (bytes_read < SIZE_SKLOGO(smc)) {
// inpw next byte SK_Logo
i++ ;
board_logo[i] = (u_char)inpw((PRA(SADDRL+i)+port)) ;
bytes_read++ ;
if (board_logo[i] != SKLOGO(smc,i))
break ;
}
for (i = 0 ; i < 3 ; i++)
id[i] = (u_char)inpw((PRA(i)+port)) ;
if ((board_logo[i] == SKLOGO(smc,i))
&& (bytes_read == SIZE_SKLOGO(smc))) {
if (is_equal_num(&id[0],&OEMID(smc,0),3))
return(1);
}
} /* for */
return(0) ;
#endif /* MULT_OEM */
}
int get_board_para(struct s_smc *smc, int slot)
{
SK_UNUSED(smc) ;
SK_UNUSED(slot) ;
return(0) ; /* for ISA not supported */
}
#endif /* ISA */
#ifdef PCI
#ifdef USE_BIOS_FUN
int exist_board(struct s_smc *smc, int slot)
......
......@@ -15,11 +15,7 @@
#ifndef _MBUF_
#define _MBUF_
#ifndef PCI
#define M_SIZE 4550
#else
#define M_SIZE 4504
#endif
#ifndef MAX_MBUF
#define MAX_MBUF 4
......
此差异已折叠。
......@@ -22,32 +22,6 @@
*/
#define ERR_FLAGS (FS_MSRABT | FS_SEAC2 | FS_SFRMERR | FS_SFRMTY1)
#ifdef ISA
#define DMA_BUSY_CHECK CSRA
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT)
#define HRQR (RQAA+(RQ_RRQ<<1))
#define HRQW (RQAA+(RQ_WA2<<1))
#define HRQA0 (RQAA+(RQ_WA0<<1))
#define HRQSQ (RQAA+(RQ_WSQ<<1))
#endif
#ifdef EISA
#define DMA_BUSY_CHECK CSRA
#define DMA_HIGH_WORD 0x0400
#define DMA_MASK_M 0x0a
#define DMA_MODE_M 0x0b
#define DMA_BYTE_PTR_M 0x0c
#define DMA_MASK_S 0x0d4
#define DMA_MODE_S 0x0d6
#define DMA_BYTE_PTR_S 0x0d8
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TC)
#endif /* EISA */
#ifdef MCA
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TOKEN | \
IS_CHCK_L | IS_BUSERR)
#endif
#ifdef PCI
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TOKEN | \
IS_MINTR2 | IS_MINTR3 | IS_R1_P | \
......
......@@ -53,11 +53,6 @@ struct s_oem_ids {
u_char oi_sub_id[4] ; /* sub id bytes, representation as */
/* defined by hardware, */
#endif
#ifdef ISA
u_char oi_logo_len ; /* the length of the adapter logo */
u_char oi_logo[6] ; /* the adapter logo */
u_char oi_reserved1 ;
#endif /* ISA */
} ;
#endif /* MULT_OEM */
......@@ -70,43 +65,17 @@ struct s_smt_hw {
short dma ; /* DMA channel */
short irq ; /* IRQ level */
short eprom ; /* FLASH prom */
#ifndef PCI
short DmaWriteExtraBytes ; /* add bytes for DMA write */
#endif
#ifndef SYNC
u_short n_a_send ; /* pending send requests */
#endif
#if (defined(EISA) || defined(MCA) || defined(PCI))
#if defined(PCI)
short slot ; /* slot number */
short max_slots ; /* maximum number of slots */
#endif
#if (defined(PCI) || defined(MCA))
short wdog_used ; /* TRUE if the watch dog is used */
#endif
#ifdef MCA
short slot_32 ; /* 32bit slot (1) or 16bit slot (0) */
short rev ; /* Board revision (FMx_REV). */
short VFullRead ; /* V_full value for DMA read */
short VFullWrite ; /* V_full value for DMA write */
#endif
#ifdef EISA
short led ; /* LED for FE card */
short dma_rmode ; /* read mode */
short dma_wmode ; /* write mode */
short dma_emode ; /* extend mode */
/* DMA controller channel dependent io addresses */
u_short dma_base_word_count ;
u_short dma_base_address ;
u_short dma_base_address_page ;
#endif
#ifdef PCI
u_short pci_handle ; /* handle to access the BIOS func */
u_long is_imask ; /* int maske for the int source reg */
......
......@@ -77,25 +77,10 @@ void hwt_start(struct s_smc *smc, u_long time)
*/
if (!cnt)
cnt++ ;
#ifndef PCI
/*
* 6.25MHz -> CLK0 : T0 (cnt0 = 16us) -> OUT0
* OUT0 -> CLK1 : T1 (cnt1) OUT1 -> ISRA(IS_TIMINT)
*/
OUT_82c54_TIMER(3,1<<6 | 3<<4 | 0<<1) ; /* counter 1, mode 0 */
OUT_82c54_TIMER(1,cnt & 0xff) ; /* LSB */
OUT_82c54_TIMER(1,(cnt>>8) & 0xff) ; /* MSB */
/*
* start timer by switching counter 0 to mode 3
* T0 resolution 16 us (CLK0=0.16us)
*/
OUT_82c54_TIMER(3,0<<6 | 3<<4 | 3<<1) ; /* counter 0, mode 3 */
OUT_82c54_TIMER(0,100) ; /* LSB */
OUT_82c54_TIMER(0,0) ; /* MSB */
#else /* PCI */
outpd(ADDR(B2_TI_INI), (u_long) cnt * 200) ; /* Load timer value. */
outpw(ADDR(B2_TI_CRTL), TIM_START) ; /* Start timer. */
#endif /* PCI */
smc->hw.timer_activ = TRUE ;
}
......@@ -115,15 +100,8 @@ void hwt_start(struct s_smc *smc, u_long time)
************************/
void hwt_stop(struct s_smc *smc)
{
#ifndef PCI
/* stop counter 0 by switching to mode 0 */
OUT_82c54_TIMER(3,0<<6 | 3<<4 | 0<<1) ; /* counter 0, mode 0 */
OUT_82c54_TIMER(0,0) ; /* LSB */
OUT_82c54_TIMER(0,0) ; /* MSB */
#else /* PCI */
outpw(ADDR(B2_TI_CRTL), TIM_STOP) ;
outpw(ADDR(B2_TI_CRTL), TIM_CL_IRQ) ;
#endif /* PCI */
smc->hw.timer_activ = FALSE ;
}
......@@ -168,11 +146,6 @@ void hwt_init(struct s_smc *smc)
void hwt_restart(struct s_smc *smc)
{
hwt_stop(smc) ;
#ifndef PCI
OUT_82c54_TIMER(3,1<<6 | 3<<4 | 0<<1) ; /* counter 1, mode 0 */
OUT_82c54_TIMER(1,1 ) ; /* LSB */
OUT_82c54_TIMER(1,0 ) ; /* MSB */
#endif
}
/************************
......@@ -191,21 +164,12 @@ void hwt_restart(struct s_smc *smc)
u_long hwt_read(struct s_smc *smc)
{
u_short tr ;
#ifndef PCI
u_short is ;
#else
u_long is ;
#endif
if (smc->hw.timer_activ) {
hwt_stop(smc) ;
#ifndef PCI
OUT_82c54_TIMER(3,1<<6) ; /* latch command */
tr = IN_82c54_TIMER(1) & 0xff ;
tr += (IN_82c54_TIMER(1) & 0xff)<<8 ;
#else /* PCI */
tr = (u_short)((inpd(ADDR(B2_TI_VAL))/200) & 0xffff) ;
#endif /* PCI */
is = GET_ISR() ;
/* Check if timer expired (or wraparound). */
if ((tr > smc->hw.t_start) || (is & IS_TIMINT)) {
......
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