提交 a8d902db 编写于 作者: H Haavard Skinnemoen

avr32: Add MMIO address definitions for certain controllers

Hardcoded MMIO base addresses are used a few places throughout the
platform code. Move these into the chip-specific header file so that
adding support for new chips becomes a bit easier.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
上级 8f8a59c6
......@@ -16,6 +16,8 @@
#include <linux/device.h>
#include <linux/string.h>
#include <mach/chip.h>
#include "clock.h"
static DEFINE_SPINLOCK(clk_lock);
......
......@@ -46,4 +46,12 @@
#define DMAC_DMAREQ_2 9
#define DMAC_DMAREQ_3 10
/*
* Base addresses of controllers that may be accessed early by
* platform code.
*/
#define PM_BASE 0xfff00000
#define HMATRIX_BASE 0xfff00800
#define SDRAMC_BASE 0xfff03800
#endif /* __ASM_ARCH_AT32AP700X_H__ */
......@@ -14,12 +14,10 @@
#include <asm/cacheflush.h>
#include <asm/sysreg.h>
#include <mach/chip.h>
#include <mach/pm.h>
#include <mach/sram.h>
/* FIXME: This is only valid for AP7000 */
#define SDRAMC_BASE 0xfff03800
#include "sdramc.h"
#define SRAM_PAGE_FLAGS (SYSREG_BIT(TLBELO_D) | SYSREG_BF(SZ, 1) \
......
......@@ -4,14 +4,6 @@
#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
#define __ARCH_AVR32_MACH_AT32AP_PM_H__
/*
* We can reduce the code size a bit by using a constant here. Since
* this file is only used on AVR32 AP CPUs with segmentation enabled,
* it's safe to not use ioremap. Generic drivers should of course
* never do this.
*/
#define AT32_PM_BASE 0xfff00000
/* PM register offsets */
#define PM_MCCTRL 0x0000
#define PM_CKSEL 0x0004
......@@ -113,8 +105,8 @@
/* Register access macros */
#define pm_readl(reg) \
__raw_readl((void __iomem __force *)AT32_PM_BASE + PM_##reg)
__raw_readl((void __iomem __force *)PM_BASE + PM_##reg)
#define pm_writel(reg,value) \
__raw_writel((value), (void __iomem __force *)AT32_PM_BASE + PM_##reg)
__raw_writel((value), (void __iomem __force *)PM_BASE + PM_##reg)
#endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */
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